Abstract: The present invention relates to a method of driving an active-matrix type of liquid crystal display device that has a plurality of row electrodes to which a scanning signal is applied, a plurality of column electrodes to which a data signal is applied, and a plurality of picture elements (pixels) formed at a plurality of intersections between these row and column electrodes, each of these pixels comprising a liquid crystal layer and a two-terminal element having non-linear resistance characteristics connected in series therewith by means of applying a voltage of a difference signal between a scanning signal and a data signal to the pixels. A compensatory voltage is applied to each pixel immediately before a data write period during which the liquid crystal layer of the pixel is charged with a data charge voltage corresponding to a display gradation.

Abstract: In an active matrix liquid crystal display cell having a switching active element, first and second transparent electrodes between which liquid crystal is filled, and a shading layer for protecting the switching active element and enhancing a contrast of light, an insulating layer is interposed between the shading layer and the first transparent electrode with the shading layer partially laid under the first transparent electrode through the insulating layer.

Abstract: A dynamic random access memory cell comprises a switching transistor and a storage capacitor formed in a relatively deep trench and having a capacitor electrode projecting over the major surface of the semiconductor substrate, wherein the switching transistor comprises a source/drain region formed along a wall portion defining the relatively deep trench, another source/drain region formed in the major surface portion, a channel region extending partially along a wall portion defining a relatively shallow trench and partially beneath the major surface so that a channel length is prolonged, thereby decreasing an occupation area without any punch-through phenomenon.

Abstract: A semiconductor integrated circuit includes a semiconductor substrate, a plurality of logic gates formed in the semiconductor substrate, power source wiring and ground wiring formed on the semiconductor substrate to supply power source voltage to the logic gates and a capacitor formed on the semiconductor substrate and distributively connected between the power source wiring and the ground wirings.

Abstract: A semiconductor device includes a substrate of one conductivity type and a polycrystalline silicon layer of the opposite conductivity type formed on a major surface of the substrate. A p-n junction establishing an effective diode is formed on the polycrystalline silicon layer as a result of the introduction of the impurities of the one conductivity type from the substrate into the polycrystalline silicon layer.