Patents by Inventor Hiroharu YANAGISAWA

Hiroharu YANAGISAWA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11456200
    Abstract: A substrate fixing apparatus includes: a base plate; an electrostatic adsorption member that adsorbs and retains a substrate; a support member that is disposed on the base plate to support the electrostatic adsorption member; and an adhesive layer that adhesively bonds the electrostatic adsorption member to the base plate. The support member directly contacts the base plate and the electrostatic adsorption member. An elastic modulus of the support member is higher than an elastic modulus of the adhesive layer.
    Type: Grant
    Filed: June 9, 2020
    Date of Patent: September 27, 2022
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Nobuyuki Iijima, Hiroharu Yanagisawa, Yuichi Nakamura, Ryuji Takahashi
  • Publication number: 20220223454
    Abstract: A substrate fixing device includes: a base plate; an electrostatic adsorption member that adsorbs and holds a substrate; and a first adhesive layer that adhesively bonds the electrostatic adsorption member to the base plate. A storage modulus of the first adhesive layer is not less than 0.01 MPa and not more than 25 MPa within a temperature range of ?110° C. to 250° C.
    Type: Application
    Filed: January 11, 2022
    Publication date: July 14, 2022
    Inventors: Keita Sato, Hiroharu Yanagisawa, Yohei Yamada, Yuichi Nakamura, Nobuyuki Iijima
  • Patent number: 11152293
    Abstract: A wiring board includes an insulating layer including a first insulating film provided with a first surface and a second surface that is opposite to the first surface, and composed of only resin, and a second insulating film provided with a first surface and a second surface that is opposite to the first surface, including a reinforcing member and resin, in which the reinforcing member is impregnated with the resin, and stacked on the first surface of the first insulating film such that the second surface of the second insulating film contacts the first surface of the first insulating film and the second surface of the first insulating film is exposed outside; and a first wiring layer embedded in the first insulating film, a predetermined surface of the first wiring layer being exposed from the second surface of the first insulating film.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: October 19, 2021
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kazuhiro Oshima, Hiroharu Yanagisawa, Kazuhiro Kobayashi, Katsuya Fukase, Ken Miyairi
  • Patent number: 11088006
    Abstract: An electrostatic chuck includes a platform, a power feed pin, a tubular insulator, an adhesive layer, and a first primer. The platform includes an electrode. The power feed pin contacts the electrode. The tubular insulator is provided around the power feed pin. The adhesive layer bonds the platform and the tubular insulator together. The first primer is provided on a surface of the tubular insulator facing toward the adhesive layer.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: August 10, 2021
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Takamasa Yoshikawa, Hiroharu Yanagisawa, Nobuyuki Iijima
  • Publication number: 20200395236
    Abstract: A substrate fixing apparatus includes: a base plate; an electrostatic adsorption member that adsorbs and retains a substrate; a support member that is disposed on the base plate to support the electrostatic adsorption member; and an adhesive layer that adhesively bonds the electrostatic adsorption member to the base plate. The support member directly contacts the base plate and the electrostatic adsorption member. An elastic modulus of the support member is higher than an elastic modulus of the adhesive layer.
    Type: Application
    Filed: June 9, 2020
    Publication date: December 17, 2020
    Inventors: Nobuyuki Iijima, Hiroharu Yanagisawa, Yuichi Nakamura, Ryuji Takahashi
  • Publication number: 20200105651
    Abstract: A wiring board includes an insulating layer including a first insulating film provided with a first surface and a second surface that is opposite to the first surface, and composed of only resin, and a second insulating film provided with a first surface and a second surface that is opposite to the first surface, including a reinforcing member and resin, in which the reinforcing member is impregnated with the resin, and stacked on the first surface of the first insulating film such that the second surface of the second insulating film contacts the first surface of the first insulating film and the second surface of the first insulating film is exposed outside; and a first wiring layer embedded in the first insulating film, a predetermined surface of the first wiring layer being exposed from the second surface of the first insulating film.
    Type: Application
    Filed: December 3, 2019
    Publication date: April 2, 2020
    Inventors: Kazuhiro OSHIMA, Hiroharu YANAGISAWA, Kazuhiro KOBAYASHI, Katsuya FUKASE, Ken MIYAIRI
  • Publication number: 20190385883
    Abstract: An electrostatic chuck includes a platform, a power feed pin, a tubular insulator, an adhesive layer, and a first primer. The platform includes an electrode. The power feed pin contacts the electrode. The tubular insulator is provided around the power feed pin. The adhesive layer bonds the platform and the tubular insulator together. The first primer is provided on a surface of the tubular insulator facing toward the adhesive layer.
    Type: Application
    Filed: June 4, 2019
    Publication date: December 19, 2019
    Inventors: Takamasa Yoshikawa, Hiroharu Yanagisawa, Nobuyuki Iijima
  • Patent number: 9966331
    Abstract: The wiring substrate includes an insulation layer that includes a lower surface, an upper surface, and an intermediate surface located between the lower surface and the upper surface. A first wiring layer is formed on the lower surface of the insulation layer. A second wiring layer is formed on the intermediate surface of the insulation layer. A recess is formed in the upper surface of the insulation layer. The recess overlaps, in a plan view, a first through hole that extends through the insulation layer. The first through hole is filled with a via wiring, which is formed integrally with the first wiring layer. A bump is formed integrally with the via wiring and projected into the recess. An upper end surface of the bump is located above an upper surface of the second wiring layer.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: May 8, 2018
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Takayuki Ota, Hiroharu Yanagisawa, Katsuya Fukase
  • Patent number: 9961767
    Abstract: A circuit board includes an insulating layer including first and second insulator films, a first wiring layer embedded in the first insulator film and including pads and first wiring patterns exposed from the first insulator film, and a second wiring layer including second wiring patterns formed on the second insulator film and via wirings penetrating the insulating layer and electrically connecting the second wiring patterns to the first wiring layer. The first insulator film is made of a reinforcement-free resin that includes no reinforcing member. The second insulator film is made of a reinforcing member impregnated with a resin.
    Type: Grant
    Filed: January 8, 2016
    Date of Patent: May 1, 2018
    Assignee: SHINKO ELECTRIC INDUSTIRES CO., LTD.
    Inventors: Kazuhiro Oshima, Hiroharu Yanagisawa, Kazuhiro Kobayashi, Katsuya Fukase, Ken Miyairi
  • Publication number: 20180047661
    Abstract: A wiring board includes an insulating layer including a first insulating film provided with a first surface and a second surface that is opposite to the first surface, and composed of only resin, and a second insulating film provided with a first surface and a second surface that is opposite to the first surface, including a reinforcing member and resin, in which the reinforcing member is impregnated with the resin, and stacked on the first surface of the first insulating film such that the second surface of the second insulating film contacts the first surface of the first insulating film and the second surface of the first insulating film is exposed outside; and a first wiring layer embedded in the first insulating film, a predetermined surface of the first wiring layer being exposed from the second surface of the first insulating film.
    Type: Application
    Filed: July 31, 2017
    Publication date: February 15, 2018
    Inventors: Kazuhiro OSHIMA, Hiroharu YANAGISAWA, Kazuhiro KOBAYASHI, Katsuya FUKASE, Ken MIYAIRI
  • Patent number: 9698094
    Abstract: A wiring board includes: an insulating layer; and a wiring layer including: an upper surface; a lower surface opposite to the upper surface; and a side surface between the upper surface and the lower surface, wherein the upper surface of the wiring layer is exposed from the insulating layer, and the side surface and the lower surface of the wiring layer are embedded in the insulating layer. A recess portion is formed in an outer edge portion of the upper surface of the wiring layer, and the recess portion is filled with the insulating layer.
    Type: Grant
    Filed: August 4, 2016
    Date of Patent: July 4, 2017
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Hiroharu Yanagisawa, Kazuhiro Kobayashi
  • Publication number: 20170040249
    Abstract: A wiring board includes: an insulating layer; and a wiring layer including: an upper surface; a lower surface opposite to the upper surface; and a side surface between the upper surface and the lower surface, wherein the upper surface of the wiring layer is exposed from the insulating layer, and the side surface and the lower surface of the wiring layer are embedded in the insulating layer. A recess portion is formed in an outer edge portion of the upper surface of the wiring layer; and the recess portion is filled with the insulating layer.
    Type: Application
    Filed: August 4, 2016
    Publication date: February 9, 2017
    Inventors: Hiroharu Yanagisawa, Kazuhiro Kobayashi
  • Patent number: 9538664
    Abstract: A wiring substrate includes a first wiring layer with a wiring pattern and a metal foil. A first insulating layer includes a first through hole having a first end facing the metal foil and a second end. A second wiring layer includes a first opening having a diameter smaller than the second end. A second insulating layer includes a second through hole having a third end facing the wiring pattern and a fourth end. A third wiring layer includes a second opening having a diameter smaller than the fourth end. A first via is filled in the first opening, the first through hole, and a first recess, in the metal foil, having a diameter greater than the first end. A second via is filled in the second opening, the second through hole, and a second recess, in the wiring pattern, having a diameter greater than the third end.
    Type: Grant
    Filed: December 12, 2013
    Date of Patent: January 3, 2017
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Hiroharu Yanagisawa, Kentaro Kaneko, Kazuhiro Oshima, Junichi Nakamura
  • Publication number: 20160276255
    Abstract: The wiring substrate includes an insulation layer that includes a lower surface, an upper surface, and an intermediate surface located between the lower surface and the upper surface. A first wiring layer is formed on the lower surface of the insulation layer. A second wiring layer is formed on the intermediate surface of the insulation layer. A recess is formed in the upper surface of the insulation layer. The recess overlaps, in a plan view, a first through hole that extends through the insulation layer. The first through hole is filled with a via wiring, which is formed integrally with the first wiring layer. A bump is formed integrally with the via wiring and projected into the recess. An upper end surface of the bump is located above an upper surface of the second wiring layer.
    Type: Application
    Filed: February 29, 2016
    Publication date: September 22, 2016
    Inventors: Takayuki Ota, Hiroharu Yanagisawa, Katsuya Fukase
  • Publication number: 20160234932
    Abstract: A circuit board includes an insulating layer including first and second insulator films, a first wiring layer embedded in the first insulator film and including pads and first wiring patterns exposed from the first insulator film, and a second wiring layer including second wiring patterns formed on the second insulator film and via wirings penetrating the insulating layer and electrically connecting the second wiring patterns to the first wiring layer. The first insulator film is made of a reinforcement-free resin that includes no reinforcing member. The second insulator film is made of a reinforcing member impregnated with a resin.
    Type: Application
    Filed: January 8, 2016
    Publication date: August 11, 2016
    Inventors: Kazuhiro OSHIMA, Hiroharu YANAGISAWA, Kazuhiro KOBAYASHI, Katsuya FUKASE, Ken MIYAIRI
  • Publication number: 20140182920
    Abstract: A wiring substrate includes a first wiring layer with a wiring pattern and a metal foil. A first insulating layer includes a first through hole having a first end facing the metal foil and a second end. A second wiring layer includes a first opening having a diameter smaller than the second end. A second insulating layer includes a second through hole having a third end facing the wiring pattern and a fourth end. A third wiring layer includes a second opening having a diameter smaller than the fourth end. A first via is filled in the first opening, the first through hole, and a first recess, in the metal foil, having a diameter greater than the first end. A second via is filled in the second opening, the second through hole, and a second recess, in the wiring pattern, having a diameter greater than the third end.
    Type: Application
    Filed: December 12, 2013
    Publication date: July 3, 2014
    Inventors: Hiroharu YANAGISAWA, Kentaro KANEKO, Kazuhiro OSHIMA, Junichi NAKAMURA