Abstract: The control system has a structure in which sensor apparatuses each having a data communication function are connected to an electronic control apparatus through a common communication line, and the sensors of the sensor apparatuses are connected to the electronic control apparatus through separate individual signal lines to transmit sensor signals to the electronic control apparatus. The electronic control apparatus is configured to, prior to transmitting communication data to one of the sensor apparatuses through the communication line, set the signal line connected to the selected sensor apparatus in a state in which the voltage of the signal line is outside a variation range corresponding to a voltage range of the sensor signal, and set the signal lines connected to the other sensor apparatuses to each of which the communication data is not addressed in a state in which the voltage of the signal line is within the variation range.

Abstract: The control system has a structure in which sensor apparatuses each having a data communication function are connected to an electronic control apparatus through a common communication line, and the sensors of the sensor apparatuses are connected to the electronic control apparatus through separate individual signal lines to transmit sensor signals to the electronic control apparatus. The electronic control apparatus is configured to, prior to transmitting communication data to one of the sensor apparatuses through the communication line, set the signal line connected to the selected sensor apparatus in a state in which the voltage of the signal line is outside a variation range corresponding to a voltage range of the sensor signal, and set the signal lines connected to the other sensor apparatuses to each of which the communication data is not addressed in a state in which the voltage of the signal line is within the variation range.

Abstract: In a shift clock signal generating apparatus, a delay line includes a plurality of unit delay elements connected in cascade. A reference clock signal propagates in the delay line while being successively delayed by the unit delay elements. Switches have first ends connected with output terminals of the unit delay elements respectively, and second ends connected with a shift clock signal output path. When specified one among the switches is in its on position, a delayed clock signal which results from delaying the reference clock signal by a prescribed time interval is transmitted via the specified switch to the shift clock signal output path as a shift clock signal. The specified one among the switches is determined on the basis of data representing a phase difference of the shift clock signal from the reference clock signal. The specified switch is set in its on position.

Abstract: In a shift clock signal generating apparatus, a delay line includes a plurality of unit delay elements connected in cascade. A reference clock signal propagates in the delay line while being successively delayed by the unit delay elements. Switches have first ends connected with output terminals of the unit delay elements respectively, and second ends connected with a shift clock signal output path. When specified one among the switches is in its on position, a delayed clock signal which results from delaying the reference clock signal by a prescribed time interval is transmitted via the specified switch to the shift clock signal output path as a shift clock signal. The specified one among the switches is determined on the basis of data representing a phase difference of the shift clock signal from the reference clock signal. The specified switch is set in its on position.