Abstract: A wiring board has an insulating layer, a plurality of wiring layers formed in such a way as to be insulated from each other by the insulating layer, and a plurality of vias formed in the insulating layer to connect the wiring layers. Of the wiring layers, a surface wiring layer formed in one surface of the insulating layer include a first metal film exposed from the one surface and a second metal film embedded in the insulating layer and stacked on the first metal film. Edges of the first metal film project from edges of the second metal film in the direction in which the second metal film spreads. By designing the shape of the wiring layers embedded in the insulating layer in this manner, it is possible to obtain a highly reliable wiring board that can be effectively prevented from side etching in the manufacturing process and can adapt to miniaturization and highly dense packaging of wires.

Abstract: A wiring substrate for mounting semiconductors is provided with an insulation film, wires formed in the insulation film, and a plurality of electrode pads that electrically connect to the wires through vias. The electrode pads are provided to have their surfaces exposed to both of the front surface and the rear surface of the insulation film, and at least a part of the side surface of the electrode pads is buried in the insulation film. The insulation film is formed by forming electrode pads on the respective two metallic plates, thereafter, laminating an insulation layer and wires on the respective metallic plates to cover the electrode pad, and adhering the insulation layers to each other for integration, and thereafter, removing the metallic plates.

Abstract: A wiring board in which lower-layer wiring composed of a wiring body and an etching barrier layer is formed in a concave portion formed on one face of a board-insulating film, upper-layer wiring is formed on the other face of the board-insulating film, and the upper-layer wiring and the wiring body of the lower-layer wiring are connected to each other through a via hole formed in the board-insulating film. The via hole is barrel-shaped, bell-shaped, or bellows-shaped.

Abstract: A wiring substrate for mounting semiconductors is provided with an insulation film, wires formed in the insulation film, and a plurality of electrode pads that electrically connect to the wires through vias. The electrode pads are provided to have their surfaces exposed to both of the front surface and the rear surface of the insulation film, and at least a part of the side surface of the electrode pads is buried in the insulation film. The insulation film is formed by forming electrode pads on the respective two metallic plates, thereafter, laminating an insulation layer and wires on the respective metallic plates to cover the electrode pad, and adhering the insulation layers to each other for integration, and thereafter, removing the metallic plates.

Abstract: A wiring board composite body includes a supporting substrate, and wiring boards formed on each of the upper and the lower surfaces of the supporting substrate. The supporting substrate includes a supporting body, and a metal body arranged on each of the upper and the lower surfaces of the supporting body. The wiring board comprises at least an insulation layer insulating upper and lower wirings, and a via connecting the upper and the lower wirings. The wiring board mounted on the metal body constitutes a wiring board with the metal body. Thus, the supporting body supporting the metal body is effectively used in a process of forming the wiring board on the metal body, and the wiring board composite body, which has advantageous structural and production characteristics, is provided. A semiconductor device and a method for manufacturing such wiring board composite body and the semiconductor device are also provided.

Abstract: A semiconductor device includes: a semiconductor chip mounted on a mounting substrate; a first resin filling a gap between the chip and the substrate; a frame-shaped stiffener surrounding the chip; a first adhesive for bonding the stiffener to the substrate; a lid for covering the stiffener and an area surrounded by the stiffener; and a second resin filling a space between the stiffener and the chip. A thermal expansion coefficient of the second resin is smaller than that of the first resin. The first resin includes an underfill part filling a gap between the chip and the substrate and a fillet part extended from the chip region.

Abstract: A semiconductor device includes: a semiconductor chip mounted on a mounting substrate; a first resin filling a gap between the chip and the substrate; a frame-shaped stiffener surrounding the chip; a first adhesive for bonding the stiffener to the substrate; a lid for covering the stiffener and an area surrounded by the stiffener; and a second resin filling a space between the stiffener and the chip. A thermal expansion coefficient of the second resin is smaller than that of the first resin. The first resin includes an underfill part filling a gap between the chip and the substrate and a fillet part extended from the chip region.

Abstract: A wiring board for mounting a semiconductor element or electronic component having a plurality of wiring layers, an insulating layer provided between these wiring layers, and a via which is provided to the insulating layer and which electrically connects the wiring layers. In this wiring board, the cross-sectional shape of the via in the plane parallel to the wiring layers is obtained by the partial overlapping of a plurality of similar shapes (circles). Stable operation can be obtained in a semiconductor element by minimizing obstacles to increased density, effectively increasing the cross-sectional area of the via, and preventing the wiring resistance from increasing by making the cross-sectional shape of the via into a shape obtained by the partial overlapping of a plurality of similar shapes.

Abstract: A wiring board has an insulating layer, a plurality of wiring layers formed in such a way as to be insulated from each other by the insulating layer, and a plurality of vias formed in the insulating layer to connect the wiring layers. Of the wiring layers, a surface wiring layer formed in one surface of the insulating layer include a first metal film exposed from the one surface and a second metal film embedded in the insulating layer and stacked on the first metal film. Edges of the first metal film project from edges of the second metal film in the direction in which the second metal film spreads. By designing the shape of the wiring layers embedded in the insulating layer in this manner, it is possible to obtain a highly reliable wiring board that can be effectively prevented from side etching in the manufacturing process and can adapt to miniaturization and highly dense packaging of wires.

Abstract: A wiring board has a base insulating film. The base insulating film has a thickness of 20 to 100 ?m and is made of a heat-resistant resin which has a glass-transition temperature of 150° C. or higher and which contains reinforcing fibers made of glass or aramid. The base insulating film has the following physical properties (1) to (6) when an elastic modulus at a temperature of T° C. is given as DT (GPa) and a breaking strength at a temperature of T° C. is given as HT (MPa). (1) A coefficient of thermal expansion in the direction of thickness thereof is 90 ppm/K or less. (2) D23?5 (3) D150?2.5 (4) (D?65/D150)?3.0 (5) H23?140 (6) (H?65/H150)?2.3.

Abstract: A resist post is formed on a connection pad of a semiconductor chip, and the semiconductor chip and the resist post are covered by a heat resistant insulating layer. A surface of the insulating layer is next polished by CMP or the like, thus an upper surface of the resist post being exposed. The exposed resist post is then removed by developing processing or the like, thus forming a through hole. A conductor is then embedded in the through hole by plating, thus forming a connecting conductor, and wirings are formed. A method of forming the connecting conductor does not impart damage to the semiconductor chip.

Abstract: A wiring board for mounting semiconductor device, includes at least a dielectric film 1; wirings formed in the dielectric film 1; a plurality of electrode pads provided at front and back surfaces of the dielectric film with their surfaces exposed and at least portions of lateral sides of them buried into the dielectric film; vias connecting the wirings and the electrode pads. At least one via connecting each other the wirings formed in the dielectric film includes second material different from first material forming the vias connecting the wirings and the electrode pads. The wiring board for mounting semiconductor device, is effective for an increase in terminals and finer pitch of terminal intervals due to an improvement in integration, performance or multi-function of semiconductor devices, can mount semiconductor devices especially on both sides of the board at a high density and high accuracy, and furthermore, is excellent in reliability as well.

Abstract: An interconnect substrate includes an interconnect, an insulating layer, a non-photosensitive resin layer, a photosensitive resin layer, a first electrode pad, and a second electrode pad. The non-photosensitive resin layer is constructed with a non-photosensitive insulating material. Also, the non-photosensitive resin layer has a first opening. The photosensitive resin layer is constructed with a photosensitive insulating material. Also, the photosensitive resin layer has a second opening. The opening area of the second opening is larger than that of the first opening. The first electrode pad is disposed on the first surface side of the insulating layer. The first electrode pad is exposed to the first opening. The second electrode pad is disposed on the second surface side of the insulating layer. The second electrode pad is exposed to the second opening.

Abstract: A wiring board has a base insulating film. The base insulating film has a thickness of 20 to 100 ?m and is made of a heat-resistant resin which has a glass-transition temperature of 150° C. or higher and which contains reinforcing fibers made of glass or aramid. The base insulating film has the following physical properties (1) to (6) when an elastic modulus at a temperature of T° C. is given as DT (GPa) and a breaking strength at a temperature of T° C. is given as HT (MPa). (1) A coefficient of thermal expansion in the direction of thickness thereof is 90 ppm/K or less. (2) D23?5 (3) D150?2.5 (4) (D?65/D150)?3.0 (5) H23?140 (6) (H?65/H150)?2.

Abstract: A semiconductor device has a wiring substrate, a semiconductor chip, a conductive bump, and an under-fill resin. The wiring substrate has a solder resist layer, and a stress alleviating portion. The stress alleviating portion is mounted on the solder resist layer opposed to the outer circumference of the semiconductor chip. The material of the stress alleviating portion is different from that of the solder resist layer. The stress alleviating portion alleviates the stress acting on the solder resist layer and the under-fill resin. The semiconductor chip is mounted above the wiring substrate via the conductive bump. The gap between the wiring substrate and the semiconductor chip is filled with the under-fill resin.

Abstract: A wiring board has a base insulating film. The base insulating film has a thickness of 20 to 100 ?m and is made of a heat-resistant resin which has a glass-transition temperature of 150° C. or higher and which contains reinforcing fibers made of glass or aramid. The base insulating film has the following physical properties (1) to (6) when an elastic modulus at a temperature of T° C. is given as DT (GPa) and a breaking strength at a temperature of T° C. is given as HT (MPa). (1) A coefficient of thermal expansion in the direction of thickness thereof is 90 ppm/K or less (2) D23?5 (3) D150?2.5 (4) (D?65/D150)?3.0 (5) H23?140 (6) (H?65/H150)?2.3.

Abstract: A minute wiring structure portion including first wiring layers and first insulating layers, in which each of first wiring layers and each of first insulating layers are alternately laminated, is formed on a semiconductor substrate. A first huge wiring structure portion is formed on the minute wiring structure portion, and the first huge wiring structure portion is formed by successively forming on the minute wiring structure portion, in the following order, the first huge wiring portion including second wiring layers has a thickness of twice or more of the thickness of the first wiring layers and second insulating layers, in which each of second wiring layers and each of second wiring layers are alternately laminated, and a second huge wiring structure portion including third wiring layers has a thickness of twice or more of the thickness of the first wiring layer and a third insulating layer in which the elastic modulus at 25° C.

Abstract: In accordance with the present invention, during formation of the interconnection board, the interconnection board remains securely fixed to a high rigidity plate being higher in rigidity than the interconnection board for suppressing the interconnection board from being bent.

Abstract: An interconnect substrate includes an interconnect, an insulating layer, a non-photosensitive resin layer, a photosensitive resin layer, a first electrode pad, and a second electrode pad. The non-photosensitive resin layer is constructed with a non-photosensitive insulating material. Also, the non-photosensitive resin layer has a first opening. The photosensitive resin layer is constructed with a photosensitive insulating material. Also, the photosensitive resin layer has a second opening. The opening area of the second opening is larger than that of the first opening. The first electrode pad is disposed on the first surface side of the insulating layer. The first electrode pad is exposed to the first opening. The second electrode pad is disposed on the second surface side of the insulating layer. The second electrode pad is exposed to the second opening.

Abstract: A method of producing a multilayer wiring substrate is disclosed. The multilayer wiring substrate is free from a core substrate and includes a build up layer which includes an insulator layer and a wiring layer. One of a first main surface and a second main surface of the build up layer is formed with a metal supporting frame body. The method includes the steps of: forming a first insulator layer on a first main surface of a metal supporting plate, where the first insulator layer is included in the insulator layer and becomes a first resist layer which is positioned on the first main surface's side of the build up layer, and forming a first metal pad layer in a given position on a first main surface of the first insulator layer, where the first metal pad layer is included in the wiring layer and becomes a metal pad layer.