Abstract: To control an excess bias to an appropriate value in a light detection device. A solid-state image sensor includes a photodiode, a resistor, and a control circuit. In this solid-state image sensor, the photodiode photoelectrically converts incident light and outputs a photocurrent. Furthermore, in the solid-state image sensor, the resistor is connected to a cathode of the photodiode. Furthermore, in the solid-state image sensor, the control circuit supplies a lower potential to an anode of the photodiode as a potential of the cathode of when the photocurrent flows through the resistor is higher.

Abstract: An object of the present invention is to prevent a sensitivity difference between pixels. There are disposed plural unit cells each including plural photodiodes, plural transfer MOSFETs arranged corresponding to the plural photodiodes, respectively, and a common MOSFET which amplifies and outputs signals read from the plural photodiodes. Each pair within the unit cell, composed of the photodiode and the transfer MOSFET provided corresponding to the photodiode, has translational symmetry with respect to one another. Within the unit cell, there are included a reset MOSFET and selecting MOSFET.

Abstract: To control an excess bias to an appropriate value in a light detection device. A solid-state image sensor includes a photodiode, a resistor, and a control circuit. In this solid-state image sensor, the photodiode photoelectrically converts incident light and outputs a photocurrent. Furthermore, in the solid-state image sensor, the resistor is connected to a cathode of the photodiode. Furthermore, in the solid-state image sensor, the control circuit supplies a lower potential to an anode of the photodiode as a potential of the cathode of when the photocurrent flows through the resistor is higher.

Abstract: An object of the present invention is to prevent a sensitivity difference between pixels. There are disposed plural unit cells each including plural photodiodes, plural transfer MOSFETs arranged corresponding to the plural photodiodes, respectively, and a common MOSFET which amplifies and outputs signals read from the plural photodiodes. Each pair within the unit cell, composed of the photodiode and the transfer MOSFET provided corresponding to the photodiode, has translational symmetry with respect to one another. Within the unit cell, there are included a reset MOSFET and selecting MOSFET.

Abstract: In a sensing device that generates a distance image, a variation in distance measurement accuracy in the distance image is reduced. The sensing device includes a predetermined number of pixel circuits and a voltage control unit. Each of the predetermined number of pixel circuits includes a photoelectric conversion element and a detection circuit. A predetermined reverse bias voltage is applied between an anode and a cathode of the photoelectric conversion element. The detection circuit detects whether a photon is present or absent on the basis of a potential of either the anode or the cathode. The voltage control unit adjusts the reverse bias voltage to a value corresponding to a breakdown voltage of the photoelectric conversion element for each of the pixel circuits.

Abstract: To control an excess bias to an appropriate value in a light detection device. A solid-state image sensor includes a photodiode, a resistor, and a control circuit. In this solid-state image sensor, the photodiode photoelectrically converts incident light and outputs a photocurrent. Furthermore, in the solid-state image sensor, the resistor is connected to a cathode of the photodiode. Furthermore, in the solid-state image sensor, the control circuit supplies a lower potential to an anode of the photodiode as a potential of the cathode of when the photocurrent flows through the resistor is higher.

Abstract: To control an excess bias to an appropriate value in a light detection device. A solid-state image sensor includes a photodiode, a resistor, and a control circuit. In this solid-state image sensor, the photodiode photoelectrically converts incident light and outputs a photocurrent. Furthermore, in the solid-state image sensor, the resistor is connected to a cathode of the photodiode. Furthermore, in the solid-state image sensor, the control circuit supplies a lower potential to an anode of the photodiode as a potential of the cathode of when the photocurrent flows through the resistor is higher.

Abstract: A measurement apparatus (110A) according to an embodiment includes: a time-to-digital converter circuit (111) that measures a time period between an emission timing at which light is emitted from a light emitting unit (101) and a time point at which a light receiving unit (102) receives the light; a delay means (114A) that adds, to the time period measured by the time-to-digital converter circuit, a positive or a negative delay having a length that is different from a cycle of a clock used by the time-to-digital converter circuit and that is used as a unit amount of delay; and a storage unit (112) that stores therein time information that indicates the time period measured by the time-to-digital converter circuit and delay information that indicates an amount of delay to be added by the delay means, in association with each other, related to each of a case in which a delay is added by the delay means and a case in which a delay is not added by the delay means.

Abstract: A time measurement device according to the present disclosure includes: a first light receiving unit; a first timing detection unit; a first calculation unit; and a histogram generation unit. The first light receiving unit is configured to detect first pulse light and second pulse light. The first pulse light corresponds to emission pulse light emitted from a light emitting unit. The second pulse light includes reflected light by a target object. The reflected light by the target object corresponds to the emission pulse light. The first timing detection unit is configured to detect a first light receiving timing of the first pulse light and a second light receiving timing of the second pulse light by the first light receiving unit on the basis of an output signal of the first light receiving unit. The first calculation unit is configured to calculate a first time value by performing a subtraction process on the basis of the first light receiving timing and the second light receiving timing.

Abstract: An object of the present invention is to prevent a sensitivity difference between pixels. There are disposed plural unit cells each including plural photodiodes, plural transfer MOSFETs arranged corresponding to the plural photodiodes, respectively, and a common MOSFET which amplifies and outputs signals read from the plural photodiodes. Each pair within the unit cell, composed of the photodiode and the transfer MOSFET provided corresponding to the photodiode, has translational symmetry with respect to one another. Within the unit cell, there are included a reset MOSFET and selecting MOSFET.

Abstract: To control an excess bias to an appropriate value in a light detection device. A solid-state image sensor includes a photodiode, a resistor, and a control circuit. In this solid-state image sensor, the photodiode photoelectrically converts incident light and outputs a photocurrent. Furthermore, in the solid-state image sensor, the resistor is connected to a cathode of the photodiode. Furthermore, in the solid-state image sensor, the control circuit supplies a lower potential to an anode of the photodiode as a potential of the cathode of when the photocurrent flows through the resistor is higher.

Abstract: An object of the present invention is to prevent a sensitivity difference between pixels. There are disposed plural unit cells each including plural photodiodes with plural transfer MOSFETs arranged respectively corresponding to the plural photodiodes, and a common MOSFET that amplifies and outputs signals read from the plural photodiodes. The unit cell includes reset and selecting MOSFETs. Within the unit cell, each pair of photodiode and corresponding transfer MOSFET has translational symmetry with respect to one another.

Abstract: An electronic circuit includes a generating circuit for generating a first group of signals and a second group of signals, and a transmission path for transmitting the first group of signals and the second group of signals. The first group of signals are composed of signals synchronized with a first edge that is one of the rising edge and the falling edge of a reference clock, and the second group of signals are composed of signals synchronized with a second edge that is the other of the rising edge and falling edge. The transmission path includes first transmission lines for transmitting the signals composing the first group and second transmission lines for transmitting the signals composing the second group, and the first and second transmission lines are alternately arranged.

Abstract: An electronic circuit includes a generating circuit for generating a first group of signals and a second group of signals, and a transmission path for transmitting the first group of signals and the second group of signals. The first group of signals are composed of signals synchronized with a first edge that is one of the rising edge and the falling edge of a reference clock, and the second group of signals are composed of signals synchronized with a second edge that is the other of the rising edge and falling edge. The transmission path includes first transmission lines for transmitting the signals composing the first group and second transmission lines for transmitting the signals composing the second group, and the first and second transmission lines are alternately arranged.

Abstract: In a period in which a pixel signal of another pixel is read out from the pixel, a transistor connected to a floating diffusion region of a pixel not performing reading out of a pixel signal from the pixel is turned off.

Abstract: An imaging apparatus includes: a first signal processing circuit arranged in a first direction to process a signal from a first group of pixels; a second signal processing circuit arranged in a second direction to process a signal from a second group of pixels; a first external connecting terminal arranged in the first direction to supply a first potential to the first signal processing circuit; a second external connecting terminal arranged in the second direction to supply the first potential to the second signal processing circuit; a third external connecting terminal arranged in the first direction to supply a second potential to the first group of pixels; and a fourth external connecting terminal arranged in the second direction to supply the second potential to the second group of pixels.

Abstract: An electronic circuit includes a generating circuit for generating a first group of signals and a second group of signals, and a transmission path for transmitting the first group of signals and the second group of signals. The first group of signals are composed of signals synchronized with a first edge that is one of the rising edge and the falling edge of a reference clock, and the second group of signals are composed of signals synchronized with a second edge that is the other of the rising edge and falling edge. The transmission path includes first transmission lines for transmitting the signals composing the first group and second transmission lines for transmitting the signals composing the second group, and the first and second transmission lines are alternately arranged.

Abstract: A solid-state imaging apparatus and an imaging system which can reduce the occurrence of darkening and decrease deterioration in CDS performance are provided. The solid-state imaging apparatus has: a pixel unit including a photoelectric conversion unit for generating a signal by a photoelectric conversion; an amplifier unit for amplifying the signal generated by the photoelectric conversion unit; and a limiting circuit for limiting a level of an output signal from the amplifier unit. The pixel unit outputs a noise signal under a reset state during a first period and outputs a pixel signal under a non-reset state during a second period. The limiting circuit limits the level of the output signal from the amplifier unit in the first period, lower than the level of the output signal from the amplifier unit in the second period.

Abstract: After a signal level of a digital signal is changed in a period in which a plurality of memories is sampling the digital signal, a signal for causing the plurality of memories to hold the digital signal being sampled by the plurality of memories is supplied to the plurality of memories.

Abstract: An image pickup apparatus includes a plurality of pixels arranged in rows and columns, a plurality of comparators, each of the comparators including a switch for controlling an operation, a signal line which is provided commonly to the switches of the plurality of comparators and through which a control signal for controlling the switches of the plurality of comparators is supplied, a control signal generation unit, and a signal line control unit configured to control an electric potential of the signal line to be set as a fixed electric potential.