Patents by Inventor Hiroki Morimura

Hiroki Morimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6990219
    Abstract: An image capturing apparatus includes an image capturing section and capture control section. The image capturing section converts the shape of an object into an electrical quantity in accordance with the parameter value set in a parameter setting section, and outputs image data representing an image corresponding to the shape of the object. The capture control section receives the image data output from the image capturing section, calculates an evaluation index for evaluating the image quality of the image from the image data. If the evaluation index falls outside the range of a preset reference value, the capture control section changes the parameter value set in the parameter setting section so as to make the evaluation index fall within the range of the reference value to output the image data which is received from the image capturing section and the evaluation index of which falls within the range of the reference value.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: January 24, 2006
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Hiroki Morimura, Toshishige Shimamura, Kenichi Saito, Yukio Okazaki, Hakaru Kyuragi, Chikara Yamaguchi, Hiroki Suto, Satoshi Shigematsu
  • Publication number: 20050259502
    Abstract: A row decoding circuit (171) outputs a select signal to a row set in a row range setting unit (172) to select a select signal line (103), processing results from processing circuits (102) on this row are output to a data output line (104), and a row adder (106) adds processing results output to a data output line (104) of a column set in a column range selector (105).
    Type: Application
    Filed: February 13, 2004
    Publication date: November 24, 2005
    Inventors: Toshishige Shimamura, Hiroki Morimura, Koji Fujii, Satoshi Shigematsu, Katsuyuki Machida
  • Publication number: 20050259850
    Abstract: A detection element (1A) having a detection electrode (11A) connected to a surface shape detection unit (2) and a detection electrode (12A) connected to a common potential, and a detection element (1B) having a detection electrode (11B) connected to the surface shape detection unit (2) and a detection electrode (12B) connected to a biometric recognition unit (3) are arranged. The surface shape detection unit (2) outputs a signal representing the three-dimensional pattern of the surface shape corresponding to the contact portion to each detection element on the basis of individual capacitances obtained from the detection elements (1A, 1B). The biometric recognition unit (3) determines whether an object (9) is a living body, on the basis of a signal corresponding to the impedance of the object (9) connected between the detection electrode (12B) of the detection element (1B) and the detection electrode (12A) of the detection element (1A).
    Type: Application
    Filed: August 12, 2004
    Publication date: November 24, 2005
    Inventors: Toshishige Shimamura, Hiroki Morimura, Satoshi Shigematsu, Norio Sato, Masami Urano, Katsuyuki Machida
  • Publication number: 20050258877
    Abstract: A first control potential setting means (1) generates a first control potential (N2) which reverses the magnitude relationship with a second control potential (N3) when an input signal (IN) reaches the vicinity of a logical threshold value. A second control potential setting means (2) generates the second control potential (N3) which changes in the same direction as the input signal (IN), in accordance with a change in input signal (IN). An output means (3) includes transistors (Q5, Q6), and generates an output signal (OUT) having a predetermined potential on the basis of the first control potential (N2), the second control potential (N3), and a reset signal (RSET). A reset means (4) turns off the transistor (Q6) while a waveform shaping circuit is in operation.
    Type: Application
    Filed: January 21, 2004
    Publication date: November 24, 2005
    Applicant: Nippon Telegraph and Telephone Corporation
    Inventors: Hiroki Morimura, Toshishige Shimamura, Koji Fujii, Satoshi Shigematsu, Yukio Okazaki, Katsuyuki Machida
  • Publication number: 20050226467
    Abstract: This invention includes an image quality priority level decision processing unit (40) which evaluates the magnitude of an image quality of each of a plurality of first image data formed from biometric images associated with the same target on the basis of a specific index having the relationship of a monotone function with authentication accuracy of biometric authentication, and outputs each of the first image data upon adding a priority level thereto on the basis of the evaluation result, a first image storage (6, 81) unit which stores each of the first image data having a priority level added thereto from the image quality priority level decision processing unit (40), a second image storage unit (8, 61) which stores second image data used for comparison/collation with the first image data, an image collation unit (7) which compares/collates the second image data stored in the second image storage unit (8, 61) with the first image data stored in the first image storage unit (6, 81) and outputs the comparison
    Type: Application
    Filed: March 5, 2004
    Publication date: October 13, 2005
    Inventors: Takahiro Hatano, Satoshi Shigematsu, Hiroki Morimura, Namiko Ikeda, Yukio Okazaki, Katsuyuki Machida, Mamoru Nakanishi
  • Publication number: 20050214960
    Abstract: A method of manufacturing a surface shape recognition sensor. A sacrificial film is formed on an interlevel dielectric to cover a lower electrode while keeping an upper portion of a support electrode exposed. An upper electrode is formed on the sacrificial film and support electrode. The sacrificial film is selectively removed and a protective film is formed on the upper electrode. A photosensitive resin film having photosensitivity is formed on the protective film. A plurality of projections are formed in a region of the protective film above a capacitive detection element. In this manner a plurality of capacitive detection elements each having the lower electrode and upper electrode are formed.
    Type: Application
    Filed: April 7, 2005
    Publication date: September 29, 2005
    Inventors: Norio Sato, Katsuyuki Machida, Hakaru Kyuragi, Satoshi Shigematsu, Hiroki Morimura, Hiromu Ishii, Toshishige Shimamura
  • Patent number: 6917694
    Abstract: A surface shape recognition apparatus includes detection circuit, comparison circuit, storage circuit, and control circuit. The detection circuit electrically detects a surface shape pattern in a partial region of the target collation surface of an object using a plurality of sensor elements and outputs detection data representing the surface shape pattern. The comparison circuit compares the detection data from the detection circuit with predetermined collation data and outputs a comparison result. The storage circuit stores template data representing the surface shape pattern of the entire target collation surface, the template data being obtained from the object in advance.
    Type: Grant
    Filed: May 17, 2000
    Date of Patent: July 12, 2005
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Katsuyuki Machida, Satoshi Shigematsu, Hiroki Morimura, Hakaru Kyuragi, Takuya Adachi
  • Patent number: 6735684
    Abstract: A parallel-processing apparatus includes a plurality of cells, variable-delay circuits, a signal output unit, a delay counter, and an accumulation unit. Each cell has a processing circuit for performing arbitrary processing. The variable-delay circuits change the signal propagation delay in accordance with the processing results of the processing circuits. The signal output unit outputs a measurement input signal to the first variable-delay circuit of a variable-delay circuit array. The delay counter receives the measurement input signal output form the signal output unit and a measurement output signal output from the variable-delay circuit array, and obtains the signal propagation delay time of the variable-delay circuit array upon the basis of the measurement input and output signals. The accumulation unit accumulates the processing results of the processing circuits. A parallel processing method is also disclosed.
    Type: Grant
    Filed: September 13, 2000
    Date of Patent: May 11, 2004
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Satoshi Shigematsu, Hiroki Morimura, Katsuyuki Machida
  • Patent number: 6727561
    Abstract: A surface shape recognition sensor includes a plurality of capacitive detection elements, a support electrode, and a protective film. The capacitive detection elements are formed from lower electrodes and a deformable plate-like upper electrode made of a metal. The lower electrodes are insulated and isolated from each other and stationarily laid out on a single plane of an interlevel dielectric formed on a semiconductor substrate. The upper electrode is laid out above the lower electrodes at a predetermined interval and has a plurality of opening portions. The support electrode is laid out around the lower electrodes while being insulated and isolated from the lower electrodes, and formed to be higher than the lower electrodes to support the upper electrode. The protective film is formed on the upper electrode to close the opening portions. The opening portions of the upper electrode are laid out in a region other than regions on a main part of the lower electrode and on the support electrode.
    Type: Grant
    Filed: November 19, 2002
    Date of Patent: April 27, 2004
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Norio Sato, Katsuyuki Machida, Satoshi Shigematsu, Hiroki Morimura, Hakaru Kyuragi
  • Patent number: 6714666
    Abstract: A surface shape recognition apparatus includes a plurality of sensor electrodes, passivation film, capacitance detection circuit, and ground electrode. The sensor electrodes are formed on an interlevel insulator on a substrate and insulated from each other. The passivation film is formed on the interlevel insulator to cover the upper and side surfaces of each sensor electrode. The passivation film is formed from a dielectric material. When a target recognition object comes into contact with the surface of the passivation film, the capacitance detection circuit detects an electrostatic capacitance formed between the sensor electrode and the surface of the target recognition object opposing the sensor electrode. The ground electrode passes static electricity on the surface of the passivation film.
    Type: Grant
    Filed: June 9, 2000
    Date of Patent: March 30, 2004
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Hiroki Morimura, Satoshi Shigematsu, Katsuyuki Machida, Hakaru Kyuragi
  • Publication number: 20040042640
    Abstract: An image processing apparatus includes an image correcting section. When an image of an object is input, the image correcting section performs correction processing for the input image including the object image and outputs the corrected image as an image required for authentication of the object. An image processing method is also disclosed.
    Type: Application
    Filed: August 27, 2002
    Publication date: March 4, 2004
    Inventors: Namiko Ikeda, Mamoru Nakanishi, Koji Fujii, Takahiro Hatano, Satoshi Shigematsu, Hiroki Morimura, Yukio Okazaki, Hakaru Kyuragi
  • Patent number: 6671392
    Abstract: The fingerprint recognition apparatus of this invention has a plurality of pixel units. Each pixel unit has a fingerprint sensor circuit including a sensor element for converting a three-dimensional pattern of a skin surface of a finger coming into contact with the element into an electrical signal, and a sensor circuit for processing the electrical signal converted by the sensor element and outputting predetermined data. Each pixel unit also has a fingerprint memory in which user's registered fingerprint data and a recognition circuit for collating the fingerprint data detected by the fingerprint sensor circuit with the registered fingerprint data. A control circuit controls the pixel units and totalizes recognition results.
    Type: Grant
    Filed: December 23, 1999
    Date of Patent: December 30, 2003
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Satoshi Shigematsu, Hiroki Morimura, Katsuyuki Machida
  • Publication number: 20030133621
    Abstract: A parallel processing logic circuit for sensor signal processing includes sensors and processing units. The sensor and the processing unit are integrated in the same pixel and arranged in a matrix. The processing unit contains a logic structure that consists of a register and a combinational logic function to execute pixel-parallel processing, based on binary data for a sensor, other processing units, and itself. The combinational logic function performs only a predetermined logic function and its dual one exclusively, thereby sharing the circuit resource and reducing the size of the processing unit. The register focusing on compactness also contributes to the small unit.
    Type: Application
    Filed: July 29, 2002
    Publication date: July 17, 2003
    Inventors: Koji Fujii, Satoshi Shigematsu, Hiroki Morimura, Mamoru Nakanishi
  • Publication number: 20030094663
    Abstract: A surface shape recognition sensor includes a plurality of capacitive detection elements, a support electrode, and a protective film. The capacitive detection elements are formed from lower electrodes and a deformable plate-like upper electrode made of a metal. The lower electrodes are insulated and isolated from each other and stationarily laid out on a single plane of an interlevel dielectric formed on a semiconductor substrate. The upper electrode is laid out above the lower electrodes at a predetermined interval and has a plurality of opening portions. The support electrode is laid out around the lower electrodes while being insulated and isolated from the lower electrodes, and formed to be higher than the lower electrodes to support the upper electrode. The protective film is formed on the upper electrode to close the opening portions. The opening portions of the upper electrode are laid out in a region other than regions on a main part of the lower electrode and on the support electrode.
    Type: Application
    Filed: November 19, 2002
    Publication date: May 22, 2003
    Inventors: Norio Sato, Katsuyuki Machida, Satoshi Shigematsu, Hiroki Morimura, Hakaru Kyuragi
  • Patent number: 6556935
    Abstract: A small shape recognizing capacitive sensor device includes detection elements, sensor circuits, and a correction circuit. The detection elements are arranged adjacent to each other. The sensor circuits are connected to the detection elements, respectively. The correction circuit corrects the output signal level of the sensor circuit. The output signal level correction circuit includes a calibration circuit, calibration reference signal generation circuit, and comparison circuit. The calibration circuit is connected to the output side of the sensor circuit. The calibration reference signal generation circuit generates a calibration reference signal. The comparison circuit compares the output from the sensor circuit with the calibration reference signal and supplies the difference output to the calibration circuit as a control signal.
    Type: Grant
    Filed: June 8, 2001
    Date of Patent: April 29, 2003
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Hiroki Morimura, Satoshi Shigematsu, Katsuyuki Machida, Hakaru Kyuragi, Toshishige Shimamura
  • Patent number: 6518083
    Abstract: A surface shape recognition sensor includes a plurality of capacitive detection elements, a support electrode, and a protective film. The capacitive detection elements are formed from lower electrodes and a deformable plate-like upper electrode made of a metal. The lower electrodes are insulated and isolated from each other and stationarily laid out on a single plane of an interlevel dielectric formed on a semiconductor substrate. The upper electrode is laid out above the lower electrodes at a predetermined interval and has a plurality of opening portions. The support electrode is laid out around the lower electrodes while being insulated and isolated from the lower electrodes, and formed to be higher than the lower electrodes to support the upper electrode. The protective film is formed on the upper electrode to close the opening portions. The opening portions of the upper electrode are laid out in a region other than regions on a main part of the lower electrode and on the support electrode.
    Type: Grant
    Filed: January 30, 2002
    Date of Patent: February 11, 2003
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Norio Sato, Katsuyuki Machida, Satoshi Shigematsu, Hiroki Morimura, Hakaru Kyuragi
  • Publication number: 20020181748
    Abstract: A calibration mode signal line to which sensor cells are commonly connected is arranged. In a calibration mode, a calibration mode signal is supplied to the sensor cells through the calibration mode signal line to designate calibration. In each sensor cell, when the calibration mode signal is being supplied from the calibration mode signal line, and the sensor cell is selected by the decoder, calibration operation of adjusting the detection sensitivity of a sensor circuit is executed using a calibration circuit.
    Type: Application
    Filed: May 7, 2002
    Publication date: December 5, 2002
    Inventors: Hiroki Morimura, Toshishige Shimamura, Satoshi Shigematsu, Katsuyuki Machida, Hakaru Kyuragi
  • Publication number: 20020146156
    Abstract: An image capturing apparatus includes an image capturing section and capture control section. The image capturing section converts the shape of an object into an electrical quantity in accordance with the parameter value set in a parameter setting section, and outputs image data representing an image corresponding to the shape of the object. The capture control section receives the image data output from the image capturing section, calculates an evaluation index for evaluating the image quality of the image from the image data. If the evaluation index falls outside the range of a preset reference value, the capture control section changes the parameter value set in the parameter setting section so as to make the evaluation index fall within the range of the reference value to output the image data which is received from the image capturing section and the evaluation index of which falls within the range of the reference value.
    Type: Application
    Filed: December 12, 2001
    Publication date: October 10, 2002
    Inventors: Hiroki Morimura, Toshishige Shimamura, Kenichi Saito, Yukio Okazaki, Hakaru Kyuragi, Chikara Yamaguchi, Hiroki Suto, Satoshi Shigematsu
  • Publication number: 20020126215
    Abstract: A data conversion/output apparatus includes a large number of sensors, voltage-time conversion circuits, and sensed data generation circuits. The voltage-time conversion circuits are arranged adjacent to the respective sensors, and change output levels upon the lapse of times corresponding to output voltage values from the sensors after a conversion operation start point in order to convert the voltage outputs of the sensors into times. The sensed data generation circuits output, as digital data, lapse times until the output levels of the voltage-time conversion circuits change after a substantial conversion start point.
    Type: Application
    Filed: January 28, 2002
    Publication date: September 12, 2002
    Inventors: Satoshi Shigematsu, Hiroki Morimura
  • Publication number: 20020121909
    Abstract: A surface shape recognition sensor includes a plurality of capacitive detection elements, a support electrode, a protective film, and a plurality of projections. The capacitive detection elements are formed from lower electrodes and a deformable plate-like upper electrode made of a metal. The lower electrodes are insulated and isolated from each other and stationarily laid out on a single plane of an interlevel dielectric formed on a semiconductor substrate. The upper electrode is laid out above the lower electrodes at a predetermined interval and has a plurality of opening portions. The support electrode is laid out around the lower electrodes while being insulated and isolated from the lower electrodes, and formed to be higher than the lower electrodes to support the upper electrode. The protective film is formed on the upper electrode to close the opening portions. The projections are laid out in a region of the protective film above the capacitive detection element.
    Type: Application
    Filed: January 18, 2002
    Publication date: September 5, 2002
    Inventors: Norio Sato, Katsuyuki Machida, Hakaru Kyuragi, Satoshi Shigematsu, Hiroki Morimura, Hiromu Ishii, Toshishige Shimamura