Patents by Inventor Hiroki Yamashita

Hiroki Yamashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190176725
    Abstract: There is provided a routing structure of a circuit body in a rocker formed on a vehicle body. The circuit body routing structure has a recessed housing groove formed along an extending direction of the rocker on a side surface of the rocker at a vehicle interior side, a circuit body that is formed of a long flat conductor having a conductor portion of a flat cross-sectional shape and that is housed in the housing groove and routed on the rocker, and an interior material that is mounted on the rocker so as to cover an upper surface and the side surface of the rocker, and that holds the circuit body in the housing groove.
    Type: Application
    Filed: December 5, 2018
    Publication date: June 13, 2019
    Inventors: Toshiaki Yamashita, Noriaki Sasaki, Shinji Oshita, Hiroki Kawakami
  • Publication number: 20190181584
    Abstract: A tolerance absorbing structure of a first power supply distribution box includes a connection terminal to which one end part of a flat distribution member is connected and fixed; a storage case including a connection opening member into which the connection terminal is inserted and fixed to a vehicle body; an elastic support member configured to support the connection terminal freely movably in a three-dimensional direction with respect to the connection opening member; and a flexible conductor configured to connect a substrate connection part of a circuit conductor stored in the storage case and the connection terminal with an extra length.
    Type: Application
    Filed: November 7, 2018
    Publication date: June 13, 2019
    Inventors: Toshiaki Yamashita, Noriaki Sasaki, Shinji Oshita, Hiroki Kawakami
  • Publication number: 20190176723
    Abstract: A circuit body routing structure includes a circuit body routed, with respect to a vehicle body having a rocker on which a center pillar is erected, along the rocker. The circuit body is formed of a long flat conductor having a conductor portion of a flat cross-sectional shape. The circuit body includes a linear portion disposed overlapping an upper surface of the rocker, and a detour portion disposed overlapping a side surface of the rocker on a vehicle interior side or a side surface of the center pillar on the vehicle interior side at a junction between the rocker and the center pillar.
    Type: Application
    Filed: November 7, 2018
    Publication date: June 13, 2019
    Inventors: Toshiaki Yamashita, Noriaki Sasaki, Shinji Oshita, Hiroki Kawakami
  • Patent number: 10307525
    Abstract: A contrast agent removing device configured to remove a contrast agent from blood vessels includes: an elongated outer tube 40; an inner tube 20 arranged in an interior of the outer tube 40; an expandable portion 30 interlocked with a distal portion of the inner tube 20 and configured to be capable of being stored within the outer tube 40 and to expand radially outward in a funnel shape opening in a distal direction by projecting from the outer tube in the distal direction; and a fixing portion 80 provided at the rim of the expandable portion 30 and configured to be capable of being fixed to a contact object.
    Type: Grant
    Filed: April 20, 2016
    Date of Patent: June 4, 2019
    Assignee: TERUMO KABUSHIKI KAISHA
    Inventors: Katsuhiko Shimizu, Keiko Yamashita, Hiroki Hosono, Yasukazu Sakamoto
  • Publication number: 20190165502
    Abstract: Provided is a flexible flat cable connector that can easily connect a flexible flat cable, and provide a reliable connection. An FFC connector (40) has a substantially L-shape in cross section and includes a plurality of busbars (41) made of metal, and a busbar case (42) made of resin and holding the busbars so that part of the plurality of busbars (41) is exposed. The busbar case (42) includes: a recessed portion (44) configured to accommodate an end portion (14b) of an FFC (14); a bottom wall (45) provided on the recessed portion (44); paired side walls (46, 46) each disposed at both ends of the recessed portion (44) and facing each other in the width direction of the FFC (14); a plurality of protruding portions (47A, 47A, . . . ) provided on the bottom wall (45); and paired projections (48, 48) projecting from the paired side walls (46, 46), facing each other, and spaced apart from the bottom wall (45).
    Type: Application
    Filed: November 21, 2018
    Publication date: May 30, 2019
    Applicants: FURUKAWA ELECTRIC CO., LTD., FURUKAWA AUTOMOTIVE SYSTEMS INC.
    Inventors: Kenji HIROKI, Kendy Rodrigo YAMASHITA
  • Publication number: 20190007100
    Abstract: A power line communication apparatus includes a drive block including an actuator control circuit and a drive circuit and a communication block. The actuator control circuit generates a control pulse for controlling an actuator, and controls a transition timing of the control pulse during an operation period set within a communication cycle by a communication clock. The drive circuit controls a driving current of the actuator supplied from a DC power source through a power line based on the control pulse in which the transition timing is controlled. The communication block generates the communication clock, and modulates a current flowing through the power line in response to data to be transmitted during a signal transmission period different from the operation period, set within the communication cycle.
    Type: Application
    Filed: January 4, 2016
    Publication date: January 3, 2019
    Inventors: Hiroki YAMASHITA, Taizo YAMAWAKI, Ming LIU, Teppei HIROTSU, Ryosuke ISHIDA, Hirofumi KURIMOTO
  • Publication number: 20180337031
    Abstract: A method of manufacturing a semiconductor device includes: providing a substrate that includes a surface exposing a first film containing silicon, oxygen, carbon and nitrogen and having an oxygen atom concentration higher than a silicon atom concentration, which is higher than a carbon atom concentration, which is equal to or higher than a nitrogen atom concentration; and changing a composition of a surface of the first film so that the nitrogen atom concentration becomes higher than the carbon atom concentration on the surface of the first film, by supplying a plasma-excited nitrogen-containing gas to the surface of the first film.
    Type: Application
    Filed: May 17, 2018
    Publication date: November 22, 2018
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Yoshitomo HASHIMOTO, Masanori NAKAYAMA, Masaya NAGATO, Tatsuru MATSUOKA, Hiroki YAMASHITA, Takafumi NITTA, Satoshi SHIMAMOTO
  • Publication number: 20180240807
    Abstract: According to one embodiment, a non-volatile memory device includes electrodes, an interlayer insulating film, at least one semiconductor layer, conductive layers, first and second insulating films. The electrodes are arranged in a first direction. The interlayer insulating film is provided between the electrodes. The semiconductor layer extends in the first direction in the electrodes and the interlayer insulating film. The conductive layers are provided between each of the electrodes and the semiconductor layer, and separated from each other in the first direction. The first insulating film is provided between the conductive layers and the semiconductor layer. The second insulating film is provided between each of the electrodes and the conductive layers, and extends between each of the electrodes and the interlayer insulating film adjacent to the each of the electrodes. A width of the conductive layers in the first direction is narrower than that of the second insulating film.
    Type: Application
    Filed: April 19, 2018
    Publication date: August 23, 2018
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventor: Hiroki YAMASHITA
  • Publication number: 20180218897
    Abstract: Provided is a technique which includes forming on a substrate an oxide film containing silicon or a metal element and doped with a dopant by performing a cycle a predetermined number of times, wherein the cycle includes sequentially and non-simultaneously performing: (a) supplying a first gas to the substrate wherein the first gas is free of chlorine and contains boron or phosphorus as the dopant; (b) supplying a second gas to the substrate wherein the second gas contains silicon or the metal element; and (c) supplying a third gas to the substrate wherein the third gas contains oxygen.
    Type: Application
    Filed: January 22, 2018
    Publication date: August 2, 2018
    Inventors: Takafumi NITTA, Yushin TAKASAWA, Satoshi SHIMAMOTO, Hiroki YAMASHITA
  • Patent number: 9978767
    Abstract: According to one embodiment, a non-volatile memory device includes electrodes, an interlayer insulating film, at least one semiconductor layer, conductive layers, first and second insulating films. The electrodes are arranged in a first direction. The interlayer insulating film is provided between the electrodes. The semiconductor layer extends in the first direction in the electrodes and the interlayer insulating film. The conductive layers are provided between each of the electrodes and the semiconductor layer, and separated from each other in the first direction. The first insulating film is provided between the conductive layers and the semiconductor layer. The second insulating film is provided between each of the electrodes and the conductive layers, and extends between each of the electrodes and the interlayer insulating film adjacent to the each of the electrodes. A width of the conductive layers in the first direction is narrower than that of the second insulating film.
    Type: Grant
    Filed: August 16, 2017
    Date of Patent: May 22, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Hiroki Yamashita
  • Patent number: 9966385
    Abstract: According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, columnar portions, and first and second interconnection portions. The stacked body includes insulating layers and electrode layers alternately stacked one layer by one layer on the substrate. The columnar portions are provided between the first and second interconnection portions and include a first row having a first columnar portion and a second row having a second columnar portion, the first columnar portion being positioned closest to the first interconnection portion, and the second columnar portion being positioned closest to the second interconnection portion. A distance between the first interconnection portion and the first columnar portion is smaller than a distance between the second interconnection portion and the second columnar portion, and the distance between the second interconnection portion and the second columnar portion is greater than 20 nanometers.
    Type: Grant
    Filed: September 12, 2016
    Date of Patent: May 8, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Hiroki Yamashita, Yoshiaki Fukuzumi
  • Patent number: 9941292
    Abstract: A semiconductor memory device includes a plurality of first electrode layers stacked in a first direction; a semiconductor layer extending in the first direction in the plurality of first electrode layers; a first insulating layer extending in the first direction along the semiconductor layer between the semiconductor layer and each of the plurality of first electrode layers; a second insulating layer covering the periphery of the plurality of first electrode layers; a resistive body provided on the second insulating layer; and a third insulating layer provided between the resistive body and the second insulating layer, the third insulating layer including the same material as the material of the first insulating layer.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: April 10, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Hiroki Yamashita
  • Patent number: 9929043
    Abstract: A semiconductor memory device according to an embodiment includes: a pair of insulating members separated from each other, the pair of insulating members extending in a first direction; a plurality of electrode films and a plurality of inter-layer insulating films disposed between the pair of insulating members and stacked alternately along a second direction, the second direction intersecting the first direction; a plurality of semiconductor pillars extending in the second direction and piercing the plurality of electrode films and the plurality of inter-layer insulating films; and a charge storage film disposed between one of the semiconductor pillars and one of the electrode films. An end portion on one of the insulating members side of a first electrode film of the electrode films is thicker than a central portion of the first electrode film between the pair of insulating members.
    Type: Grant
    Filed: February 1, 2016
    Date of Patent: March 27, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Takamasa Ito, Hiroki Yamashita
  • Publication number: 20180083280
    Abstract: The present invention provides a positive electrode active substance for a secondary cell, the positive electrode active substance capable of suppressing adsorption of water effectively in order to obtain a high-performance lithium ion secondary cell or sodium ion secondary cell. The present invention also provides a method for producing the positive electrode active substance for a secondary cell. That is, the present invention is a positive electrode active substance for a secondary cell, in which a water-insoluble electrically conductive carbon material and carbon obtained by carbonizing a water-soluble carbon material are supported on an oxide containing at least iron or manganese, the oxide represented by formula (A) LiFeaMnbMcPO4, formula (B) Li2FedMneNfSiO4, or formula (C) NaFegMnhQiPO4.
    Type: Application
    Filed: September 17, 2015
    Publication date: March 22, 2018
    Applicant: TAIHEIYO CEMENT CORPORATION
    Inventors: Hiroki YAMASHITA, Tomoki HATSUMORI, Atsushi NAKAMURA, Takaaki OGAMI
  • Publication number: 20180083285
    Abstract: The present invention provides a positive electrode active substance for a secondary cell, the positive electrode active substance capable of suppressing adsorption of water effectively in order to obtain a high-performance lithium ion secondary cell or sodium ion secondary cell. The present invention also provides a method for producing the positive electrode active substance for a secondary cell. That is, the present invention is a positive electrode active substance for a secondary cell, in which one or two selected from the group consisting of a water-insoluble electrically conductive carbon material and carbon obtained by carbonizing a water-soluble carbon material, and 0.1 to 5 mass % of a metal fluoride are supported on a compound containing at least iron or manganese, the compound represented by formula (A) LiFenMnbM1cPO4, formula (B) Li2FedMneM2fSiO4, or formula (C) NaFegMnhQiPO4.
    Type: Application
    Filed: September 17, 2015
    Publication date: March 22, 2018
    Applicant: TAIHEIYO CEMENT CORPORATION
    Inventors: Hiroki YAMASHITA, Tomoki HATSUMORI, Atsushi NAKAMURA, Takaaki OGAMI
  • Publication number: 20180053929
    Abstract: A positive electrode active substance for a secondary cell, where the positive electrode active substance is capable of suppressing adsorption of water effectively in order to obtain a high-performance lithium ion secondary cell or sodium ion secondary cell. The positive electrode active substance contains 0.3 to 5 mass % of graphite, 0.1 to 4 mass % of carbon obtained by carbonizing a water-soluble carbon material, or 0.1 to 5 mass % of a metal fluoride is supported on a composite containing a compound which contains at least iron or manganese, where the compound is represented by formula (A) LiFeaMnbMcPO4, formula (B) Li2FedMneNfSiO4, or formula (C) NaFegMnhQiPO4, and carbon obtained by carbonizing a cellulose nanofiber.
    Type: Application
    Filed: September 17, 2015
    Publication date: February 22, 2018
    Applicant: TAIHEIYO CEMENT CORPORATION
    Inventors: Hiroki YAMASHITA, Tomoki HATSUMORI, Atsushi NAKAMURA, Takaaki OGAMI
  • Publication number: 20180023116
    Abstract: The purpose of the present invention is to provide the technique of a method for preparing a highly precise single-stranded DNA that makes it possible to obtain accurate results even by a simple test in a clinical sites or the like. The invention provides a highly precise single-stranded DNA product that can be utilized even in more simple and rapid genetic analyses by taking as the detection sample a single-stranded nucleotide product amplified by ligation, preferably by cycling ligation reaction, without PCR or LCR amplification.
    Type: Application
    Filed: January 29, 2016
    Publication date: January 25, 2018
    Applicant: KURASHIKI BOSEKI KABUSHIKI KAISHA
    Inventor: Hiroki YAMASHITA
  • Publication number: 20180023127
    Abstract: The purpose of the present invention is to provide a DNA detection technique by which testing can be simply and accurately performed at clinical sites or the like. The present invention provides a gene analysis method which employs, as a detection sample, a single strand nucleotide product that is amplified by ligation, and which can be performed visually in a more simple and rapid way.
    Type: Application
    Filed: January 29, 2016
    Publication date: January 25, 2018
    Applicant: KURASHIKI BOSEKI KABUSHIKI KAISHA
    Inventors: Hiroki YAMASHITA, Kazuhiko KOGOH, Shuichi OMURA
  • Patent number: 9866185
    Abstract: The high-speed and high-quality reception operation of a transimpedance amplifier of an optical communication module and a router including the same can be achieved. A preamplifier performs current/voltage conversion with respect to intersymbol interference due to bandwidth shortage of a laser diode. A threshold control circuit which generates positive and negative threshold voltages with respect to a center potential of an output signal, latch circuits, and a selector circuit are provided to the output of the preamplifier. An NRZ signal is received as a duobinary signal based on the sign determination result of the previous bit. The determination error rate of the latch circuits can thus be improved.
    Type: Grant
    Filed: January 17, 2015
    Date of Patent: January 9, 2018
    Assignee: HITACHI, LTD.
    Inventors: Takashi Takemoto, Hiroki Yamashita
  • Publication number: 20170345838
    Abstract: According to one embodiment, a non-volatile memory device includes electrodes, an interlayer insulating film, at least one semiconductor layer, conductive layers, first and second insulating films. The electrodes are arranged in a first direction. The interlayer insulating film is provided between the electrodes. The semiconductor layer extends in the first direction in the electrodes and the interlayer insulating film. The conductive layers are provided between each of the electrodes and the semiconductor layer, and separated from each other in the first direction. The first insulating film is provided between the conductive layers and the semiconductor layer. The second insulating film is provided between each of the electrodes and the conductive layers, and extends between each of the electrodes and the interlayer insulating film adjacent to the each of the electrodes. A width of the conductive layers in the first direction is narrower than that of the second insulating film.
    Type: Application
    Filed: August 16, 2017
    Publication date: November 30, 2017
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventor: Hiroki YAMASHITA