Abstract: A quartz glass part silicon powder is plasma-sprayed onto a surface of a quartz glass substrate and thereby a coating film is formed, the quartz glass substrate is composed of opaque quartz glass a fraction of grains having a diameter of 100 ?m or larger in the silicon powder is 3% or smaller.

Abstract: A silicon wafer for preventing a void defect in a bulk region from becoming source of contamination and slip generation in a device process is provided. And a heat-treating method thereof for reducing crystal defects such as COP in a region near the wafer surface to be a device active region is provided. The silicon wafer has a surface region 1 which is a defect-free region and a bulk region 2 including void defect of a polyhedron whose basic shape is an octahedron in which a corner portion of the polyhedron is in the curved shape and an inner-wall oxide film the void defect is removed. The silicon wafer is provided by performing a heat-treating method in which gas to be supplied, inner pressure of spaces and a maximum achievable temperature are set to a predetermined value when subjecting the silicon wafer produced by a CZ method to RTP.

Abstract: According to one exemplary embodiment, a single crystal pulling-up apparatus of pulling-up silicon single crystals by a Czochralski method, is provided with: a neck diameter measuring portion which measures a diameter of a grown neck portion; a first compensation portion which outputs a first compensated pulling-up speed for the seed crystals based on a difference between a measured value of the diameter of the neck portion and a target value of the neck portion diameter previously stored; a second compensation portion which outputs a second pulling-up speed while limiting an upper limit of the first pulling-up speed to a first limit value; and a crucible rotation number compensation portion which lowers the number of a rotation of a crucible at least in a period where the upper limit of the first pulling-up speed is limited to the first limit value.

Abstract: A silicon wafer produced from a silicon single crystal ingot grown by Czochralski process is subjected to rapid heating/cooling thermal process at a maximum temperature (T1) of 1300° C. or more, but less than 1380° C. in an oxidizing gas atmosphere having an oxygen partial pressure of 20% or more, but less than 100%. The silicon wafer according to the invention has, in a defect-free region (DZ layer) including at least a device active region of the silicon wafer, a high oxygen concentration region having a concentration of oxygen solid solution of 0.7×1018 atoms/cm3 or more and at the same time, the defect-free region contains interstitial silicon in supersaturated state.

Abstract: The invention is to provide a method for heat treating a silicon wafer reducing grown-in defects while suppressing generation of slip during RTP and improving surface roughness of the wafer. The method performing a first heat treatment while introducing a rare gas, the first heat treatment comprising the steps of rapidly heating the wafer to T1 of 1300° C. or higher and the melting point of silicon or lower, keeping the wafer at T1, rapidly cooling the wafer to T2 of 400-800° C. and keeping the wafer at T2; and performing a second heat treatment while introducing an oxygen gas in an amount of 20-100 vol. %, the second heat treatment comprising the steps of keeping the wafer at T2, rapidly heating the wafer from T2 to T3 of 1250° C. or higher and the melting point of silicon or lower, keeping the wafer at T3 and rapidly cooling the wafer.

Abstract: In a method of heat treating a wafer obtained by slicing a silicon single crystal ingot manufactured by the Czochralski method, a rapid heating/cooling heat treatment is carried out by setting a holding time at an ultimate temperature of 1200° C. or more and a melting point of silicon or less to be equal to or longer than one second and to be equal to or shorter than 60 seconds in a mixed gas atmosphere containing oxygen having an oxygen partial pressure of 1.0% or more and 20% or less and argon, and an oxide film having a thickness of 9.1 nm or less or 24.3 nm or more is thus formed on a surface of the silicon wafer.

Abstract: The invention is to provide a method for heat treating a silicon wafer reducing grown-in defects while suppressing generation of slip during RTP and improving surface roughness of the wafer. The method performing a first heat treatment while introducing a rare gas, the first heat treatment comprising the steps of rapidly heating the wafer to T1 of 1300° C. or higher and the melting point of silicon or lower, keeping the wafer at T1, rapidly cooling the wafer to T2 of 400-800° C. and keeping the wafer at T2; and performing a second heat treatment while introducing an oxygen gas in an amount of 20-100 vol. %, the second heat treatment comprising the steps of keeping the wafer at T2, rapidly heating the wafer from T2 to T3 of 1250° C. or higher and the melting point of silicon or lower, keeping the wafer at T3 and rapidly cooling the wafer.

Abstract: A silicon wafer for preventing a void defect in a bulk region from becoming source of contamination and slip generation in a device process is provided. And a heat-treating method thereof for reducing crystal defects such as COP in a region near the wafer surface to be a device active region is provided. The silicon wafer has a surface region 1 which is a defect-free region and a bulk region 2 including void defect of a polyhedron whose basic shape is an octahedron in which a corner portion of the polyhedron is in the curved shape and an inner-wall oxide film the void defect is removed. The silicon wafer is provided by performing a heat-treating method in which gas to be supplied, inner pressure of spaces and a maximum achievable temperature are set to a predetermined value when subjecting the silicon wafer produced by a CZ method to RTP.

Abstract: According to one exemplary embodiment, a single crystal pulling-up apparatus of pulling-up silicon single crystals by a Czochralski method, is provided with: a neck diameter measuring portion which measures a diameter of a grown neck portion; a first compensation portion which outputs a first compensated pulling-up speed for the seed crystals based on a difference between a measured value of the diameter of the neck portion and a target value of the neck portion diameter previously stored; a second compensation portion which outputs a second pulling-up speed while limiting an upper limit of the first pulling-up speed to a first limit value; and a crucible rotation number compensation portion which lowers the number of a rotation of a crucible at least in a period where the upper limit of the first pulling-up speed is limited to the first limit value.

Abstract: In a manufacturing method for a silicon wafer, a first heat treatment process is performed on the silicon wafer while introducing a first gas having an oxygen gas in an amount of 0.01 vol. % or more and 1.00 vol. % or less and a rare gas, and a second heat treatment process is performed while stopping introducing the first gas and introducing a second gas having an oxygen gas in an amount of 20 vol. % or more and 100 vol. % or less and a rare gas. In the first heat treatment process, the silicon wafer is rapidly heated to first temperature of 1300° C. or higher and a melting point of silicon or lower at a first heating rate, and kept at the first temperature. In the second heat treatment process, the silicon wafer is kept at the first temperature, and rapidly cooled from the first temperature at a first cooling rate.

Abstract: In a method of heat treating a wafer obtained by slicing a silicon single crystal ingot manufactured by the Czochralski method, a rapid heating/cooling heat treatment is carried out by setting a holding time at an ultimate temperature of 1200° C. or more and a melting point of silicon or less to be equal to or longer than one second and to be equal to or shorter than 60 seconds in a mixed gas atmosphere containing oxygen having an oxygen partial pressure of 1.0% or more and 20% or less and argon, and an oxide film having a thickness of 9.1 nm or less or 24.3 nm or more is thus formed on a surface of the silicon wafer.

Abstract: In a manufacturing method for a silicon wafer, a first heat treatment process is performed on the silicon wafer while introducing a first gas having an oxygen gas in an amount of 0.01 vol. % or more and 1.00 vol. % or less and a rare gas, and a second heat treatment process is performed while stopping introducing the first gas and introducing a second gas having an oxygen gas in an amount of 20 vol. % or more and 100 vol. % or less and a rare gas. In the first heat treatment process, the silicon wafer is rapidly heated to first temperature of 1300° C. or higher and a melting point of silicon or lower at a first heating rate, and kept at the first temperature. In the second heat treatment process, the silicon wafer is kept at the first temperature, and rapidly cooled from the first temperature at a first cooling rate.

Abstract: A silicon wafer produced from a silicon single crystal ingot grown by Czochralski process is subjected to rapid heating/cooling thermal process at a maximum temperature (T1) of 1300° C. or more, but less than 1380° C. in an oxidizing gas atmosphere having an oxygen partial pressure of 20% or more, but less than 100%. The silicon wafer according to the invention has, in a defect-free region (DZ layer) including at least a device active region of the silicon wafer, a high oxygen concentration region having a concentration of oxygen solid solution of 0.7×1018 atoms/cm3 or more and at the same time, the defect-free region contains interstitial silicon in supersaturated state.

Abstract: A method of manufacturing a semiconductor substrate having a DSB structure that enables simplification of a manufacturing process by optimizing a total thickness of oxides on surfaces of two wafers before being bonded together is provided. The method comprises a process of preparing a first semiconductor wafer and a second semiconductor wafer, a process of bonding the first semiconductor wafer and second semiconductor wafer when a total of thickness of an oxide on the surface of the first semiconductor wafer and that of an oxide on the surface of the second semiconductor wafer is 0.4 nm or more and 1.0 nm or less, and a process of providing heat treatment to a semiconductor substrate after the process of the bonding and before a process of thinning one of the wafers.

Abstract: A semiconductor substrate whose surface roughness is reduced by optimizing an inclination (off angle) with respect to a {110} surface of the semiconductor substrate surface and a manufacturing method thereof are provided. The surface of the semiconductor substrate has the inclination (off angle) of 0 degree or more and 0.12 degrees or less, or 5 degrees or more and 11 degrees or less, preferably 6 degrees or more and 9 degrees or less with respect to the {110} surface. The manufacturing method of a semiconductor substrate has a process in which a semiconductor single crystal ingot is sliced at an inclination (off angle) of 5 degrees or more and 11 degrees or less, preferably 6 degrees or more and 9 degrees or less with respect to the {110} surface.

Abstract: A wafer inspection apparatus has a supporting means (10) for rotatably supporting a wafer (W) formed of a disk, a circumferential edge imaging means (40) for imaging a circumferential edge (S) of the wafer (W) that is supported by the supporting means for rotation, a notch imaging means (50) for imaging a notch (N), a notch illumination part (52) for illuminating the notch (N), and a control means (70) for processing image data imaged by the circumferential edge imaging means (40) and the notch imaging means (50). The circumferential edge imaging means (40) has a plurality of imaging cameras (41) for imaging a plurality of different parts in a thickness direction of the circumferential edge of the wafer (W). The different parts of the circumferential edge (S) of the wafer (W) include an apex at right angles to a surface of the wafer (W) and a front side bevel and a back side bevel inclined relative to the apex.

Abstract: A polishing head includes a head body, a first recessed portion formed in the lower surface of the head body, a support plate which can be moved up and down in the first recessed portion, a first film-like member in which a first space is formed between the upper surface of the support plate and the head body, a second recessed portion formed in a lower surface of the support plate, a second film-like member, in which a second space is formed between the second film-like member and the support plate, and which holds a wafer on the lower, a communicating hole which is formed in the support plate to communicate the first space with the second space, and a gas supply device which increases pressures in the first and second spaces with a fluid to equal pressures to bring the object into press contact with the polishing pad.

Abstract: A polishing head includes a head body, a first recessed portion formed in the lower surface of the head body, a support plate which can be moved up and down in the first recessed portion, a first film-like member in which a first space is formed between the upper surface of the support plate and the head body, a second recessed portion formed in a lower surface of the support plate, a second film-like member, in which a second space is formed between the second film-like member and the support plate, and which holds a wafer on the lower, a communicating hole which is formed in the support plate to communicate the first space with the second space, and a gas supply device which increases pressures in the first and second spaces with a fluid to equal pressures to bring the object into press contact with the polishing pad.

Abstract: The invention provides a viscoelasticity measuring device which is capable of imparting a desired displacement profile to a sample under conditions close to that of actual use. The viscoelasticity measuring device is composed of a presser to impart displacements to a sample; a rod to convey the displacements to the presser; a control jig kept in contact with an upper end portion of the rod and adapted to move to impart a desired displacement to the rod; a load cell which detects a load exerted to the sample to detect a stress generated in the sample; and a displacement sensor to detect the displacement in the sample; the displacements imparted of the sample being defined in accordance with a configuration and a moving speed of the control jig.

Abstract: A wafer inspection apparatus has a supporting means (10) for rotatably supporting a wafer (W) formed of a disk, a circumferential edge imaging means (40) for imaging a circumferential edge (S) of the wafer (W) that is supported by the supporting means for rotation, a notch imaging means (50) for imaging a notch (N), a notch illumination part (52) for illuminating the notch (N), and a control means (70) for processing image data imaged by the circumferential edge imaging means (40) and the notch imaging means (50). The circumferential edge imaging means (40) has a plurality of imaging cameras (41) for imaging a plurality of different parts in a thickness direction of the circumferential edge of the wafer (W). The different parts of the circumferential edge (S) of the wafer (W) include an apex at right angles to a surface of the wafer (W) and a front side bevel and a back side bevel inclined relative to the apex.