Patents by Inventor Hiromitsu Nakagawa

Hiromitsu Nakagawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180173576
    Abstract: An event flow system connecting nodes, for which processes are defined, from an upstream side to a downstream side by an event which is generated due to a certain process and is used by another process to realize a process flow is provided. The event flow system includes: a process flow builder configured to build a process flow using a plurality of nodes, one or more events, and a reverse event that sends a predetermined request, from a downstream node to an upstream node disposed further toward an upstream side than the downstream node; and a process flow executer configured to execute a process defined for each of the plurality of nodes according to the event and the reverse event.
    Type: Application
    Filed: November 17, 2017
    Publication date: June 21, 2018
    Applicant: HITACHI, LTD.
    Inventors: Keiro MURO, Hiromitsu NAKAGAWA
  • Publication number: 20130263156
    Abstract: In order to evaluate the service quality of an application, there are methods which acquire various types of events which occur upon a Web browser upon which an application is operating in order to analyze thereof. On this occasion, if all events are acquired/collected, a load is placed thereby upon the Web browser or a server which records the events. In the present invention, when the Web browser starts the application, a connection is made to an event handler which acquires events related to user operations or application responses. When the event handler detects the occurrence of an event, if the event has not been recorded in the past, the event is recorded as a log. In the case of another event, in case a script has been executed or in case data has been modified, the event is recorded as a log.
    Type: Application
    Filed: January 31, 2011
    Publication date: October 3, 2013
    Applicant: HITACHI, LTD.
    Inventors: Hiromitsu Nakagawa, Tomohiro Nakamura, Tomotaka Shionoya, Takao Sakurai, Yukihisa Fujita
  • Publication number: 20130198272
    Abstract: The objective of the present invention is to record the state of an application to be logged of a client at a server and to evaluate the code efficiency for each change of state so as to consistently achieve optimal code efficiency. The operational log record system (1) of the present invention is configured with a client apparatus (3) and a server apparatus (2) for storing the operational log thereof, wherein a memory device (14) of the server apparatus and a storage device (16), via a communication interface (10), store a code table generation program (104) for generating a code table on the basis of an operational log transmitted from the client apparatus (3), a code function group (500) for coding the operational log, and the program state upon the client apparatus which has been estimated on the basis of the operational log.
    Type: Application
    Filed: February 10, 2011
    Publication date: August 1, 2013
    Inventors: Tomotaka Shionoya, Hiromitsu Nakagawa, Tomohiro Nakamura, Tatsuya Sato
  • Patent number: 8352790
    Abstract: Model data is generated from performance information sorted by day of the week, time period, and process status by a performance information analysis section and a process status analysis section. An abnormality determination section detects abnormality using appropriate model data. What the graph of an expected status is like, how much the graph of the current status that has been determined abnormal differs from the graph of the expected status, and how much the current status is like the expected status are displayed allowing a system manager to observe detailed information about abnormality determination.
    Type: Grant
    Filed: February 22, 2010
    Date of Patent: January 8, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Hiromitsu Nakagawa, Yasuhide Mori, Tomohiro Nakamura, Katsuro Kikuchi
  • Publication number: 20110029817
    Abstract: Model data is generated from performance information sorted by day of the week, time period, and process status by a performance information analysis section and a process status analysis section. An abnormality determination section detects abnormality using appropriate model data. What the graph of an expected status is like, how much the graph of the current status that has been determined abnormal differs from the graph of the expected status, and how much the current status is like the expected status are displayed allowing a system manager to observe detailed information about abnormality determination.
    Type: Application
    Filed: February 22, 2010
    Publication date: February 3, 2011
    Applicant: HITACHI, LTD.
    Inventors: Hiromitsu NAKAGAWA, Yasuhide MORI, Tomohiro NAKAMURA, Katsuro KIKUCHI
  • Patent number: 7641099
    Abstract: A solder joint determination method is disclosed that is able to inspect a joint portion between an electrode and a soldered portion and determine a soldering condition of the joint portion reliably with high precision. The method includes the steps of: scanning a surface of the electrode with the light beam; detecting a height of the electrode relative to the circuit board from data of the scanning of the electrode; scanning a surface of the solder near the electrode with the light beam; detecting a height of the solder relative to the circuit board from data of the scanning of the solder; and determining the solder joint condition between the electronic part and the solder based on the height of the electrode and the height of the solder relative to the circuit board.
    Type: Grant
    Filed: July 11, 2006
    Date of Patent: January 5, 2010
    Assignee: Ricoh Company, Ltd.
    Inventors: Hiromitsu Nakagawa, Katsuhiko Mukai
  • Publication number: 20070017959
    Abstract: A solder joint determination method is disclosed that is able to inspect a joint portion between an electrode and a soldered portion and determine a soldering condition of the joint portion reliably with high precision. The method includes the steps of: scanning a surface of the electrode with the light beam; detecting a height of the electrode relative to the circuit board from data of the scanning of the electrode; scanning a surface of the solder near the electrode with the light beam; detecting a height of the solder relative to the circuit board from data of the scanning of the solder; and determining the solder joint condition between the electronic part and the solder based on the height of the electrode and the height of the solder relative to the circuit board.
    Type: Application
    Filed: July 11, 2006
    Publication date: January 25, 2007
    Inventors: Hiromitsu Nakagawa, Katsuhiko Mukai
  • Patent number: 7040526
    Abstract: A method for assembling and testing an electronic circuit baseboard includes at least a step of soldering at least one electronic part to an electronic circuit baseboard using Pb excluded solder. One of erroneous wiring, erroneous mounting, malfunction, and defective soldering of the least one electronic part is tested by contacting a probe pin to various probe pin contact sections on the electronic circuit baseboard. During the step of soldering, the Pb excluded solder is also supplied to at least one of the various probe pin contact sections in order to suppress oxidation thereof.
    Type: Grant
    Filed: September 6, 2002
    Date of Patent: May 9, 2006
    Assignee: Ricoh Company, Ltd.
    Inventors: Takashi Negishi, Katsuhiko Mukai, Hiromitsu Nakagawa
  • Publication number: 20060037991
    Abstract: A method for assembling and testing an electronic circuit baseboard includes at least a step of soldering at least one electronic part to an electronic circuit baseboard using Pb excluded solder. One of erroneous wiring, erroneous mounting, malfunction, and defective soldering of the least one electronic part is tested by contacting a probe pin to various probe pin contact sections on the electronic circuit baseboard. During the step of soldering, the Pb excluded solder is also supplied to at least one of the various probe pin contact sections in order to suppress oxidation thereof.
    Type: Application
    Filed: August 22, 2005
    Publication date: February 23, 2006
    Inventors: Takashi Negishi, Katsuhiko Mukai, Hiromitsu Nakagawa
  • Publication number: 20060000872
    Abstract: A printed circuit board inspection device is disclosed that is configured to measure the shape of a pasted solder and the shape of parts after mounting the parts in an inspection of a solder paste on a printed circuit board. This printed circuit board inspection device for a printed circuit board on which a solder paste is printed and at least one part is mounted on the solder paste, includes an inspecting section. The inspecting section calculates an amount of the solder paste not covered by an electrode of the part mounted on the solder paste based on image data captured by an imaging device, the image data showing the part mounted on the solder paste. If the calculated amount of not-covered solder paste is greater than a predetermined upper limit or smaller than a predetermined lower limit, the inspecting section determines that the solder paste is incorrectly printed.
    Type: Application
    Filed: June 16, 2005
    Publication date: January 5, 2006
    Inventors: Hiromitsu Nakagawa, Hideki Takahashi, Katsuhiko Mukai
  • Publication number: 20030042289
    Abstract: A method for assembling and testing an electronic circuit baseboard includes at least a step of soldering at least one electronic part to an electronic circuit baseboard using Pb excluded solder. One of erroneous wiring, erroneous mounting, malfunction, and defective soldering of the least one electronic part is tested by contacting a probe pin to various probe pin contact sections on the electronic circuit baseboard. During the step of soldering, the Pb excluded solder is also supplied to at least one of the various probe pin contact sections in order to suppress oxidation thereof.
    Type: Application
    Filed: September 6, 2002
    Publication date: March 6, 2003
    Inventors: Takashi Negishi, Katsuhiko Mukai, Hiromitsu Nakagawa
  • Patent number: 4152710
    Abstract: An electromagnetic cross valve is provided for selectively connecting a nozzle with an ink liquid supply conduit and an ink liquid drain conduit. When the nozzle is connected with the ink liquid drain conduit, ink liquid remains in the nozzle in such a manner that the ink liquid is filled to the tip end of the nozzle or the orifice of the nozzle.
    Type: Grant
    Filed: October 6, 1977
    Date of Patent: May 1, 1979
    Assignees: Nippon Telegraph & Telephone Public Corporation, Sharp Kabushiki Kaisha
    Inventors: Masaharu Matsuba, Kiyoshi Sugiyama, Hiromitsu Nakagawa, Hisashi Yoshimura