Abstract: A semiconductor device includes an epitaxial layer having a first conduction type, a base layer formed adjacent and on the epitaxial layer and having an opposite second conduction type to the first conduction type, a source layer formed selectively on the base layer and having the first conduction type, a trench which passes through the base layer and the source layer and which reaches the epitaxial layer, an insulation film formed along an interior wall of the trench, a control electrode formed within the trench via the insulation film, and a semiconductor region formed along the bottom part of the trench at the epitaxial layer and having the first conduction type.

Abstract: A TFT array substrate of a display device according to an embodiment of the present invention includes: a plurality of scanning signal lines formed in a display region; a plurality of display signal lines formed in the display region; a plurality of TFTs arraigned in matrix in the display region; a plurality of scanning lead-out lines arranged in a frame region formed outside the display region in accordance with the scanning signal lines; a gate insulating film formed on the plurality of scanning lead-out lines; and a first conductive layer formed on the gate insulating film and applied with a predetermined potential, the first conductive layer being formed to cover the plurality of scanning lead-out lines outside the sealing material.

Abstract: For production of plasma from a medium gas mass in an elongated shape, electric field forming elements 3, 4 that form an electric field in the medium gas mass are provided. The electric field forming elements form an electric field so that partial discharge occurs from the electric field forming elements toward both sides in the longitudinal direction of the medium gas mass. Accordingly, plasma 5 is produced from the medium gas mass. The medium gas mass is formed by, for example, gas supply members 1,2 that guide medium gas, through an internal hollow, to the electric field forming elements. An electric field forming area includes, for example, at least one high-potential electrode 3 and a voltage applying unit 4 that applies a voltage to the high-potential electrode. Plasma limited in medium gas can be produced with high energy efficiency stably over a wide range of parameters through a simple configuration.

Abstract: A liquid crystal display device according to an embodiment of the present invention includes: a wiring substrate; an opposing substrate opposite to the wiring substrate; a sealing member for bonding the wiring substrate to the opposing substrate; a liquid crystal filled in a space defined by the wiring substrate, the opposing substrate, and the sealing member; a plurality of scanning signal lines formed in a display area formed inside the sealing member; a plurality of a display signal lines formed in the display area and crossing the scanning signal lines with an insulating film interposed therebetween; and a common signal line formed outside the display area, the scanning signal lines, the scanning signal lines, and common signal line being formed on the wiring substrate, and the common signal line including at least two conductive layers with one of the conductive layers changing a pattern width below a pattern of the sealing member.

Abstract: A liquid crystal display device according to an embodiment of the present invention includes: a wiring substrate; an opposing substrate opposite to the wiring substrate; a sealing member for bonding the wiring substrate to the opposing substrate; a liquid crystal filled in a space defined by the wiring substrate, the opposing substrate, and the sealing member; a plurality of scanning signal lines formed in a display area formed inside the sealing member; a plurality of display signal lines formed in the display area and crossing the scanning signal lines with an insulating film interposed therebetween; and a common signal line formed outside the display area, the scanning signal lines, the scanning signal lines, and common signal line being formed on the wiring substrate, and the common signal line including at least two conductive layers with one of the conductive layers changing a pattern width below a pattern of the sealing member.

Abstract: A semiconductor device 1 includes a first semiconductor region 2B and a second semiconductor region 5 provided on a main surface of a substrate 2, being apart from each other and having first conductivity; a third semiconductor region 4 provided between the first semiconductor region 2B and the second semiconductor region 5 and having second conductivity opposite to the first conductivity; a fourth semiconductor region 41 provided on a main surface of the substrate 2, connected to the third semiconductor region 4, manufactured together with the third semiconductor region 4 in the same manufacturing process, and having the conductivity same as that of the third semiconductor region 4; and trenches 42 made on the main surface of the fourth semiconductor region 41 and having a depth smaller than a junction depth of the fourth semiconductor region 41.

Abstract: A semiconductor device 1 includes a square substrate 2, first RESURF structures 3 in the shape of planar stripes on an element area 10 of a main surface of the substrate 2, a transistor T arranged between the first RESURF structures 3, a first high withstand voltage section 11 constituted by second RESURF structures 3a in the shape of planar strips on a periphery of the main surface of the substrate 2, and a second high withstand voltage section 12 constituted by third RESURF structures 3b which are symmetrically arranged at corners of the substrate 2 with respect to a diagonal line D of the main surface of the substrate 2.

Abstract: The present invention provides an array substrate in which delay in signal transmission is reduced and provides a display device in which superior display quality is achieved, by using wirings of low resistivity, and moreover, by suppressing increase in wiring resistance caused by contact resistance.

Abstract: A display apparatus according to the present invention is provided with a gate line 2 formed on an insulating substrate, a source line 13 intersecting with the gate line 2 with an insulating film in between, a source electrode 6 connected to the source line 13, a drain electrode 10 connected to a pixel electrode 9, a semiconductor layer 4 formed below the source electrode 6, the source line 13, and the drain electrode 10, a light-shielding pattern 12 configured below the semiconductor layer 4 lying below the source line 13, and a backlight emitting lights from a light source to the surface of the insulating substrate opposite to where pixels are formed. In this configuration, leakage current arisen in the semiconductor layer lying below the source line, the extending pattern of the drain electrode, and so on can be suppressed.

Abstract: A TFT array substrate of a display device according to an embodiment of the present invention includes: a plurality of scanning signal lines formed in a display region; a plurality of display signal lines formed in the display region; a plurality of TFTs arraigned in matrix in the display region; a plurality of scanning lead-out lines arranged in a frame region formed outside the display region in accordance with the scanning signal lines; a gate insulating film formed on the plurality of scanning lead-out lines; and a first conductive layer formed on the gate insulating film and applied with a predetermined potential, the first conductive layer being formed to cover the plurality of scanning lead-out lines outside the sealing material.

Abstract: An image display in which a resistance value of internal wiring for inputting a signal and a power supply to a driving IC COG-packaged on an insulating substrate composing a display panel is reduced without enlarging external size of the display panel, and a method of manufacturing the image display. In internal wiring 8 for inputting a signal and a power supply to a driving IC 4 COG-packaged on a first insulating substrate 1, first layer internal wiring 8a is composed of a first conductive film forming a scanning line, etc., and second layer internal wiring 8b is composed of a second conductive film forming a signal line, etc. Connecting wiring 15 for connecting the first layer internal wiring 8a and the second layer internal wiring 8b is formed simultaneously with formation of a display electrode, and the internal wiring 8 is formed into a multi-layer structure connected electrically parallel.

Abstract: A liquid crystal display device according to an embodiment of the present invention includes: a wiring substrate; an opposing substrate opposite to the wiring substrate; a sealing member for bonding the wiring substrate to the opposing substrate; a liquid crystal filled in a space defined by the wiring substrate, the opposing substrate, and the sealing member; a plurality of scanning signal lines formed in a display area formed inside the sealing member; a plurality of display signal lines formed in the display area and crossing the scanning signal lines with an insulating film interposed therebetween; and a common signal line formed outside the display area, the scanning signal lines, the scanning signal lines, and common signal line being formed on the wiring substrate, and the common signal line including at least two conductive layers with one of the conductive layers changing a pattern width below a pattern of the sealing member.

Abstract: An image display in which a resistance value of internal wiring for inputting a signal and a power supply to a driving IC COG-packaged on an insulating substrate composing a display panel is reduced without enlarging external size of the display panel, and a method of manufacturing the image display. In internal wiring 8 for inputting a signal and a power supply to a driving IC 4 COG-packaged on a first insulating substrate 1, first layer internal wiring 8a is composed of a first conductive film forming a scanning line, etc., and second layer internal wiring 8b is composed of a second conductive film forming a signal line, etc. Connecting wiring 15 for connecting the first layer internal wiring 8a and the second layer internal wiring 8b is formed simultaneously with formation of a display electrode, and the internal wiring 8 is formed into a multi-layer structure connected electrically parallel.

Abstract: An image display in which a resistance value of internal wiring for inputting a signal and a power supply to a driving IC COG-packaged on an insulating substrate composing a display panel is reduced without enlarging external size of the display panel, and a method of manufacturing the image display. In internal wiring 8 for inputting a signal and a power supply to a driving IC 4 COG-packaged on a first insulating substrate 1, first layer internal wiring 8a is composed of a first conductive film forming a scanning line, etc., and second layer internal wiring 8b is composed of a second conductive film forming a signal line, etc. Connecting wiring 15 for connecting the first layer internal wiring 8a and the second layer internal wiring 8b is formed simultaneously with formation of a display electrode, and the internal wiring 8 is formed into a multi-layer structure connected electrically parallel.

Abstract: A display apparatus according to the present invention is provided with a gate line 2 formed on an insulating substrate, a source line 13 intersecting with the gate line 2 with an insulating film in between, a source electrode 6 connected to the source line 13, a drain electrode 10 connected to a pixel electrode 9, a semiconductor layer 4 formed below the source electrode 6, the source line 13, and the drain electrode 10, a light-shielding pattern 12 configured below the semiconductor layer 4 lying below the source line 13, and a backlight emitting lights from a light source to the surface of the insulating substrate opposite to where pixels are formed. In this configuration, leakage current arisen in the semiconductor layer lying below the source line, the extending pattern of the drain electrode, and so on can be suppressed.

Abstract: A display apparatus according to the present invention is provided with a gate line 2 formed on an insulating substrate, a source line 13 intersecting with the gate line 2 with an insulating film in between, a source electrode 6 connected to the source line 13, a drain electrode 10 connected to a pixel electrode 9, a semiconductor layer 4 formed below the source electrode 6, the source line 13, and the drain electrode 10, a light-shielding pattern 12 configured below the semiconductor layer 4 lying below the source line 13, and a backlight emitting lights from a light source to the surface of the insulating substrate opposite to where pixels are formed. In this configuration, leakage current arisen in the semiconductor layer lying below the source line, the extending pattern of the drain electrode, and so on can be suppressed.

Abstract: The present invention is directed to a liquid crystal display apparatus including: a timing circuit for operating a shift register within a timing circuit during a vertical blanking period such that a common signal that has been alternated at a cycle of a Single Horizontal period is applied on counter electrodes during the vertical blanking period and such that a storage electrode signal is applied on storage electrodes having a frequency, phase and amplitude identical to those of the common signal.

Abstract: A thin film transistor array substrate including an insulating substrate, a first metallic pattern formed on the insulating substrate, and an insulating film provided on the first metallic pattern. A semiconductor pattern is provided on the insulating film, and a second metallic pattern is provided on the semiconductor pattern. The second metallic pattern is surrounded by the semiconductor pattern.

Abstract: A display apparatus according to the present invention is provided with a gate line 2 formed on an insulating substrate, a source line 13 intersecting with the gate line 2 with an insulating film in between, a source electrode 6 connected to the source line 13, a drain electrode 10 connected to a pixel electrode 9, a semiconductor layer 4 formed below the source electrode 6, the source line 13, and the drain electrode 10, a light-shielding pattern 12 configured below the semiconductor layer 4 lying below the source line 13, and a backlight emitting lights from a light source to the surface of the insulating substrate opposite to where pixels are formed. In this configuration, leakage current arisen in the semiconductor layer lying below the source line, the extending pattern of the drain electrode, and so on can be suppressed.

Abstract: There is formed on a semiconductor substrate a lamination of a first insulating film of nondoped silicon glass or the like and, on this first insulating film, a second insulating film of boron phosphor silicate glass or the like, with a conductor layer between the two insulating films. A hole is first dry-etched in the second insulating film, leaving the substrate surface covered by the first insulating film. Then the second insulating film is heated to a reflow temperature such that the hole is thermally deformed, flaring as it extends away from the insulating film. Then a second hole is dry-etched in the first insulating film through the first recited hole in the second insulating film, with the consequent exposure of the semiconductor surface. Then a contract electrode is fabricated by filling the first and the second hole with an electroconductive material into direct contact with the substrate surface.