Abstract: A multilayer printed wiring board including an insulation layer and a first interlayer resin insulation layer provided on the insulation layer. A layered capacitor section is provided on the first interlayer resin insulation layer and has a high dielectric layer and first and second layered electrodes that sandwich the high dielectric layer. Also included is a second interlayer resin insulation layer provided on the first interlayer resin insulation layer and the layered capacitor section, and a metal thin-film layer provided over the layered capacitor section and on the second interlayer resin insulation layer. An outermost interlayer resin insulation layer is provided on the second interlayer resin insulation layer and the metal thin-film layer, and a mounting section is provided on the outermost interlayer resin insulation layer and has first and second external terminals to mount a semiconductor element. Multiple via conductors penetrate each interlayer resin insulation layer.

Abstract: A printed wiring board with a built-in resistive element comprising a first electrode formed on the surface of an insulating member, a second electrode provided adjacent to the first electrode to form a space therebetween, a resistor-filling part formed by the space between the first electrode and the second electrode, and a resistive element comprising a resistive material provided in the resistor-filling part wherein the resistor-filling part is substantially enclosed by the first electrode and the second electrode.

Abstract: A printed wiring board is manufactured by a method in which a base substrate having a first insulation layer, a second insulation layer, and a conductive film is provided. An electronic component is placed on the first insulation layer at a position determined based on an alignment mark. After the electronic component is enclosed inside an opening of the second insulation layer, a via hole exposing a terminal of the electronic component is formed at a position determined based on the alignment mark, which is used to determine the position of the electronic component. A via conductor is formed in the via hole, and a conductive layer is formed on the conductive film and patterned to form a conductive circuit connected to the via conductor.

Abstract: A printed wiring board including a wiring substrate provided with at least one conductor circuit, a solder resist layer provided on the surface of the wiring substrate, at least one conductor pad formed from a part of the conductor circuit exposed from an opening provided in the solder resist layer, and at least one solder bump for mounting electronic parts on the conductor pad. In the printed wiring board, since the at least one conductor pad is aligned at a pitch of about 200 ?m or less, and a ratio (W/D) of a diameter W of the solder bump to an opening diameter D of the opening formed in the solder resist layer is about 1.05 to about 1.7, connection reliability and insulation reliability can be easily improved.

Abstract: A printed wiring board includes a wiring substrate, one or more conductor circuits provided on the wiring substrate, a solder resist layer provided on a surface of the wiring substrate and having multiple openings, the openings exposing multiple parts of the conductor circuits forming multiple conductor pads for mounting electronic parts, and multiple solder bumps formed on the conductor pads, respectively. The conductor pads are aligned at a pitch of about 200 ?m or less, and a ratio W/D of a diameter W of the solder bumps to an opening diameter D of the openings formed in the solder resist layer is about 1.05 to about 1.7.

Abstract: A printed wiring board comprises a wiring substrate provided with at least one conductor circuit, a solder resist layer provided on the surface of the wiring substrate, at least one conductor pad formed from a part of the conductor circuit exposed from an opening provided in the solder resist layer, and at least one solder bump for mounting electronic parts on the conductor pad. In the printed wiring board, since the at least one conductor pad is aligned at a pitch of about 200 ?m or less, and a ratio (W/D) of a diameter W of the solder bump to an opening diameter D of the opening formed in the solder resist layer is about 1.05 to about 1.7, connection reliability and insulation reliability can be easily improved.

Abstract: Object An object of the present invention is to reuse unavailable excitation light without deteriorating reliability of a fiber laser. Solving Means An optical fiber emission circuit according to the present invention includes a rare earth-doped optical fiber 11 that has a first clad 22 including a plurality of layers of clads around a core 21 and emits radiation light having a wavelength longer than a wavelength of excitation light when the excitation light is made incident thereto, and a GRIN lens 12 that is fuse-bonded to an end face of the rare earth-doped optical fiber and has a refractive index distribution in a radial direction. The GRIN lens 12 has a lens length that is a value except for an integer multiple of 0.5 pitch and is provided with a reflection filter 24 that is disposed at an open end part in an axial direction and selectively reflects the wavelength of the excitation light.

Abstract: A printed wiring board includes a wiring substrate provided with at least one conductor circuit, a solder resist layer formed on the surface of the wiring substrate, covering the at least one conductor circuit, conductor pads formed on a part of the at least one conductor circuit exposed from respective openings provided in the solder resist layer for mounting electronic parts, and solder bumps formed on the respective conductor pads. Connection reliability and insulation reliability are easily improved by making the ratio (H/D) of a height H from solder resist layer surface the solder bump to an opening diameter of the opening about 0.55 to about 1.0 even in narrow pitch structure under the pitch of the opening provided in the solder resist layer of about 200 ?m or less.

Abstract: A printed wiring board is manufactured by a method in which a laminate body having a first insulation layer and a conductive film is provided. An alignment mark is formed in the laminate body by removing at least a portion of the conductive film. An electronic component is placed on an adhesive layer provided on the first insulation layer at a position determined based on the alignment mark. After the electronic component is enclosed inside an opening of the second insulation layer, a via hole exposing a terminal of the electronic component is formed at a position determined based on the alignment mark used to determine the position of the electronic component. A via conductor is formed in the via hole, and a conductive layer is formed on the conductive film and patterned to form a conductive circuit connected to the via conductor.

Abstract: A wiring board with built-in capacitors includes a core substrate, and a high dielectric sheet including a lower electrode layer, an upper electrode layer and a dielectric layer, the dielectric layer made of a sintered ceramic body and sandwiched between the lower electrode layer and the upper electrode layer, the lower electrode layer and/or the upper electrode layer being partitioned into multiple electrodes such that the high dielectric sheet has multiple capacitors. The lower electrode layer and/or the upper electrode layer is connected to a ground line and the other one of the lower electrode layer and the upper electrode layer is connected to a power line such that the capacitors are electrically connected in parallel.

Abstract: A method for manufacturing a printed wiring board including providing a structure having a wiring substrate having a conductor circuit, a build-up multilayer structure formed over the wiring substrate and having an outermost conductor circuit and an outermost insulative resin layer, and a solder resist layer formed over the outermost conductor circuit and outermost insulative resin layer and having openings with an opening diameter D for mounting electronic elements, forming conductor pads with a pitch of about 200 pm or less on the outermost conductor circuit in the openings of the solder resist layer, respectively, and forming solder bumps with a height H from a surface of the solder resist layer on the conductor pads on the conductor pads, respectively, such that a ratio H/D is about 0.55 to about 1.0.

Abstract: Laser beam irradiation areas are provided in a load curve portion and an angle adjustment portion of a suspension. The laser beam irradiation areas are oriented in a direction in which the suspension is to be bent. A laser beam having a predetermined length and a predetermined shape is irradiated onto each laser beam irradiation area.

Abstract: A printed circuit board including a conductor portion, an insulating layer formed over the conductor portion, a thin-film capacitor formed over the insulating layer and including a first electrode, a second electrode and a high-dielectric layer interposed between the first electrode and the second electrode, and a via-hole conductor structure formed through the second electrode and insulating layer and electrically connecting the second electrode and the conductor portion. The via-hole conductor structure has a first portion in the second electrode and a second portion in the insulating layer. The first portion of the via-hole conductor structure has a truncated-cone shape tapering toward the conductor portion.

Abstract: Laser beam irradiation areas are provided in a load curve portion and an angle adjustment portion of a suspension. The laser beam irradiation areas are oriented in a direction in which the suspension is to be bent. A laser beam having a predetermined length and a predetermined shape is irradiated onto each laser beam irradiation area.

Abstract: A communication terminal, in case that transmission/reception of a frame is carried out between a management terminal and another communication terminal, reads out its frame content, and on the basis of a content of the frame which was readout, sets up power off time for turning off power of the communication terminal, and turns off power of the communication terminal, during a period of the power off time. By this means, depending on a content of a frame which is transmitted/received between another communication terminal and the management terminal, power off time of the communication terminal is calculated, and therefore, it is possible to turn off power of the communication terminal during such a period that transmission/reception is not carried out to/from the management terminal, and it is possible to suppress power consumption of the communication terminal.

Abstract: An optical pumping device is provided in which a multi-core fiber obtained by bundling up a plurality of optical fibers, which are input ports, and a double clad fiber for optical pumping are spliced through a bridge fiber composed of a double clad fiber having a tapered shape. Accordingly, it is possible to efficiently couple signal light and pumping light to the double clad fiber for optical pumping.

Abstract: A fine-bubble generator is capable of supplying a fluid mixed with a large quantity of fine bubbles into a fluid without causing an unnecessary liquid flow and turbulent flow in the objective fluid. The fine-bubble generator is constructed by arranging two fine-bubble generating sections in a rectangular parallelepiped casing with spouts of the fine-bubble generating sections facing each other.

Abstract: A multilayer printed wiring board includes a mounting portion supporting a semiconductor device and a layered capacitor portion including first and second layered electrodes and a ceramic high-dielectric layer therebetween. The first layered electrode is connected to a ground line and the second layered electrode is connected to a power supply line. The ratio of number of via holes, each constituting a conducting path part electrically connecting a ground pad to the ground line of a wiring pattern and passing through the second layered electrode in non-contact, to number of ground pads is 0.05 to 0.7. The ratio of number of second rod-shaped conductors, each constituting a conducting path part electrically connecting a power supply pad to the power supply line of the wiring pattern and passing through the first layered electrode in non-contact, to number of power supply pad is 0.05 to 0.7.

Abstract: According to one embodiment, an emulation device includes a storing section that stores model information of an apparatus that can be emulated and an emulator corresponding to the model information, an obtaining section that obtains the model information of the apparatus, a detection section that detects, from the model information in the storing section, model information corresponding to the model information of the apparatus obtained by the obtaining section, and an executing section that activates an emulator of the apparatus corresponding to the detected model information.

Abstract: A method of producing a capacitor for a printed circuit board includes producing high-dielectric sheets and selecting ones of the high-dielectric sheets, which are substantially free from a defect after the heat process. Each of the high-dielectric sheets is produced by providing a first electrode, forming a first sputter film on the first electrode, forming an intermediate layer on the first sputter film by calcining a sol-gel film, forming a second sputter film on the intermediate layer, and providing a second electrode on the second sputter film. The high-dielectric sheets are subjected to a heat process in which the high-dielectric sheets are subjected to a first temperature at least once and a second temperature higher than the first temperature at least once.