Patents by Inventor Hiroshi DEMACHI

Hiroshi DEMACHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor package
    Patent number: 9635762
    Abstract: A stacked semiconductor package includes a first semiconductor package including a first circuit board and a first semiconductor device mounted on the first circuit board; a second semiconductor package including a second circuit board and a second semiconductor device mounted on the second circuit board, the second semiconductor package being stacked on the first semiconductor package; and a heat transfer member provided on the first semiconductor device and a part of the first circuit board, the part being around the first semiconductor device.
    Type: Grant
    Filed: July 20, 2015
    Date of Patent: April 25, 2017
    Assignee: J-DEVICES CORPORATION
    Inventors: Shinji Watanabe, Sumikazu Hosoyamada, Shingo Nakamura, Hiroshi Demachi, Takeshi Miyakoshi, Tomoshige Chikai, Kiminori Ishido, Hiroaki Matsubara, Takashi Nakamura, Hirokazu Honda, Yoshikazu Kumagaya, Shotaro Sakumoto, Toshihiro Iwasaki, Michiaki Tamakawa
  • Manufacturing method for semiconductor device
    Patent number: 9368474
    Abstract: A manufacturing method for a semiconductor device of the present invention includes: preparing a semiconductor wafer including an electrode formed therein; electrically connecting a first semiconductor element formed in a semiconductor chip and the electrode formed in the semiconductor wafer; filling a gap between the semiconductor wafer and the semiconductor chip with a first insulating resin layer; forming a second insulating resin layer on the semiconductor wafer; grinding the second insulating resin layer and the semiconductor chip until a thickness of the semiconductor chip reaches a predetermined thickness; forming a first insulating layer on the second insulating resin layer and the semiconductor chip; forming a line on the first insulating layer connected with a conductive material filled an opening in the first insulating layer and the second insulating resin layer to expose the electrode; and grinding the semiconductor wafer until a thickness of the semiconductor wafer reaches a predetermined thickn
    Type: Grant
    Filed: September 10, 2015
    Date of Patent: June 14, 2016
    Assignee: J-DEVICES CORPORATION
    Inventors: Hiroaki Matsubara, Tomoshige Chikai, Kiminori Ishido, Takashi Nakamura, Hirokazu Honda, Hiroshi Demachi, Yoshikazu Kumagaya, Shotaro Sakumoto, Shinji Watanabe, Sumikazu Hosoyamada, Shingo Nakamura, Takeshi Miyakoshi, Toshihiro Iwasaki, Michiaki Tamakawa
  • MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
    Publication number: 20160079204
    Abstract: A manufacturing method for a semiconductor device of the present invention includes: preparing a semiconductor wafer including an electrode formed therein; electrically connecting a first semiconductor element formed in a semiconductor chip and the electrode formed in the semiconductor wafer; filling a gap between the semiconductor wafer and the semiconductor chip with a first insulating resin layer; forming a second insulating resin layer on the semiconductor wafer; grinding the second insulating resin layer and the semiconductor chip until a thickness of the semiconductor chip reaches a predetermined thickness; forming a first insulating layer on the second insulating resin layer and the semiconductor chip; forming a line on the first insulating layer connected with a conductive material filled an opening in the first insulating layer and the second insulating resin layer to expose the electrode; and grinding the semiconductor wafer until a thickness of the semiconductor wafer reaches a predetermined thickn
    Type: Application
    Filed: September 10, 2015
    Publication date: March 17, 2016
    Inventors: Hiroaki Matsubara, Tomoshige Chikai, Kiminori Ishido, Takashi Nakamura, Hirokazu Honda, Hiroshi Demachi, Yoshikazu Kumagaya, Shotaro Sakumoto, Shinji Watanabe, Sumikazu Hosoyamada, Shingo Nakamura, Takeshi Miyakoshi, Toshihiro Iwasaki, Michiaki Tamakawa
  • SEMICONDUCTOR PACKAGE
    Publication number: 20160027715
    Abstract: A stacked semiconductor package includes a first semiconductor package including a first circuit board and a first semiconductor device mounted on the first circuit board; a second semiconductor package including a second circuit board and a second semiconductor device mounted on the second circuit board, the second semiconductor package being stacked on the first semiconductor package; and a heat transfer member provided on the first semiconductor device and a part of the first circuit board, the part being around the first semiconductor device.
    Type: Application
    Filed: July 20, 2015
    Publication date: January 28, 2016
    Inventors: Shinji WATANABE, Sumikazu HOSOYAMADA, Shingo NAKAMURA, Hiroshi DEMACHI, Takeshi MIYAKOSHI, Tomoshige CHIKAI, Kiminori ISHIDO, Hiroaki MATSUBARA, Takashi NAKAMURA, Hirokazu HONDA, Yoshikazu KUMAGAYA, Shotaro SAKUMOTO, Toshihiro IWASAKI, Michiaki TAMAKAWA