Abstract: This semiconductor device includes a first dummy terminal extending from a second conductor toward one side in a first direction, a second dummy terminal extending from a fourth conductor toward another side in the first direction, and a third dummy terminal extending from a third conductor through between a third conductive plate and a fourth conductive plate toward one side in a second direction, and connected to a second AC terminal. In a state in which ends of the first dummy terminal, the second dummy terminal, first control terminals, second control terminals, second AC terminals, first AC terminals, N terminals, and P terminals are exposed, the first conductive plate, a second conductive plate, the third conductive plate, the fourth conductive plate, first switching elements, second switching elements, a first conductor, the second conductor, the third conductor, and the fourth conductor are sealed by a resin member.

Abstract: Two semiconductor elements and a capacitive element are located at vertices of a triangle. A first shortest path between the semiconductor elements, and a second shortest path and a third shortest path between the capacitive element and the two respective semiconductor elements, satisfy (first shortest path)?(second shortest path) and ((first shortest path)2+(second shortest path)2)?(third shortest path)2.

Abstract: Two semiconductor elements and a capacitive element are located at vertices of a triangle. A first shortest path between the semiconductor elements, and a second shortest path and a third shortest path between the capacitive element and the two respective semiconductor elements, satisfy (first shortest path)?(second shortest path) and ((first shortest path)2+(second shortest path)2)?(third shortest path)2.

Abstract: Provided is a gate drive circuit and a gate drive system, with which current unevenness among power devices connected in parallel can be reduced more. A gate drive circuit includes: an objective waveform generation unit configured to generate an objective waveform; a drive waveform generation unit configured to generate a drive waveform from the objective waveform, by referring to on-timing set information and off-timing set information; a drive control unit configured to drive the power device to turn the power device on/off, based on the drive waveform; a state detection unit configured to detect the state of the power device; a predicted waveform generation unit configured to generate a predicted waveform of a voltage; and an update unit configured to update the on-timing set information and the off-timing set information, based on the result of the state detection and the result of comparison to the predicted waveform.

Abstract: Provided is a gate drive circuit and a gate drive system, with which current unevenness among power devices connected in parallel can be reduced more. A gate drive circuit includes: an objective waveform generation unit configured to generate an objective waveform; a drive waveform generation unit configured to generate a drive waveform from the objective waveform, by referring to on-timing set information and off-timing set information; a drive control unit configured to drive the power device to turn the power device on/off, based on the drive waveform; a state detection unit configured to detect the state of the power device; a predicted waveform generation unit configured to generate a predicted waveform of a voltage; and an update unit configured to update the on-timing set information and the off-timing set information, based on the result of the state detection and the result of comparison to the predicted waveform.

Abstract: In an electric power steering device assisted by a brushless motor, an induced voltage from a brushless motor is detected when a main power supply is off. The motor is determined to be in a high rpm state when the induced voltage is in a first transient state from a voltage?a high rpm detection threshold Th1 to a voltage?Th1, thereby setting an intermittent excitation cycle of a revolution angle sensor connected to the motor to a short cycle. The motor is determined to be in a low rpm state when the induced voltage becomes a voltage?a high rpm detection threshold Th2 after a wait period corresponding to an electrical angle between peaks or valleys of an output voltage has elapsed in a second transient state from a voltage?Th1 to a voltage?Th2, thereby setting the cycle to a long cycle.

Abstract: In an electric power steering device assisted by a brushless motor, an induced voltage from a brushless motor is detected when a main power supply is off. The motor is determined to be in a high rpm state when the induced voltage is in a first transient state from a voltage ?a high rpm detection threshold Th1 to a voltage?Th1, thereby setting an intermittent excitation cycle of a revolution angle sensor connected to the motor to a short cycle. The motor is determined to be in a low rpm state when the induced voltage becomes a voltage?a high rpm detection threshold Th2 after a wait period corresponding to an electrical angle between peaks or valleys of an output voltage has elapsed in a second transient state from a voltage–Th1 to a voltage?Th2, thereby setting the cycle to a long cycle.

Abstract: A synchronization detection PLL section generates an ON synchronized signal formed as a result of synchronization control based on a diode ON synthesized signal. The synchronization detection PLL section also generates an OFF synchronized signal formed as a result of synchronization control based on a diode OFF synthesized signal. A stator gate instruction generator PWM section generates a gate instruction signal for controlling the switching of a switching element on the basis of the ON synchronized signal and the OFF synchronized signal.

Abstract: A microcomputer that exercises driving control and power-generation control over a motor generator unit and a power-generation maintaining unit that, separately from the power-generation control exercised by the microcomputer, maintains a power-generation process performed by the motor generator unit are provided. While the microcomputer is operating normally, the power-generation maintaining unit allows the microcomputer to exercise the power-generation control. When an abnormality has occurred in the microcomputer, the power-generation maintaining unit acts as a backup or secondary controller to maintain the power-generation process performed by the motor generator unit, in an autonomous manner independently of the microcomputer.

Abstract: A microcomputer that exercises driving control and power-generation control over a motor generator unit and a power-generation maintaining unit that, separately from the power-generation control exercised by the microcomputer, maintains a power-generation process performed by the motor generator unit are provided. While the microcomputer is operating normally, the power-generation maintaining unit allows the microcomputer to exercise the power-generation control. When an abnormality has occurred in the microcomputer, the power-generation maintaining unit maintains the power-generation process performed by the motor generator unit, in an autonomous manner independently of the microcomputer.

Abstract: A synchronization detection PLL section generates an ON synchronized signal formed as a result of synchronization control based on a diode ON synthesized signal. The synchronization detection PLL section also generates an OFF synchronized signal formed as a result of synchronization control based on a diode OFF synthesized signal. A stator gate instruction generator PWM section generates a gate instruction signal for controlling the switching of a switching element on the basis of the ON synchronized signal and the OFF synchronized signal.

Abstract: To miniaturize and standardize an on-vehicle electronic controller by improving an input filter circuit in the device. Direct input interface circuits and a direct output interface circuit are connected to a data bus of a microprocessor, which has a nonvolatile memory for storing a control program and so on and a RAM memory for computing. ON/OFF signals inputted from indirect input interface circuits are transmitted to the RAM memory via a variable filter circuit, in which a filter constant is set by a constant setting register, and interactive serial communication circuits. A filter constant stored in the nonvolatile memory is stored in the constant setting register via the interactive serial communication circuits.

Abstract: A vehicle-mounted communication control apparatus includes: microprocessor 110a to which serial-parallel converter 117 for master station is connected; and common control circuit 120a to which serial-parallel converter 127 for substation is serial-connected to serial-parallel converter 117. The control apparatus includes first storage device 300 for storing transmission from master station to substation; distribution storage device 313 for transferring command data to device memory when command data stored in first storage device 300 is write/setting command; reply packet generation device 317 for generating up-reply information to microprocessor 110a; second storage device 320 for reading out on the principle of preceding input or preceding output while storing in order reply information and evacuating the delay; and reply packet composing device 338 for adding latest information to reply information and sending back resultant reply information.

Abstract: In a vehicle built-in electronic control apparatus, second control programs are written, second RAM memory for calculation processing and second input/output ports, and a serial-parallel converter for full duplex two-way serial communication for mutually conducting data communications between the main CPU and the sub CPU in operation of the controlled vehicle, and at the time of starting operation of the controlled vehicle, a part of the control constants stored in the first nonvolatile memory is transferred to the second RAM memory through the serial-parallel converter for the serial communication and the sub CPU performs predetermined calculation based on the contents of the second control programs of the second nonvolatile memory and the contents of the control constants transferred to the second RAM memory.

Abstract: A vehicle-mounted electronic control apparatus comprises: a main CPU including a first nonvolatile memory in which at least control programs and control constants, in correspondence with types of controlled vehicles, transmitted from an external tool are written, the main CPU including a first RAM for calculation processing; a sub CPU including a second nonvolatile memory in which programs for input/output processing are written and a second RAM for calculation processing; and a serial-parallel converter for serial communication adapted to transmit a plurality of input signals, which are input to the sub CPU, to the main CPU, wherein a plurality of filter constants corresponding to the plurality of input signals are stored in at least one of the first and second nonvolatile memory; and the sub CPU has a digital filter section adapted to perform predetermined calculation based on the filter constants to transmit a result of the calculation to the main CPU.

Abstract: A vehicle-mounted communication control apparatus includes: microprocessor 110a to which serial-parallel converter 117 for master station is connected; and common control circuit 120a to which serial-parallel converter 127 for substation is serial-connected to serial-parallel converter 117. The control apparatus includes first storage device 300 for storing transmission from master station to substation; distribution storage device 313 for transferring command data to device memory when command data stored in first storage device 300 is write/setting command; reply packet generation device 317 for generating up-reply information to microprocessor 110a; second storage device 320 for reading out on the principle of preceding input or preceding output while storing in order reply information and evacuating the delay; and reply packet composing device 338 for adding latest information to reply information and sending back resultant reply information.

Abstract: To miniaturize and standardize an on-vehicle electronic controller by improving an input filter circuit in the device. Direct input interface circuits and a direct output interface circuit are connected to a data bus of a microprocessor, which has a nonvolatile memory for storing a control program and so on and a RAM memory for computing. ON/OFF signals inputted from indirect input interface circuits are transmitted to the RAM memory via a variable filter circuit, in which a filter constant is set by a constant setting register, and interactive serial communication circuits. A filter constant stored in the nonvolatile memory is stored in the constant setting register via the interactive serial communication circuits.

Abstract: A cmmunications control system for elevators having control units including at least respective car control units and elevator hall registration control units, each of the control units having a node, the nodes being connected to each other via a network, and each of the nodes having a management table establishing correspondence between node number and network address.

Abstract: A communications control system for elevators in which synchronization instructions do not result in all units bearing data receiving loads, and smooth data transfer may be realized. A node acting as a master sends synchronization start data to one slave from among many slaves; receives synchronization completion data from the slave, and sends subsequent synchronization start data to a subsequent slave, in order; and adjusts the timing for sending synchronization start data sending so that it matches a target cycle, assuming that an interval for sending the synchronization start data is a synchronization start data sending cycle, based on: amount of time from the sending of the synchronization start data until the receiving of the synchronization completion data; an amount of time required for sending the data, being calculable from the number of sending data stored in a sending buffer until the time of sending; and a target time for the synchronization start data sending cycle.

Abstract: In a vehicle built-in electronic control apparatus, second control programs are written, second RAM memory for calculation processing and second input/output ports, and a serial-parallel converter for full duplex two-way serial communication for mutually conducting data communications between the main CPU and the sub CPU in operation of the controlled vehicle, and at the time of starting operation of the controlled vehicle, a part of the control constants stored in the first nonvolatile memory is transferred to the second RAM memory through the serial-parallel converter for the serial communication and the sub CPU performs predetermined calculation based on the contents of the second control programs of the second nonvolatile memory and the contents of the control constants transferred to the second RAM memory.