Abstract: A semiconductor device according to an embodiment includes a SiC layer having a first and a second plane, a first SiC region of a first conductivity type, second and third SiC regions of a second conductivity type provided between the first SiC region and the first plane, a fourth SiC region of the first conductivity type provided between the second SiC region and the first plane, a fifth SiC region of the first conductivity type provided between the third SiC region and the first plane, a gate electrode provided between the second SiC region and the third SiC region, a gate insulating layer, a sixth SiC region of the second conductivity type provided between the first SiC region and the second SiC region, and a seventh SiC region of the second conductivity type provided between the first SiC region and the third SiC region.

Abstract: A semiconductor device according to an embodiment includes a cell region, a gate connection region, and a cell end region between the cell region and the gate connection region. The cell region includes, an n-type first SiC region, a p-type second SiC region, a n-type third SiC region, a p-type fourth SiC region, a gate insulating film, a gate electrode, a first electrode contacting with the first and fourth SiC regions, a second electrode. The gate connection region includes a p-type fifth SiC region between the third SiC region and a field insulating film and having a peak p-type impurity concentration of 1×1018 cm?3 or more. The cell end region includes a p-type sixth SiC region connected to the fifth SiC region, a p-type seventh SiC region having a higher p-type impurity concentration than the sixth SiC region, the first electrode contacting with the sixth and seventh SiC regions.

Abstract: A semiconductor device includes first, second, third, and fourth electrodes, a first insulating film, and first, second third, and fourth silicon carbide layers. A first distance between the first electrode and a first interface between the fourth electrode and fourth silicon carbide region is longer than a second distance between the first insulating film and a second interface between the third silicon carbide region and the fourth silicon carbide region. The fourth silicon carbide region is between the third silicon carbide region and the second silicon carbide region in a direction perendicular to the second interface.

Abstract: A semiconductor device according to an embodiment includes a SiC layer having a first plane and a second plane, a gate insulating film provided on the first plane, a gate electrode provided on the gate insulating film, a first SiC region of a first conductivity type provided in the SiC layer, a second SiC region of a second conductivity type provided in the first SiC region, a third SiC region of the first conductivity type provided in the second SiC region, and a fourth SiC region of the first conductivity type provided between the second SiC region and the gate insulating film, the fourth SiC region interposed between the second SiC regions, and the fourth SiC region provided between the first SiC region and the third SiC region.

Abstract: A semiconductor device includes first and second electrodes and a silicon carbide layer located between the first and second electrodes. A plurality of gate electrodes is interposed between the first electrode and the silicon carbide layer and extends in a first direction. The silicon carbide layer includes a plurality of spaced apart openings having sidewalls and a base which extend inwardly between the gate electrodes, a first region containing a second conductivity type impurity extending around and under the openings, and a second region containing a second conductivity type impurity interposed between the portion of the first region extending under the base of the openings. The concentration of the second conductivity type impurity is greater in the second region than in the first region. The silicon carbide layer includes a third region containing a first conductivity type impurity extending inwardly of the first region from the sidewall of the openings.

Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a p-type first silicon carbide region between the first electrode and the second electrode, an n-type second silicon carbide region between the first electrode and the first silicon carbide region, a third silicon carbide region, containing an n-type impurity which is different from an n-type impurity in the second silicon carbide region, between the first electrode and the first silicon carbide region and an n-type fourth silicon carbide region between the first silicon carbide region and the second electrode. A third electrode is in the first silicon carbide region, the second silicon carbide region, and the fourth silicon carbide region and spaced therefrom by an insulating film.

Abstract: A device includes a silicon carbide layer between first and second electrodes. The silicon carbide layer includes first region, second region between the first region and second electrode, and third region between the second region and second electrode. The device includes first and second trenches, through the second and third regions and terminating within the first region, having a layer formed thereon, and spaced by portions of the second and third regions. The silicon carbide layer includes fourth region between the third region and first trench, and fifth region between the third region and second trench. The second region includes a fourth portion between first and second portions, and a fifth portion between second and third portions. The first, second, and third portions have lower impurity than the fourth and fifth portions, and the fourth and fifth portions extend closer to the first electrode than do the other portions.

Abstract: A semiconductor device according to an embodiment includes a SiC layer having a first plane and a second plane, a first SiC region of a first conductivity type which is provided in the SiC layer, first and second pillar regions of a second conductivity type, third and fourth pillar regions of a second conductivity type which are provided between the first and second pillar regions and the first plane, a gate electrode provided between the third pillar region and the fourth pillar region, first and second body regions of the second conductivity type, a gate insulating film, fifth and sixth pillar regions provided between the third and fourth pillar regions and the gate electrode, first and second source regions of the first conductivity type.

Abstract: A semiconductor device includes a semiconductor layer having a first surface and a second surface, a first electrode on the first surface, a second electrode on the second surface, a first semiconductor region of a first conductivity type in the semiconductor layer, a second semiconductor region of a second conductivity type in an element region of the semiconductor layer between the first semiconductor region and the first electrode, a third semiconductor region of the second conductivity type between the second semiconductor region and the first electrode, and a fourth semiconductor region of the second conductivity type in a termination region of the semiconductor layer inwardly of the first surface. A distance between the fourth semiconductor region and the second surface is greater than a distance between the second semiconductor region and the second surface.

Abstract: Provided is a semiconductor device according to an embodiment including: a first electrode; a second electrode; a third electrode provided between the first electrode and the second electrode; a first insulating film provided between the third electrode and the second electrode; a silicon carbide layer provided between the first insulating film and the second electrode; a first silicon carbide region provided between the third electrode and the second electrode, the first silicon carbide region being provided in the silicon carbide layer; a second silicon carbide region provided between the third electrode and the first silicon carbide region, the second silicon carbide region being provided in the silicon carbide layer; a third silicon carbide region provided between the third electrode and the second silicon carbide region, the third.

Abstract: A semiconductor device according to an embodiment includes a SiC layer having a first plane and a second plane, a first SiC region of a first conductivity type which is provided in the SiC layer, first and second pillar regions of a second conductivity type, third and fourth pillar regions of a second conductivity type which are provided between the first and second pillar regions and the first plane, a gate electrode provided between the third pillar region and the fourth pillar region, first and second body regions of the second conductivity type, a gate insulating film, fifth and sixth pillar regions provided between the third and fourth pillar regions and the gate electrode, first and second source regions of the first conductivity type.

Abstract: A method for manufacturing a semiconductor device according to an embodiment includes implanting impurity ions into a SiC layer in a direction of <10-11>±1 degrees, <10-1-1>±1 degrees, <10-12>±1 degrees, or <10-1-2>±1 degrees.

Abstract: A semiconductor device includes a SiC layer having a first surface, a gate insulating film on the first surface, a gate electrode on the gate insulating film, a first SiC region of a first conductivity type in the SiC layer, a second SiC region of a second conductivity type in the first SiC region, a third SiC region of the first conductivity type in the second SiC region, wherein a boundary between the second SiC region and the third SiC region, and the first surface forms a first angle, and a fourth SiC region of the first conductivity type in the third SiC region, having an impurity concentration of the first conductivity type higher than that of the third SiC region, wherein a boundary between the third SiC region and the fourth SiC region, and the first surface forms a second angle that is smaller than the first angle.

Abstract: A semiconductor device according to an embodiment includes a SiC layer having a first plane and a second plane, a gate insulating film provided on the first plane, a gate electrode provided on the gate insulating film, a first SiC region of a first conductivity type provided in the SiC layer, a second SiC region of a second conductivity type provided in the first SiC region, a third SiC region of the first conductivity type provided in the second SiC region, and a fourth SiC region of the first conductivity type provided between the second SiC region and the gate insulating film, the fourth SiC region interposed between the second SiC regions, and the fourth SiC region provided between the first SiC region and the third SiC region.

Abstract: A semiconductor device includes a semiconductor layer having a first surface and a second surface, a first electrode on the first surface, a second electrode on the second surface, a first semiconductor region of a first conductivity type in the semiconductor layer, a second semiconductor region of a second conductivity type in an element region of the semiconductor layer between the first semiconductor region and the first electrode, a third semiconductor region of the second conductivity type between the second semiconductor region and the first electrode, and a fourth semiconductor region of the second conductivity type in a termination region of the semiconductor layer inwardly of the first surface. A distance between the fourth semiconductor region and the second surface is greater than a distance between the second semiconductor region and the second surface.

Abstract: A semiconductor device according to an embodiment includes a first active region and a second active region. The first active region includes a n-type first source region at a first surface of the SiC substrate having the first surface and a second surface, a n-type first drain region, a first gate insulating film, a first gate electrode, a p-type second source region at the first surface and electrically connected to the first source region, a p-type second drain region, a second gate insulating film, and a second gate electrode electrically connected to the first gate electrode. The second active region includes a n-type first SiC region at the first surface and electrically connected to the second drain region, a p-type second SiC region, a n-type third SiC region, a third gate insulating film, and a third gate electrode electrically connected to the first source region and the second source region.

Abstract: A semiconductor device according to an embodiment includes a cell region, a gate connection region, and a cell end region between the cell region and the gate connection region. The cell region includes, an n-type first SiC region, a p-type second SiC region, a n-type third SiC region, a p-type fourth SiC region, a gate insulating film, a gate electrode, a first electrode contacting with the first and fourth SiC regions, a second electrode. The gate connection region includes a p-type fifth SiC region between the third SiC region and a field insulating film and having a peak p-type impurity concentration of 1×1018 cm?3 or more. The cell end region includes a p-type sixth SiC region connected to the fifth SiC region, a p-type seventh SiC region having a higher p-type impurity concentration than the sixth SiC region, the first electrode contacting with the sixth and seventh SiC regions.

Abstract: The invention provides an ultra-low-on-resistance, excellent-reliability semiconductor device that can finely be processed using SiC and a semiconductor device producing method.

Abstract: A semiconductor device includes a first electrode, a second electrode, a first semiconductor region of a first conductivity type between the first electrode and the second electrode, a plurality of second semiconductor regions of a second conductivity type selectively provided between the first semiconductor region and the second electrode, a third semiconductor region of the first conductivity type provided between each of the second semiconductor regions and the second electrode, an insulating film provided on the first semiconductor region in a location between adjacent second semiconductor regions, the second semiconductor regions, and the third semiconductor region; and a third electrode located over the insulating film, wherein a portion of the insulating film and the third electrode extend inwardly of the second semiconductor regions.

Abstract: According to one embodiment, a semiconductor device includes first electrode, second electrode, and third electrodes, first, second, third, fourth, and fifth semiconductor regions. The first semiconductor region is provided between the first and second electrodes. The second semiconductor region is provided between the first semiconductor region and the second electrode. The third semiconductor region is provided between the second semiconductor region and the second electrode. The third semiconductor region has an impurity concentration higher than an impurity concentration of the first semiconductor region. The third electrode contacts the third, second, and first semiconductor regions via an insulating film. The fourth semiconductor region is provided between the first semiconductor region and the second electrode. The fifth semiconductor region is provided between the fourth semiconductor region and the second electrode.