Abstract: A method of managing a memory area, in a data processing system, comprising providing a managing information memory area for items of in use, test done, and temporary fault of pages in a page table for managing a memory unit. In accordance with such a scheme, when a page is allocated to a program, an operation test is conducted on a page not tested, the time when the operation test has been conducted is recorded, and an operation test is again conducted on a page for which a predetermined time has passed since the last test performed thereat. Also, the values of output signals of main and sub memory modules of the data processing system are compared while the data processing system is operating, and if a difference is found, that is, non-coincidence is detected, this difference is detected as a fault by the test.

Abstract: A computer having an estimating capability estimates, where one data file is shared by a plurality of application programs, application programs to be executed when a given data file is designated, thereby simplifying user operations. The computer includes a storage device for storing history of computer operations performed by a user; a display device for displaying indications such as icons; an input device such as a mouse for selectively designating any of the icons displayed on the display device; and a control device for executing an application program when an icon corresponding to that application program is designated by the input device. In operation, the application program to be executed upon designation of a data file is altered by the control device in accordance with history of computer operations stored in the storage device.

Abstract: This invention relates to the data processing system which provides, for example, data protection in units smaller than the page or the segment in a more flexible form without causing a marked decrease in efficiency. The conventional data word array has added thereto auxiliary memory bit array and a control unit, such that when a data word is read or updated, the execution of the program is interrupted according to the value of an auxiliary memory bit and a predetermined procedure is called. In this way, the set value of the auxiliary memory bit is used to specify that the processing is to be interrupted each time a data word with the set bit value is read or written.

Abstract: A semiconductor memory IC including an address value register, an adder and an address difference signal line, wherein an address for operation of the semiconductor memory IC is specified by an address difference signal representing an increment/decrement of the address value register An optional address can be specified by an increment/decrement signal, and all memory cells can be addressed even though the number of terminals is smaller than that required for specifying an absolute value of an address, so that the semiconductor memory IC can be reduced in size. To form a semiconductor memory device by using this semiconductor memory IC, an address memory unit, an address value difference computing unit and an addressing unit are provided. When operating the memory device, a target address in the memory unit can be reached by specifying a difference between the target address and the address held in the address memory unit.

Abstract: An inference system provided with a first knowledge base for storing general knowledge which is a theorem, and a second knowledge base for storing associative knowledge which is different in knowledge structure from the above mentioned general knowledge. The associative knowledge is automatically generated from the comparison between a first proof tree where inferences have ended in failure and a second proof tree where inferences have ended in success, if inferences have ended in success by the help of information about a suggestion appended additionally when the first inferences of a problem stopped, and the associative knowledge generated will be stored in the second knowledge base thereafter.

Abstract: A nuclear reactor of the type in which fissionable material is placed as fuel in the reactor core in such a manner as to provide the most effective utilization of the material, wherein a fuel assembly is divided into three concentric regions around the core center and is loaded with fuel in such a way that if, for convenience, the regions are named the first region, second region and third region, respectively, in the order of distance from the core center, the infinite multiplication factors in these regions will be such that the factor in the third region is smaller than that in the first region and that in the first region is smaller than that in the second region.