Patents by Inventor Hiroshi Ono
Hiroshi Ono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10941365Abstract: A method is provided for producing a solid fuel to be used as fuel for a pulverized coal boiler from wood biomass as a source material at a high mass yield and calorie yield by performing a grinding treatment in a mixture with coal. A solid fuel is produced by adjusting the moisture of a ground powder of wood biomass to between 8 and 50%; densifying the ground powder of wood biomass to a bulk density of 0.55 g/cm3 or higher (measured according to JIS K 2151-6 “Bulk density test method”); and then subjecting the ground powder of wood biomass to torrefaction under conditions of an oxygen concentration of 10% or less and a temperature between 170 and 350° C. Since the bulk density of a source material is high, a trouble in conveyance such as clogging of a rotary valve at an inlet of a carbonization furnace, or clogging of a cyclone after a drier due to excessive reject can be prevented.Type: GrantFiled: September 26, 2013Date of Patent: March 9, 2021Assignee: NIPPON PAPER INDUSTRIES CO., LTD.Inventors: Hiroshi Ono, Hiroshi Shinkura, Tomonori Kawamata
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Publication number: 20210066486Abstract: According to one embodiment, a semiconductor device includes first to fourth semiconductor regions, and an insulating part. The third electrode is between the first and second electrodes in a first direction from the first electrode toward the second electrode. The first semiconductor region includes Alx1Ga1-x1N and includes first to fifth partial regions. A second direction from the first partial region toward the first electrode crosses the first direction. The second semiconductor region includes Alx2Ga1-x2N and includes sixth and seventh partial regions. The third semiconductor region includes Alx3Ga1-x3N and includes an eighth partial region between the fifth and seventh partial regions. The fourth semiconductor region includes Alx4Ga1-x4N and includes a first portion between the fifth and eighth partial regions. The fourth semiconductor region includes a first element not included the first to third semiconductor regions. The insulating part includes first to third insulating regions.Type: ApplicationFiled: February 26, 2020Publication date: March 4, 2021Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yosuke KAJIWARA, Hiroshi ONO, Jumpei TAJIMA, Toshiki HIKOSAKA, Shinya NUNOUE, Masahiko KURAGUCHI
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Patent number: 10923346Abstract: A Group III nitride semiconductor for growing a high-quality crystal having a low defect density and a method for producing the Group III nitride semiconductor. The Group III nitride semiconductor includes an RAMO4 substrate including a single crystal represented by the general formula RAMO4 (where R represents one or more trivalent elements selected from the group consisting of Sc, In, Y and lanthanoid elements, A represents one or more trivalent elements selected from the group consisting of Fe(III), Ga and Al, and M represents one or more divalent elements selected from the group consisting of Mg, Mn, Fe(II), Co, Cu, Zn and Cd); a p-type Group III nitride crystal layer disposed on the RAMO4 substrate; a plurality of n-type Group III nitride crystal layers disposed on the p-type Group III nitride crystal layer; and a Group III nitride crystal layer disposed on the n-type Group III nitride crystal layers.Type: GrantFiled: September 6, 2019Date of Patent: February 16, 2021Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Akihiko Ishibashi, Hiroshi Ono, Kenya Yamashita
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Patent number: 10916646Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor regions, and a first insulating film. The first semiconductor region includes a first partial region, a second partial region, a third partial region between the first and second partial regions, a fourth partial region between the first and third partial regions, and a fifth partial region between the third and second partial regions. The second semiconductor region includes a sixth partial region and a seventh partial region. The third electrode overlaps the sixth and seventh partial regions. The first insulating film includes a portion provided between the third electrode and the third partial region, between the third electrode and the fourth partial region, between the third electrode and the fifth partial region, between the third electrode and the sixth partial region, and between the third electrode and the seventh partial region.Type: GrantFiled: March 11, 2019Date of Patent: February 9, 2021Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Daimotsu Kato, Toshiya Yonehara, Hiroshi Ono, Yosuke Kajiwara, Masahiko Kuraguchi, Tatsuo Shimizu
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Patent number: 10910490Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to fourth semiconductor regions, a first layer including, and a first insulating layer. The first semiconductor region includes Alx1Ga1-x1N and includes first to fifth partial regions. The third partial region includes a first element including at least one selected from the group consisting of Mg, Zn, and C. The second semiconductor region includes Alx2Ga1-x2N and includes a sixth partial region and a seventh partial region. The third semiconductor region includes Alx3Ga1-x3N and includes an eighth partial region and a ninth partial region. The fourth semiconductor region includes Alx4Ga1-x4N and includes a tenth partial region and an eleventh partial region. The first layer includes AlyGa1-yN and includes a first portion provided between the third partial region and the third electrode. The first insulating layer includes a second portion provided between the first portion and the third electrode.Type: GrantFiled: September 10, 2019Date of Patent: February 2, 2021Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Masahiko Kuraguchi, Yosuke Kajiwara, Aya Shindome, Hiroshi Ono, Daimotsu Kato, Akira Mukai, Toshiki Hikosaka, Jumpei Tajima
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Publication number: 20200411675Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first nitride region, a second nitride region, and a first insulating film. The first nitride region includes Alx1Ga1-x1N. The first nitride region includes first and second partial regions, a third partial region between the first and second partial regions, a fourth partial region between the first and third partial regions, and a fifth partial region between the third and second partial regions. The second nitride region includes Alx2Ga1-x2N. The second nitride region includes sixth and seventh partial regions. The first insulating film includes a first insulating region and is between the third partial region and the third electrode. The third partial region has a first surface opposing the first insulating region. The fourth partial region has a second surface opposing the sixth partial region.Type: ApplicationFiled: March 3, 2020Publication date: December 31, 2020Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Daimotsu KATO, Yosuke KAJIWARA, Akira MUKAI, Aya SHINDOME, Hiroshi ONO, Masahiko KURAGUCHI
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Publication number: 20200373422Abstract: According to one embodiment, a semiconductor device includes first, second and third electrodes, first and second semiconductor layers, a first conductive part, first and second insulating layers. The third electrode includes first and second portions. The first portion is between the first electrode and the second electrode. The first semiconductor layer includes first, second, third, fourth and fifth partial regions. The third partial region is between the first and second partial regions. The fourth partial region is between the first and third partial regions. The fifth partial region is between the third and second partial regions. The second semiconductor layer includes first and second semiconductor regions. The first conductive part is electrically connected to the first electrode. The first insulating layer includes a first insulating portion. The second insulating layer includes first and second insulating regions.Type: ApplicationFiled: February 25, 2020Publication date: November 26, 2020Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Masahiko KURAGUCHI, Yosuke KAJIWARA, Aya SHINDOME, Hiroshi ONO, Daimotsu KATO, Akira MUKAI
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Publication number: 20200346200Abstract: An exhaust gas purification device has a metal substrate and a catalyst layer on the metal substrate, wherein the metal substrate is a wound body of one or a plurality of metal foils, at least one of the one or a plurality of metal foils is a perforated metal foil having holes, the catalyst layer contains noble metal catalyst particles and a carrier for carrying the noble metal catalyst particles, and more noble metal catalyst particles are present in the catalyst layer on side surfaces of holes, which face an upstream side of an exhaust gas flow, than in the catalyst layer on side surfaces of holes, which face a downstream side of the exhaust gas flow.Type: ApplicationFiled: September 14, 2018Publication date: November 5, 2020Applicant: CATALER CORPORATIONInventors: Kohei TAKASAKI, Yuji MATSUHISA, Nobuaki BANDO, Hiroshi ONO, Tomohito MIZUKAMI, Tsuyoshi ITO
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Publication number: 20200335587Abstract: According to one embodiment, a semiconductor device includes first, second and third electrodes, first and second semiconductor layers, and a first compound member. A position of the third electrode is between a position of the second electrode and a position of the first electrode. The first semiconductor layer includes first, second, third, fourth, and fifth partial regions. The fourth partial region is between the third and first partial regions. The fifth partial region is between the second and third partial regions. The second semiconductor layer includes first, second, and third semiconductor regions. The third semiconductor region is between the first partial region and the first electrode. The first compound member includes first compound portions between the third semiconductor region and the first electrode. A portion of the first electrode is between one of the first compound portions and an other one of the first compound portions.Type: ApplicationFiled: February 11, 2020Publication date: October 22, 2020Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Hiroshi ONO, Akira MUKAI, Yosuke KAJIWARA, Daimotsu KATO, Aya SHINDOME, Masahiko KURAGUCHI
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Publication number: 20200332194Abstract: The purpose of the present invention is to provide: elements, in particular, a display element and an optical element, which are obtained by controlling orientation of liquid crystals in a liquid crystal bulk without using a liquid crystal orientation film; and/or a photoreactive liquid crystal composition for manufacturing the elements. The present invention provides: a photoreactive liquid crystal composition comprising (A) a photoreactive polymer liquid crystal which includes a photoreactive side chain in which at least one type of reaction selected from the group consisting of (A-1) photocrosslinking and (A-2) photoisomerization occurs, and (B) a low molecular weight liquid crystal; and an optical element or display element which is formed having a liquid crystal cell including the composition.Type: ApplicationFiled: July 7, 2020Publication date: October 22, 2020Applicants: UNIVERSITY OF HYOGO, NAGAOKA UNIVERSITY OF TECHNOLOGY, NISSAN CHEMICAL INDUSTRIES, LTD.Inventors: Tomoyuki SASAKI, Hiroshi ONO, Nobuhiro KAWATSUKI, Kohei GOTO
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Publication number: 20200328279Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor layer, a second semiconductor layer, and a first insulating layer. A position of the third electrode in a first direction is between a position of the first electrode in the first direction and a position of the second electrode in the first direction. The first semiconductor layer includes Alx1Ga1-x1N and includes a first partial region, a second partial region, and a third partial region. The second semiconductor layer includes Alx2Ga1-x2N. A portion of the second semiconductor layer is between the third partial region and the third electrode in the second direction. The first insulating layer includes a first insulating region. The first insulating region is between the third electrode and the portion of the second semiconductor layer in the second direction.Type: ApplicationFiled: February 25, 2020Publication date: October 15, 2020Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Toshiki HIKOSAKA, Hiroshi ONO, Jumpei TAJIMA, Masahiko KURAGUCHI, Shinya NUNOUE
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Patent number: 10796921Abstract: The CMP polishing liquid for polishing palladium of this invention comprises an organic solvent, 1,2,4-triazole, a phosphorus acid compound, an oxidizing agent and an abrasive. The substrate polishing method is a method for polishing a substrate with a polishing cloth while supplying a CMP polishing liquid between the substrate and the polishing cloth, wherein the substrate is a substrate with a palladium layer on the side facing the polishing cloth, and the CMP polishing liquid is a CMP polishing liquid comprising an organic solvent, 1,2,4-triazole, a phosphorus acid compound, an oxidizing agent and an abrasive.Type: GrantFiled: February 5, 2010Date of Patent: October 6, 2020Assignee: HITACHI CHEMICAL COMPANY, LTD.Inventors: Hisataka Minami, Ryouta Saisyo, Jin Amanokura, Yuuhei Okada, Hiroshi Ono
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Publication number: 20200304675Abstract: An optical scanning device includes a controller, and a scanning unit connected with the controller via a signal line. The scanning unit includes a semiconductor laser having light emitting elements, an optical system configured to convert light emitted by each light emitting element into a beam, a deflector configured to deflect the beam received through the optical system, and a shift register including a plurality of output terminals each configured to output a light emission signal for controlling light emission from a corresponding one of the light emitting elements, and an input terminal configured to receive a shift signal from the controller via the signal line. The shift register is configured to, each time receiving the shift signal via the input terminal, shift a specific output terminal to output the light emission signal from one output terminal to another in sequence among the plurality of output terminals.Type: ApplicationFiled: March 10, 2020Publication date: September 24, 2020Applicant: Brother Kogyo Kabushiki KaishaInventors: Takato Mori, Hiroshi Ono, Kunihiro Amano
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Patent number: 10784834Abstract: A multilayer LC filter array includes an element body of a rectangular parallelepiped shape, a first filter including a first inductor and a first capacitor, a second filter including a second inductor and a second capacitor, a first input terminal electrode and a first output terminal electrode that are connected to the first inductor, a second input terminal electrode and a second output terminal electrode that are connected to the second inductor, and a ground terminal electrode that is connected to the first capacitor and the second capacitor. The element body includes a principal surface. The ground terminal electrode is disposed at a center of the principal surface. The first input terminal electrode, the first output terminal electrode, the second input terminal electrode, and the second output terminal electrode are disposed at respective different corner portions of the element body when viewed from a direction orthogonal to the principal surface.Type: GrantFiled: August 21, 2017Date of Patent: September 22, 2020Assignee: TDK CORPORATIONInventors: Akihiko Oide, Naoki Uchida, Yoji Tozawa, Makoto Yoshino, Seiichi Nakagawa, Shinichi Sato, Hiroshi Ono, Takashi Endo
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Publication number: 20200295169Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to third nitride regions, and first and second insulating films. The first nitride region includes AlxiGai-x1N, and includes first and second partial regions, a third partial region between the first and second partial regions, a fourth partial region between the first and third partial regions, and a fifth partial region between the third and second partial regions. The first nitride region includes first to fifth partial regions. The second nitride region includes Alx2Ga1-x2N, and sixth and seventh partial regions. At least a portion of the third electrode is between the sixth and seventh partial regions. The first insulating film includes silicon and oxygen and includes first and second insulating regions. The third nitride region includes Alx3Ga1-x3N, and first to seventh portions. The second insulating film includes silicon and oxygen and includes third to seventh insulating regions.Type: ApplicationFiled: September 12, 2019Publication date: September 17, 2020Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Daimotsu KATO, Yosuke Kajiwara, Akira Mukai, Aya Shindome, Hiroshi Ono, Masahiko Kuraguchi
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Patent number: 10752839Abstract: A photoreactive liquid crystal composition containing (A) a photoreactive polymer liquid crystal which includes a photoreactive side chain in which at least one type of reaction selected from (A-1) photocrosslinking and (A-2) photoisomerization occurs, and (B) a low molecular weight liquid crystal. An optical element or display element is formed having a liquid crystal cell including the photoreactive liquid crystal composition.Type: GrantFiled: August 29, 2014Date of Patent: August 25, 2020Assignees: UNIVERSITY OF HYOGO, NAGAOKA UNIVERISTY OF TECHNOLOGY, NISSAN CHEMICAL INDUSTRIES, LTD.Inventors: Tomoyuki Sasaki, Hiroshi Ono, Nobuhiro Kawatsuki, Kohei Goto
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Patent number: 10714608Abstract: According to one embodiment, a semiconductor device includes first and second regions, a first insulating portion, and first, second, and third electrodes. The first region includes first and second partial regions, and a third partial region between the first and second partial regions. The second region includes fourth and fifth partial regions. The fourth partial region overlaps the first partial region. The fifth partial region overlaps the second partial region. The first insulating portion includes first, second, and third insulating regions. The first insulating region is provided between the second insulating region and the third partial region and between the third insulating region and the third partial region. The first electrode is electrically connected to the fourth partial region. The second electrode is away from the first electrode and is electrically connected to the fifth partial region. The third electrode is provided between the first and second electrodes.Type: GrantFiled: March 5, 2019Date of Patent: July 14, 2020Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Masahiko Kuraguchi, Yosuke Kajiwara, Aya Shindome, Hiroshi Ono, Daimotsu Kato, Akira Mukai
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Publication number: 20200220003Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first to fourth semiconductor regions, a first layer including, and a first insulating layer. The first semiconductor region includes Alx1Ga1-x1N and includes first to fifth partial regions. The third partial region includes a first element including at least one selected from the group consisting of Mg, Zn, and C. The second semiconductor region includes Alx2Ga1-x2N and includes a sixth partial region and a seventh partial region. The third semiconductor region includes Alx3Ga1-x3N and includes an eighth partial region and a ninth partial region. The fourth semiconductor region includes Alx4Ga1-x4N and includes a tenth partial region and an eleventh partial region. The first layer includes AlyGa1-yN and includes a first portion provided between the third partial region and the third electrode. The first insulating layer includes a second portion provided between the first portion and the third electrode.Type: ApplicationFiled: September 10, 2019Publication date: July 9, 2020Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Masahiko Kuraguchi, Yosuke Kajiwara, Aya Shindome, Hiroshi Ono, Daimotsu Kato, Akira Mukai, Toshiki Hikosaka, Jumpei Tajima
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Publication number: 20200172362Abstract: An image forming apparatus includes a main body, a sheet cassette attachable to the main body and configured to support one or more sheets to be supplied to the image forming unit, and a controller. The main body includes an electrode movable relative to the main body, a capacitance detector configured to output a signal indicating a value corresponding to a quantity of electricity stored in the electrode, and a wire. The sheet cassette includes a metal member, and a sheet supporting plate made of metal, movable relative to the sheet cassette in an up-down direction, and configured to support one or more sheets from below. The controller is configured to determine whether the sheet cassette is at an installation position in the main body from a level of the value of the signal outputted from the capacitance detector connected to the electrode via the wire.Type: ApplicationFiled: November 26, 2019Publication date: June 4, 2020Applicant: Brother Kogyo Kabushiki KaishaInventor: Hiroshi ONO
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Patent number: 10656521Abstract: A photosensitive resin composition comprises: a resin having a phenolic hydroxyl group; a photosensitive acid generator; a compound having at least one selected from the group consisting of an aromatic ring, a heterocycle and an alicycle, and at least one selected from the group consisting of a methylol group and an alkoxyalkyl group; and an aliphatic compound having two or more functional groups, the functional groups being at least one functional group selected from the group consisting of an acryloyloxy group, a methacryloyloxy group, a glycidyloxy group, an oxetanyl alkyl ether group, a vinyl ether group and a hydroxyl group, wherein the photosensitive acid generator is a sulfonium salt containing an anion having at least one skeleton selected from the group consisting of a tetraphenylborate skeleton, an alkylsulfonate skeleton having 1 to 20 carbon atoms, a phenylsulfonate skeleton and a 10-camphorsulfonate skeleton.Type: GrantFiled: November 25, 2015Date of Patent: May 19, 2020Assignee: HITACHI CHEMICAL COMPANY, LTD.Inventors: Tetsuya Kato, Kenichi Iwashita, Akihiro Nakamura, Akio Nakano, Hiroshi Ono