Patents by Inventor Hiroshige Okamura

Hiroshige Okamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150142558
    Abstract: A content distribution system includes a content storage part that stores at least information, which corresponds to a subarea inside a specific area as content, a sales volume information-acquiring part that acquire sales volume information, a sales volume information storage part that stores the sales volume information, a distribution request-receiving part that receives a distribution request for a content, a distribution permission-determining part that determines whether a distribution of a content is permitted, a content-selecting part that selects the content to be distributed to the mobile electronic device, a content-distributing part that distributes the selected content, a distribution performance storage part, and a contribution point-calculating part that calculates a contribution point of the content distribution service.
    Type: Application
    Filed: January 29, 2015
    Publication date: May 21, 2015
    Applicant: NIKON CORPORATION
    Inventors: Kaori SUZUKI, Takeshi YAGI, Hiroshige OKAMURA
  • Patent number: 7256718
    Abstract: The present invention pertains to a modulation apparatus and method in which the modulation apparatus is realized with a simple circuit structure and is easily applicable to other systems. A pattern conversion unit 32 converts data having a basic data length of 2 bits supplied from a DSV control bit determination and insertion unit 31 into a variable-length code having a basic code length of 3 bits in accordance with a conversion table. A minimum-run-length limitation code detection unit 33 detects, from a data sequence containing a DSV control bit, the position of minimum runs consecutive from a channel bit string converted by the pattern conversion unit 32. A consecutive-minimum-run replacement unit 34 replaces a predetermined portion of the channel bit string supplied from the pattern conversion unit 32 for a predetermined pattern based on the position information supplied from the minimum-run-length limitation code detection unit 33, and limits the minimum run length to a predetermined number or less.
    Type: Grant
    Filed: January 15, 2003
    Date of Patent: August 14, 2007
    Assignee: Sony Corporation
    Inventors: Toshiyuki Nakagawa, Hiroshige Okamura, Minoru Tobita
  • Patent number: 7120105
    Abstract: The present invention is associated with a recording medium in which, to a data part constituted by frames obtained by attaching a synchronous signal to the data divided by a predetermined data length, data having a preamble part and a postamble part attached with at least one synchronous signal having a pattern different from that of the synchronous signal attached to the data part are recorded, a reproducing apparatus for reproducing this recording medium, and a recording apparatus for recording data to this recording medium.
    Type: Grant
    Filed: March 7, 2003
    Date of Patent: October 10, 2006
    Assignee: Sony Corporation
    Inventors: Hiroshige Okamura, Toshiyuki Nakagawa, Takanori Takemoto
  • Patent number: 6982660
    Abstract: A modulation apparatus and method for more accurately determining a value of a control bit to be inserted into a data sequence and digital sum value (DSV) control bit generating method in which a data conversion unit supplies modulation-delimiter information including information regarding delimiters of modulation of a data sequence based on a conversion table to a modulation-delimiter detecting unit and supplies to a valid-delimiter detecting unit a DSV-segment-delimiter signal including information regarding a delimiter position of a DSV segment of the data sequence having the DSV control bit. The modulation-delimiter detecting unit detects modulation-delimiter positions based on the modulation-delimiter information supplied thereto and supplies a modulation-delimiter signal to the valid-delimiter detecting unit.
    Type: Grant
    Filed: April 7, 2005
    Date of Patent: January 3, 2006
    Assignee: Sony Corporation
    Inventors: Toshiyuki Nakagawa, Minoru Tobita, Hiroshige Okamura
  • Patent number: 6965329
    Abstract: A modulation apparatus and method for more accurately determining a value of a control bit to be inserted into a data sequence and digital sum value (DSV) control bit generating method in which a data conversion unit supplies modulation-delimiter information including information regarding delimiters of modulation of a data sequence based on a conversion table to a modulation-delimiter detecting unit and supplies to a valid-delimiter detecting unit a DSV-segment-delimiter signal including information regarding a delimiter position of a DSV segment of the data sequence having the DSV control bit. The modulation-delimiter detecting unit detects modulation-delimiter positions based on the modulation-delimiter information supplied thereto and supplies a modulation-delimiter signal to the valid-delimiter detecting unit.
    Type: Grant
    Filed: April 7, 2005
    Date of Patent: November 15, 2005
    Assignee: Sony Corporation
    Inventors: Toshiyuki Nakagawa, Minoru Tobita, Hiroshige Okamura
  • Patent number: 6958713
    Abstract: A modulation apparatus and method for more accurately determining a value of a control bit to be inserted into a data sequence and digital sum value (DSV) control bit generating method in which a data conversion unit supplies modulation-delimiter information including information regarding delimiters of modulation of a data sequence based on a conversion table to a modulation-delimiter detecting unit and supplies to a valid-delimiter detecting unit a DSV-segment-delimiter signal including information regarding a delimiter position of a DSV segment of the data sequence having the DSV control bit. The modulation-delimiter detecting unit detects modulation-delimiter positions based on the modulation-delimiter information supplied thereto and supplies a modulation-delimiter signal to the valid-delimiter detecting unit.
    Type: Grant
    Filed: April 7, 2005
    Date of Patent: October 25, 2005
    Assignee: Sony Corporation
    Inventors: Toshiyuki Nakagawa, Minoru Tobita, Hiroshige Okamura
  • Patent number: 6950042
    Abstract: The present invention relates to a modulation apparatus and method and a DSV-control-bit generating method for suppressing an increase in circuit size of the modulation apparatus. When an input data stream is supplied to a DSV control bit determination unit 31, the DSV control bit determination unit 31 determines a DSV control bit to be inserted into the input data stream. Upon supplying the input data stream to the DSV control bit determination unit 31, the input data stream is simultaneously supplied to a delay processor 32. The input data stream is delayed for a predetermined delay time and supplied to a determined-DSV-control-bit insertion unit 33. The determined-DSV-control-bit insertion unit 33 inserts the DSV control bit determined by the DSV control bit determination unit 31 into a predetermined position of the input data stream supplied by the delay means and supplies the input data stream containing the DSV control bit to a modulator 34.
    Type: Grant
    Filed: December 10, 2002
    Date of Patent: September 27, 2005
    Assignee: Sony Corporation
    Inventors: Toshiyuki Nakagawa, Hiroshige Okamura, Minoru Tobita
  • Publication number: 20050174265
    Abstract: A modulation apparatus and method for more accurately determining a value of a control bit to be inserted into a data sequence and digital sum value (DSV) control bit generating method in which a data conversion unit supplies modulation-delimiter information including information regarding delimiters of modulation of a data sequence based on a conversion table to a modulation-delimiter detecting unit and supplies to a valid-delimiter detecting unit a DSV-segment-delimiter signal including information regarding a delimiter position of a DSV segment of the data sequence having the DSV control bit. The modulation-delimiter detecting unit detects modulation-delimiter positions based on the modulation-delimiter information supplied thereto and supplies a modulation-delimiter signal to the valid-delimiter detecting unit.
    Type: Application
    Filed: April 7, 2005
    Publication date: August 11, 2005
    Inventors: Toshiyuki Nakagawa, Minoru Tobita, Hiroshige Okamura
  • Publication number: 20050174267
    Abstract: The present invention relates to a modulation apparatus and method for more accurately determining a value of a control bit to be inserted into a data sequence, and to a DSV-control-bit generating method. A 1-7 PP data conversion unit 52 supplies modulation-delimiter information including information regarding delimiters of modulation of a data sequence based on a conversion table based on Table 3 to a modulation-delimiter detecting unit 81, and supplies to a valid-delimiter detecting unit 81 a DSV-segment-delimiter signal including information regarding a delimiter position of a DSV segment of the data sequence including the DSV control bit inserted. The modulation-delimiter detecting unit 81 detects modulation-delimiter positions based on the modulation-delimiter information supplied thereto, and supplies a modulation-delimiter signal to the valid-delimiter detecting unit 82.
    Type: Application
    Filed: April 7, 2005
    Publication date: August 11, 2005
    Inventors: Toshiyuki Nakagawa, Minoru Tobita, Hiroshige Okamura
  • Publication number: 20050174266
    Abstract: A modulation apparatus and method for more accurately determining a value of a control bit to be inserted into a data sequence and digital sum value (DSV) control bit generating method in which a data conversion unit supplies modulation-delimiter information including information regarding delimiters of modulation of a data sequence based on a conversion table to a modulation-delimiter detecting unit and supplies to a valid-delimiter detecting unit a DSV-segment-delimiter signal including information regarding a delimiter position of a DSV segment of the data sequence having the DSV control bit. The modulation-delimiter detecting unit detects modulation-delimiter positions based on the modulation-delimiter information supplied thereto and supplies a modulation-delimiter signal to the valid-delimiter detecting unit.
    Type: Application
    Filed: April 7, 2005
    Publication date: August 11, 2005
    Inventors: Toshiyuki Nakagawa, Minoru Tobita, Hiroshige Okamura
  • Patent number: 6914544
    Abstract: A modulation apparatus and method for more accurately determining a value of a control bit to be inserted into a data sequence and digital sum value (DSV) control bit generating method in which a data conversion unit supplies modulation-delimiter information including information regarding delimiters of modulation of a data sequence based on a conversion table to a modulation-delimiter detecting unit and supplies to a valid-delimiter detecting unit a DSV-segment-delimiter signal including information regarding a delimiter position of a DSV segment of the data sequence having the DSV control bit. The modulation-delimiter detecting unit detects modulation-delimiter positions based on the modulation-delimiter information supplied thereto and supplies a modulation-delimiter signal to the valid-delimiter detecting unit.
    Type: Grant
    Filed: January 22, 2003
    Date of Patent: July 5, 2005
    Assignee: Sony Corporation
    Inventors: Toshiyuki Nakagawa, Minoru Tobita, Hiroshige Okamura
  • Publication number: 20050017881
    Abstract: The present invention relates to a modulation apparatus and method and a DSV-control-bit generating method for suppressing an increase in circuit size of the modulation apparatus. When an input data stream is supplied to a DSV control bit determination unit 31, the DSV control bit determination unit 31 determines a DSV control bit to be inserted into the input data stream. Upon supplying the input data stream to the DSV control bit determination unit 31, the input data stream is simultaneously supplied to a delay processor 32. The input data stream is delayed for a predetermined delay time and supplied to a determined-DSV-control-bit insertion unit 33. The determined-DSV-control-bit insertion unit 33 inserts the DSV control bit determined by the DSV control bit determination unit 3.1 into a predetermined position of the input data stream supplied by the delay means and supplies the input data stream containing the DSV control bit to a modulator 34.
    Type: Application
    Filed: December 10, 2002
    Publication date: January 27, 2005
    Inventors: Toshiyuki Nakagawa, Hiroshige Okamura, Minoru Tobita
  • Publication number: 20040130467
    Abstract: The present invention pertains to a modulation apparatus and method in which the modulation apparatus is realized with a simple circuit structure and is easily applicable to other systems. A pattern conversion unit 32 converts data having a basic data length of 2 bits supplied from a DSV control bit determination and insertion unit 31 into a variable-length code having a basic code length of 3 bits in accordance with a conversion table. A minimum-run-length limitation code detection unit 33 detects, from a data sequence containing a DSV control bit, the position of minimum runs consecutive from a channel bit string converted by the pattern conversion unit 32. A consecutive-minimum-run replacement unit 34 replaces a predetermined portion of the channel bit string supplied from the pattern conversion unit 32 for a predetermined pattern based on the position information supplied from the minimum-run-length limitation code detection unit 33, and limits the minimum run length to a predetermined number or less.
    Type: Application
    Filed: February 10, 2004
    Publication date: July 8, 2004
    Inventors: Toshiyuki Nakagawa, Hiroshige Okamura, Minoru Tobita
  • Publication number: 20040125002
    Abstract: The present invention relates to a modulation apparatus and method for more accurately determining a value of a control bit to be inserted into a data sequence, and to a DSV-control-bit generating method. A 1-7 PP data conversion unit 52 supplies modulation-delimiter information including information regarding delimiters of modulation of a data sequence based on a conversion table based on Table 3 to a modulation-delimiter detecting unit 81, and supplies to a valid-delimiter detecting unit 81 a DSV-segment-delimiter signal including information regarding a delimiter position of a DSV segment of the data sequence including the DSV control bit inserted. The modulation-delimiter detecting unit 81 detects modulation-delimiter positions based on the modulation-delimiter information supplied thereto, and supplies a modulation-delimiter signal to the valid-delimiter detecting unit 82.
    Type: Application
    Filed: February 17, 2004
    Publication date: July 1, 2004
    Inventors: Toshiyuki Nakagawa, Minoru Tobita, Hiroshige Okamura
  • Publication number: 20030174625
    Abstract: The present invention is associated with a recording medium in which, to a data part constituted by frames obtained by attaching a synchronous signal to the data divided by a predetermined data length, data having a preamble part and a postamble part attached with at least one synchronous signal having a pattern different from that of the synchronous signal attached to the data part are recorded, a reproducing apparatus for reproducing this recording medium, and a recording apparatus for recording data to this recording medium.
    Type: Application
    Filed: March 7, 2003
    Publication date: September 18, 2003
    Applicant: Sony Corporation
    Inventors: Hiroshige Okamura, Toshiyuki Nakagawa, Takanori Takemoto
  • Patent number: 5818805
    Abstract: Digital information is recorded with high density. Positions of a leading edge and a trailing edge of an information pit are shifted from a reference position indicated by a leading edge of a reference clock in a step-wise fashion in respond to digital data to be recorded.
    Type: Grant
    Filed: October 17, 1995
    Date of Patent: October 6, 1998
    Assignee: Sony Corporation
    Inventors: Seiji Kobayashi, Hiroshige Okamura, Hisayuki Yamatsu, Toshiyuki Kashiwagi
  • Patent number: 5809004
    Abstract: In an information recording medium from which information recorded on each pit is reproduced by an optical detection system that obtains a reproduced signal corresponding to each pit by scanning the information recording medium along pit rows by a light beam, data of high recording density can be accurately reproduced by a simple arrangement by shifting in a step-wise fashion edge positions of an information pit from a predetermined reference position in response to digital information to be recorded within a range corresponding to a predetermined shift period smaller than a transition period of a reproduced signal determined in response to a transfer characteristic of the optical detection system. Therefore, a nonlinear intersymbol interference can be reduced without emphasizing a noise component.
    Type: Grant
    Filed: May 13, 1996
    Date of Patent: September 15, 1998
    Assignee: Sony Corporation
    Inventors: Seiji Kobayashi, Hiroshige Okamura, Hisayuki Yamatsu
  • Patent number: 5748582
    Abstract: Digital information is recorded with high density. Positions of a leading edge and a trailing edge of an information pit are shifted from a reference position indicated by a leading edge of a reference clock in a step-wise fashion in response to digital data to be recorded.
    Type: Grant
    Filed: October 8, 1996
    Date of Patent: May 5, 1998
    Assignee: Sony Corporation
    Inventors: Seiji Kobayashi, Hiroshige Okamura, Hisayuki Yamatsu, Toshiyuki Kashiwagi
  • Patent number: 5724330
    Abstract: Digital information is recorded with high density. Positions of a leading edge and a trailing edge of an information pit are shifted from a reference position indicated by a leading edge of a reference clock in a step-wise fashion in response to digital data to be recorded.
    Type: Grant
    Filed: March 12, 1997
    Date of Patent: March 3, 1998
    Assignee: Sony Corporation
    Inventors: Seiji Kobayashi, Hiroshige Okamura, Hisayuki Yamatsu, Toshiyuki Kashiwagi
  • Patent number: 5615193
    Abstract: In an information recording medium from which information recorded on each pit is reproduced by an optical detection system that obtains a reproduced signal corresponding to each pit by scanning the information recording medium along pit rows by a light beam, data of high recording density can be accurately reproduced by a simple arrangement by shifting in a step-wise fashion edge positions of an information pit from a predetermined reference position in response to digital information to be recorded within a range corresponding to a predetermined shift period smaller than a transition period of a reproduced signal determined in response to a transfer characteristic of the optical detection system. Therefore, a nonlinear intersymbol interference can be reduced without emphasizing a noise component.
    Type: Grant
    Filed: May 31, 1995
    Date of Patent: March 25, 1997
    Assignee: Sony Corporation
    Inventors: Seiji Kobayashi, Hiroshige Okamura, Hisayuki Yamatsu