Patents by Inventor Hiroto Yamagiwa

Hiroto Yamagiwa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230361179
    Abstract: A nitride semiconductor device includes: a first active area surrounded by an isolation area; and the following electrodes above the first active area: a source electrode; a first gate electrode and a second gate electrode, one on either side of and spaced from the source electrode in a first direction in plan view; and at least one drain electrode located in a direction opposite the source electrode relative to the first gate electrode or the second gate electrode. The source electrode, the first gate electrode, the second gate electrode, and the at least one drain electrode each include a finger-shaped portion extending in a second direction perpendicular to the first direction in the plan view. A first dielectric film is disposed above the source electrode. The first gate electrode and the second gate electrode are electrically connected by a gate electrode joiner disposed above the first dielectric film.
    Type: Application
    Filed: August 16, 2021
    Publication date: November 9, 2023
    Inventors: Manabu YANAGIHARA, Masayuki KURODA, Hiroto YAMAGIWA, Hideyuki OKITA, Masahiro HIKITA
  • Publication number: 20220392887
    Abstract: The semiconductor device includes: a semiconductor substrate; a first transistor disposed above the semiconductor substrate and including a first source electrode, a first gate region, and a first drain electrode; and a second transistor disposed above the semiconductor substrate and including a second source electrode, a second gate region, and a second drain electrode. The first source electrode, the second gate region, and the second source electrode are substantially at an identical potential. The first drain electrode and the second drain electrode are substantially at an identical potential.
    Type: Application
    Filed: October 29, 2020
    Publication date: December 8, 2022
    Inventors: Manabu YANAGIHARA, Takahiro SATO, Hiroto YAMAGIWA, Masahiro HIKITA
  • Publication number: 20220320091
    Abstract: An integrated semiconductor device includes an Si substrate, and a high-side transistor and a low-side transistor which configure a half-bridge. A source electrode of a unit transistor configuring the high-side transistor and a drain electrode of a unit transistor configuring the low-side transistor are integrated as a common electrode.
    Type: Application
    Filed: August 21, 2020
    Publication date: October 6, 2022
    Inventors: Manabu YANAGIHARA, Takahiro SATO, Hiroto YAMAGIWA, Masahiro HIKITA
  • Publication number: 20220302259
    Abstract: A semiconductor device includes: a substrate; a first nitride semiconductor layer above the substrate; a second nitride semiconductor layer above the first nitride semiconductor layer and being greater than the first nitride semiconductor layer in band gap; and a first field-effect transistor including a first source electrode, a first drain electrode, and a first gate electrode that are above the second nitride semiconductor layer, the first source electrode and the first drain electrode being separated from each other, the first gate electrode being disposed between the first source electrode and the first drain electrode. The first field-effect transistor includes a third semiconductor layer that is above the second nitride semiconductor layer in part of a region between lower part of the first source electrode and the first gate electrode, and is separated from the first gate electrode. The third semiconductor layer and the first source electrode are electrically connected.
    Type: Application
    Filed: August 21, 2020
    Publication date: September 22, 2022
    Inventors: Hiroto YAMAGIWA, Manabu YANAGIHARA, Takahiro SATO, Masahiro HIKITA, Hiroaki UENO, Yusuke KINOSHITA
  • Patent number: 10312339
    Abstract: In a semiconductor device in the present disclosure, a first nitride semiconductor layer has a two-dimensional electron gas channel in a vicinity of an interface with a second nitride semiconductor layer. In plan view, an electrode portion is provided between a first electrode and a second electrode with a space between the first electrode and the second electrode, and a space between the second electrode and the electrode portion is smaller than the space between the first electrode and the electrode portion. An energy barrier is provided in a junction surface between the electrode portion and the second nitride semiconductor layer, the energy barrier indicating a rectifying action in a forward direction from the electrode portion to the second nitride semiconductor layer, and a bandgap of the second nitride semiconductor layer is wider than a bandgap of the first nitride semiconductor layer.
    Type: Grant
    Filed: October 9, 2017
    Date of Patent: June 4, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Saichirou Kaneko, Hiroto Yamagiwa, Ayanori Ikoshi, Masayuki Kuroda, Manabu Yanagihara, Kenichiro Tanaka, Tetsuyuki Fukushima
  • Patent number: 10083870
    Abstract: A semiconductor device includes: a first bidirectional switch element including a first gate electrode, a second gate electrode, a first electrode, and a second electrode; a first field-effect transistor including a third gate electrode, a third electrode, and a fourth electrode; and a second field-effect transistor including a fourth gate electrode, a fifth electrode, and a sixth electrode. The first electrode is electrically connected to the third gate electrode, the first gate electrode is electrically connected to the third electrode, the second electrode is electrically connected to the fourth gate electrode, the second gate electrode is electrically connected to the fifth electrode, and the fourth electrode is electrically connected to the sixth electrode.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: September 25, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Takahiro Ohori, Ayanori Ikoshi, Hiroto Yamagiwa, Manabu Yanagihara
  • Publication number: 20180211878
    Abstract: A semiconductor device includes: a first bidirectional switch element including a first gate electrode, a second gate electrode, a first electrode, and a second electrode; a first field-effect transistor including a third gate electrode, a third electrode, and a fourth electrode; and a second field-effect transistor including a fourth gate electrode, a fifth electrode, and a sixth electrode. The first electrode is electrically connected to the third gate electrode, the first gate electrode is electrically connected to the third electrode, the second electrode is electrically connected to the fourth gate electrode, the second gate electrode is electrically connected to the fifth electrode, and the fourth electrode is electrically connected to the sixth electrode.
    Type: Application
    Filed: March 19, 2018
    Publication date: July 26, 2018
    Inventors: Takahiro OHORI, Ayanori IKOSHI, Hiroto YAMAGIWA, Manabu YANAGIHARA
  • Patent number: 9923069
    Abstract: A nitride semiconductor device includes: a stacked structure portion having an active region; first and second main electrodes extending in a first direction; and a lead-out line (second lead-out line) electrically connected to the second main electrode and extends to one side in the first direction. The first main electrode has a first tip at an end which is on the side to which the lead-out line extends. The second main electrode has a second tip at an end which is on the side to which the lead-out line extends, and has, at a second tip-side in the first direction, a tapered portion having a width in a second direction which decreases with decreasing distance to the second tip. The lead-out line has a region projecting in the second direction from the tapered portion, and the first tip does not project further in the first direction than the second tip.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: March 20, 2018
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Ryusuke Kanomata, Ayanori Ikoshi, Hiroto Yamagiwa, Saichirou Kaneko, Manabu Yanagihara
  • Publication number: 20180040706
    Abstract: In a semiconductor device in the present disclosure, a first nitride semiconductor layer has a two-dimensional electron gas channel in a vicinity of an interface with a second nitride semiconductor layer. In plan view, an electrode portion is provided between a first electrode and a second electrode with a space between the first electrode and the second electrode, and a space between the second electrode and the electrode portion is smaller than the space between the first electrode and the electrode portion. An energy barrier is provided in a junction surface between the electrode portion and the second nitride semiconductor layer, the energy barrier indicating a rectifying action in a forward direction from the electrode portion to the second nitride semiconductor layer, and a bandgap of the second nitride semiconductor layer is wider than a bandgap of the first nitride semiconductor layer.
    Type: Application
    Filed: October 9, 2017
    Publication date: February 8, 2018
    Inventors: Saichirou KANEKO, Hiroto YAMAGIWA, Ayanori IKOSHI, Masayuki KURODA, Manabu YANAGIHARA, Kenichiro TANAKA, Tetsuyuki FUKUSHIMA
  • Patent number: 9818835
    Abstract: In a semiconductor device in the present disclosure, a first nitride semiconductor layer has a two-dimensional electron gas channel in a vicinity of an interface with a second nitride semiconductor layer. In plan view, an electrode portion is provided between a first electrode and a second electrode with a space between the first electrode and the second electrode, and a space between the second electrode and the electrode portion is smaller than the space between the first electrode and the electrode portion. An energy barrier is provided in a junction surface between the electrode portion and the second nitride semiconductor layer, the energy barrier indicating a rectifying action in a forward direction from the electrode portion to the second nitride semiconductor layer, and a bandgap of the second nitride semiconductor layer is wider than a bandgap of the first nitride semiconductor layer.
    Type: Grant
    Filed: August 11, 2016
    Date of Patent: November 14, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Saichirou Kaneko, Hiroto Yamagiwa, Ayanori Ikoshi, Masayuki Kuroda, Manabu Yanagihara, Kenichiro Tanaka, Tetsuyuki Fukushima
  • Publication number: 20160351676
    Abstract: In a semiconductor device in the present disclosure, a first nitride semiconductor layer has a two-dimensional electron gas channel in a vicinity of an interface with a second nitride semiconductor layer. In plan view, an electrode portion is provided between a first electrode and a second electrode with a space between the first electrode and the second electrode, and a space between the second electrode and the electrode portion is smaller than the space between the first electrode and the electrode portion. An energy barrier is provided in a junction surface between the electrode portion and the second nitride semiconductor layer, the energy barrier indicating a rectifying action in a forward direction from the electrode portion to the second nitride semiconductor layer, and a bandgap of the second nitride semiconductor layer is wider than a bandgap of the first nitride semiconductor layer.
    Type: Application
    Filed: August 11, 2016
    Publication date: December 1, 2016
    Inventors: Saichirou KANEKO, Hiroto YAMAGIWA, Ayanori IKOSHI, Masayuki KURODA, Manabu YANAGIHARA, Kenichiro TANAKA, Tetsuyuki FUKUSHIMA
  • Patent number: 9502549
    Abstract: A nitride semiconductor device includes the followings. A semiconductor multilayer structure is above a substrate and includes a first nitride semiconductor layer and a second nitride semiconductor layer. A source electrode, a drain electrode, and a gate electrode are on the semiconductor multilayer structure. A gate wiring line transmits a gate driving signal to gate electrodes. A first shield structure is on the semiconductor multilayer structure between the drain electrode and the gate electrode or between the drain electrode and the gate wiring line in a non-channel region where an actual current path from the drain electrode to the source electrode is not formed in the semiconductor multilayer structure. The first shield structure is a normally-off structure, suppresses a current flowing from the semiconductor multilayer structure, and is set to have a substantially same potential as a potential of the source electrode.
    Type: Grant
    Filed: October 19, 2015
    Date of Patent: November 22, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Ayanori Ikoshi, Hiroto Yamagiwa
  • Publication number: 20160043208
    Abstract: A nitride semiconductor device includes the followings. A semiconductor multilayer structure is above a substrate and includes a first nitride semiconductor layer and a second nitride semiconductor layer. A source electrode, a drain electrode, and a gate electrode are on the semiconductor multilayer structure. A gate wiring line transmits a gate driving signal to gate electrodes. A first shield structure is on the semiconductor multilayer structure between the drain electrode and the gate electrode or between the drain electrode and the gate wiring line in a non-channel region where an actual current path from the drain electrode to the source electrode is not formed in the semiconductor multilayer structure. The first shield structure is a normally-off structure, suppresses a current flowing from the semiconductor multilayer structure, and is set to have a substantially same potential as a potential of the source electrode.
    Type: Application
    Filed: October 19, 2015
    Publication date: February 11, 2016
    Inventors: Ayanori IKOSHI, Hiroto YAMAGIWA
  • Publication number: 20160035853
    Abstract: In a semiconductor device in the present disclosure, a first nitride semiconductor layer has a two-dimensional electron gas channel in a vicinity of an interface with a second nitride semiconductor layer. In plan view, an electrode portion is provided between a first electrode and a second electrode with a space between the first electrode and the second electrode, and a space between the second electrode and the electrode portion is smaller than the space between the first electrode and the electrode portion. An energy barrier is provided in a junction surface between the electrode portion and the second nitride semiconductor layer, the energy barrier indicating a rectifying action in a forward direction from the electrode portion to the second nitride semiconductor layer, and a bandgap of the second nitride semiconductor layer is wider than a bandgap of the first nitride semiconductor layer.
    Type: Application
    Filed: October 16, 2015
    Publication date: February 4, 2016
    Inventors: SAICHIROU KANEKO, HIROTO YAMAGIWA, AYANORI IKOSHI, MASAYUKI KURODA, MANABU YANAGIHARA, KENICHIRO TANAKA, TETSUYUKI FUKUSHIMA
  • Patent number: 8593068
    Abstract: A two-wire AC switch suppressing heat from a bidirectional switch element inside the switch is provided. The two-wire AC switch 100a connected between an AC power supply 101 and a load 102 includes: a bidirectional switch element 103 which flows passing current bi-directionally, selects whether to flow or block the current, is connected in series with the AC power supply 101 and the load 102 to form a closed-loop circuit, and is made of a group-III nitride semiconductor; a full-wave rectifier 104 performing full-wave rectification on power supplied from the AC power supply 101; a power supply circuit 105 smoothing a voltage after the full-wave rectification to generate DC power; a first gate drive circuit 107 and a second gate drive circuit 108 each outputting a control signal to the bidirectional switch element 103; and a control circuit 106 controlling the first and second gate drive circuits 107 and 108.
    Type: Grant
    Filed: February 22, 2011
    Date of Patent: November 26, 2013
    Assignee: Panasonic Corporation
    Inventors: Shingo Hashizume, Ayanori Ikoshi, Hiroto Yamagiwa, Yasuhiro Uemoto, Manabu Yanagihara
  • Patent number: 8526207
    Abstract: A semiconductor device 101 in a bi-directional switch includes: a first electrode 109A, a second electrode 109B, a first gate electrode 112A, and a second gate electrode 112B. In a transition period: when the potential of the first electrode 109A is higher than the potential of the second electrode 109B, a voltage lower than the first threshold voltage is applied to the first gate electrode 112A and a voltage higher than the second threshold value voltage is applied to the second gate electrode 112B; and otherwise, a voltage higher than the first threshold value voltage is applied to the first gate electrode, and a voltage lower than the second threshold value voltage is applied to the second gate electrode.
    Type: Grant
    Filed: June 13, 2011
    Date of Patent: September 3, 2013
    Assignee: Panasonic Corporation
    Inventors: Hiroto Yamagiwa, Shingo Hashizume, Manabu Yanagihara, Ayanori Ikoshi
  • Patent number: 8497553
    Abstract: A semiconductor device includes a first transistor formed on a first element region, and a first protecting element including a second transistor formed on a second element region. A second protecting element ohmic electrode is connected to a first gate electrode, a first protecting element ohmic electrode is connected to a first ohmic electrode, and a first protecting element gate electrode is connected to at least one of the first protecting element ohmic electrode and the second protecting element ohmic electrode. The second element region is smaller in area than the first element region.
    Type: Grant
    Filed: October 15, 2010
    Date of Patent: July 30, 2013
    Assignee: Panasonic Corporation
    Inventors: Hiroto Yamagiwa, Shingo Hashizume, Ayanori Ikoshi, Manabu Yanagihara, Yasuhiro Uemoto
  • Patent number: 8148752
    Abstract: A field effect transistor includes a semiconductor stack formed on a substrate, and having a first nitride semiconductor layer and a second nitride semiconductor layer. A source electrode and a drain electrode are formed on the semiconductor stack so as to be separated from each other. A gate electrode is formed between the source electrode and the drain electrode so as to be separated from the source electrode and the drain electrode. A hole injection portion is formed near the drain electrode. The hole injection portion has a p-type third nitride semiconductor layer, and a hole injection electrode formed on the third nitride semiconductor layer. The hole injection electrode and the drain electrode have substantially the same potential.
    Type: Grant
    Filed: February 4, 2011
    Date of Patent: April 3, 2012
    Assignee: Panasonic Corporation
    Inventors: Ayanori Ikoshi, Shingo Hashizume, Masahiro Hikita, Hiroto Yamagiwa, Manabu Yanagihara
  • Publication number: 20110305054
    Abstract: A semiconductor device 101 in a bi-directional switch includes: a first electrode 109A, a second electrode 109B, a first gate electrode 112A, and a second gate electrode 112B. In a transition period: when the potential of the first electrode 109A is higher than the potential of the second electrode 109B, a voltage lower than the first threshold voltage is applied to the first gate electrode 112A and a voltage higher than the second threshold value voltage is applied to the second gate electrode 112B; and otherwise, a voltage higher than the first threshold value voltage is applied to the first gate electrode, and a voltage lower than the second threshold value voltage is applied to the second gate electrode.
    Type: Application
    Filed: June 13, 2011
    Publication date: December 15, 2011
    Inventors: Hiroto YAMAGIWA, Shingo Hashizume, Manabu Yanagihara, Ayanori Ikoshi
  • Patent number: 8063418
    Abstract: In a high-voltage semiconductor switching element, in addition to a first emitter region that is necessary for switching operations, a second emitter region, which is electrically connected with the first emitter region through a detection resistor in current detection means and is electrically connected with the current detection means, is formed. No emitter electrode is formed on the second emitter region, while an emitter electrode is formed on a part of a base region that is adjacent to the second emitter region.
    Type: Grant
    Filed: September 20, 2010
    Date of Patent: November 22, 2011
    Assignee: Panasonic Corporation
    Inventors: Hiroto Yamagiwa, Takashi Saji, Saichiro Kaneko