Patents by Inventor Hiroyuki Fukumizu
Hiroyuki Fukumizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11872524Abstract: An exhaust pipe device according to an embodiment includes a dielectric pipe; a radio-frequency electrode; a ground electrode; and a plasma generation circuit. The radio-frequency electrode is disposed on an outer periphery side of the dielectric pipe and a radio-frequency voltage is applied to the radio-frequency electrode. The ground electrode is disposed on an end portion side of the dielectric pipe such that a distance from the radio-frequency electrode is smaller on an inner side than on an outer side of the dielectric pipe, and a ground potential is applied to the ground electrode. The plasma generation circuit generates plasma inside the dielectric pipe. The exhaust pipe device functions as a part of an exhaust pipe disposed between a film forming chamber and a vacuum pump that exhausts gas inside the film forming chamber.Type: GrantFiled: June 25, 2021Date of Patent: January 16, 2024Assignee: Kioxia CorporationInventors: Hiroshi Matsuba, Akihiro Oishi, Hiroyuki Fukumizu, Kazuaki Kurihara
-
Publication number: 20230160063Abstract: An exhaust pipe apparatus according to an embodiment includes a dielectric pipe; a radio-frequency electrode; and a plasma generation circuit. The exhaust pipe apparatus functions as a part of an exhaust pipe disposed between a process chamber and a vacuum pump that exhausts gas inside the process chamber. The radio-frequency electrode includes a thin metal plate disposed on an outer periphery side of the dielectric pipe, a buffer member disposed on an outer periphery side of the thin metal plate, and a conductive hollow structure disposed on an outer periphery side of the buffer member and a radio-frequency voltage is applied to the radio-frequency electrode. The plasma generation circuit generates plasma inside the dielectric pipe.Type: ApplicationFiled: June 29, 2022Publication date: May 25, 2023Applicant: Kioxia CorporationInventors: Akihiro Oishi, Hiroshi Matsuba, Hiroyuki Fukumizu
-
Publication number: 20230087188Abstract: A plasma etching method of an embodiment includes etching a silicon-containing film using plasma of a fluorocarbon gas. The fluorocarbon gas contains fluorocarbon which has a composition, regarding carbon and fluorine, represented by a general formula: CxFy, where x and y are numbers satisfying x?12 and x?y, and which includes two benzene rings bonded through a C—C single bond.Type: ApplicationFiled: December 14, 2021Publication date: March 23, 2023Applicant: Kioxia CorporationInventors: Hiroyuki FUKUMIZU, Shuichi KUBOI, Abhishek THOTE
-
Publication number: 20220084835Abstract: A plasma etching method according to an embodiment is a method for etching a silicon-containing film by using plasma of a fluorocarbon gas. The fluorocarbon gas includes at least one selected from a first fluorocarbon which has a main chain of six or more carbons bonded in a linear manner, the main chain having a structure of single bond and double bond alternately joined, a second fluorocarbon which has a main chain of six or more carbons bonded in a linear manner, the main chain having a structure of single bond and triple bond alternately joined, and a third fluorocarbon which has a main chain of five or more carbons bonded in a linear manner, the main chain having a structure which includes double bond and triple bond.Type: ApplicationFiled: June 14, 2021Publication date: March 17, 2022Applicant: Kioxia CorporationInventors: Shuichi KUBOI, Daiki IINO, Hiroyuki FUKUMIZU
-
Publication number: 20220062820Abstract: An exhaust pipe device according to an embodiment includes a dielectric pipe; a radio-frequency electrode; a ground electrode; and a plasma generation circuit. The radio-frequency electrode is disposed on an outer periphery side of the dielectric pipe and a radio-frequency voltage is applied to the radio-frequency electrode. The ground electrode is disposed on an end portion side of the dielectric pipe such that a distance from the radio-frequency electrode is smaller on an inner side than on an outer side of the dielectric pipe, and a ground potential is applied to the ground electrode. The plasma generation circuit generates plasma inside the dielectric pipe. The exhaust pipe device functions as a part of an exhaust pipe disposed between a film forming chamber and a vacuum pump that exhausts gas inside the film forming chamber.Type: ApplicationFiled: June 25, 2021Publication date: March 3, 2022Applicant: Kioxia CorporationInventors: Hiroshi MATSUBA, Akihiro OISHI, Hiroyuki FUKUMIZU, Kazuaki KURIHARA
-
Publication number: 20210249238Abstract: An exhaust pipe device according to an embodiment includes a pipe body, a coil, an inner pipe, and a plasma generation circuit. The coil is disposed inside the pipe body. The inner pipe is a dielectric and is disposed inside the coil. The plasma generation circuit is configured to generate plasma inside the inner pipe using the coil. The exhaust pipe device functions as a part of an exhaust pipe disposed between a film forming chamber and a vacuum pump for exhausting an inside of the film forming chamber.Type: ApplicationFiled: September 15, 2020Publication date: August 12, 2021Applicant: Kioxia CorporationInventors: Hiroshi MATSUBA, Akihiro OISHI, Hiroyuki FUKUMIZU, Kazuaki KURIHARA
-
Publication number: 20210062337Abstract: An exhaust pipe device according to an embodiment includes a pipe body; a dielectric formed in an annular and disposed along an inner wall of the pipe body; an internal electrode formed in an annular, disposed along an inner wall of the dielectric with a part of an inner wall surface of the dielectric left and configured to expose the part of the inner wall surface of the dielectric left without being disposed to a center side of the pipe body; and a plasma generation circuit configured to generate plasma on an exposed surface of the dielectric by using the internal electrode, wherein the exhaust pipe device functions as a part of an exhaust pipe disposed between a film forming chamber and a vacuum pump for exhausting an inside of the film forming chamber.Type: ApplicationFiled: February 4, 2020Publication date: March 4, 2021Applicant: Kioxia CorporationInventors: Hiroshi MATSUBA, Akihiro OISHI, Kazuaki KURIHARA, Hiroyuki FUKUMIZU
-
Publication number: 20200075297Abstract: An exhaust pipe device according to an embodiment includes a pipe body; an internal electrode disposed in the pipe body; and a plasma generation circuit configured to generate plasma in the pipe body by using the internal electrode, wherein the exhaust pipe device is used as a part of an exhaust pipe disposed between a film forming chamber and a vacuum pump for exhausting an inside of the film forming chamber.Type: ApplicationFiled: March 4, 2019Publication date: March 5, 2020Applicant: Toshiba Memory CorporationInventors: Akihiro OISHI, Hiroyuki FUKUMIZU, Hiroshi MATSUBA, Kazuaki KURIHARA, Takeshi YAMAUCHI
-
Patent number: 10181561Abstract: According to one embodiment, a memory device includes a stacked body. The stacked body includes first and second electrodes, and an oxide layer provided between the first and second electrodes. The second electrode includes a semiconductor layer, and a metal-containing region including at least one of first or second metallic element and being provided between at least a portion of the semiconductor layer and at least a portion of the oxide layer. The first metallic element includes at least one selected from Pt, Pd, Ir, Ru, Re, and Os. The second metallic element includes at least one selected Ti, W, Mo, and Ta. The stacked body has first and second states. The first state is obtained by causing a current to flow in the stacked body from the second toward first electrode. The second state is obtained by causing a current to flow from the first toward second electrode.Type: GrantFiled: July 7, 2017Date of Patent: January 15, 2019Assignee: Toshiba Memory CorporationInventors: Hiroyuki Fukumizu, Takeshi Yamaguchi
-
Publication number: 20180076597Abstract: A quantum cascade laser device includes a substrate, a semiconductor stacked body and a first electrode. The semiconductor stacked body includes an active layer and a first clad layer. The active layer is configured to emit infrared laser light by an intersubband optical transition. A ridge waveguide is provided in the semiconductor stacked body. A distributed feedback region is provided along a first straight line. The ridge waveguide extends along the first straight line. The first electrode is provided at an upper surface of the distributed feedback region. A diffraction grating is arranged along the first straight line. The distributed feedback region includes a an increasing region where a length of the diffraction grating along a direction orthogonal to the first straight line increases from one end portion of the distributed feedback region toward another end portion of the distributed feedback region.Type: ApplicationFiled: August 24, 2017Publication date: March 15, 2018Applicant: Kabushiki Kaisha ToshibaInventors: Hiroyuki FUKUMIZU, Tsutomu Kakuno
-
Publication number: 20180013061Abstract: According to one embodiment, a memory device includes a stacked body. The stacked body includes first and second electrodes, and an oxide layer provided between the first and second electrodes. The second electrode includes a semiconductor layer, and a metal-containing region including at least one of first or second metallic element and being provided between at least a portion of the semiconductor layer and at least a portion of the oxide layer. The first metallic element includes at least one selected from Pt, Pd, Ir, Ru, Re, and Os. The second metallic element includes at least one selected Ti, W, Mo, and Ta. The stacked body has first and second states. The first state is obtained by causing a current to flow in the stacked body from the second toward first electrode. The second state is obtained by causing a current to flow from the first toward second electrode.Type: ApplicationFiled: July 7, 2017Publication date: January 11, 2018Applicant: Toshiba Memory CorporationInventors: Hiroyuki FUKUMIZU, Takeshi YAMAGUCHI
-
Patent number: 9679947Abstract: A plurality of first conductive layers are stacked at a predetermined pitch in a first direction perpendicular to a substrate. A memory layer is provided in common on side surfaces of the first conductive layers and functions as the memory cells. A second conductive layer comprises a first side surface in contact with side surfaces of the first conductive layers via the memory layer, the second conductive layer extending in the first direction. A width in a second direction of the first side surface at a first position is smaller than a width in the second direction of the first side surface at a second position lower than the first position. A thickness in the first direction of the first conductive layer at the first position is larger than a thickness in the first direction of the first conductive layer at the second position.Type: GrantFiled: January 23, 2017Date of Patent: June 13, 2017Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Masaki Yamato, Yasuhiro Nojiri, Shigeki Kobayashi, Hiroyuki Fukumizu, Takeshi Yamaguchi
-
Publication number: 20170133586Abstract: A plurality of first conductive layers are stacked at a predetermined pitch in a first direction perpendicular to a substrate. A memory layer is provided in common on side surfaces of the first conductive layers and functions as the memory cells. A second conductive layer comprises a first side surface in contact with side surfaces of the first conductive layers via the memory layer, the second conductive layer extending in the first direction. A width in a second direction of the first side surface at a first position is smaller than a width in the second direction of the first side surface at a second position lower than the first position. A thickness in the first direction of the first conductive layer at the first position is larger than a thickness in the first direction of the first conductive layer at the second position.Type: ApplicationFiled: January 23, 2017Publication date: May 11, 2017Applicant: Kabushiki Kaisha ToshibaInventors: Masaki YAMATO, Yasuhiro NOJIRI, Shigeki KOBAYASHI, Hiroyuki FUKUMIZU, Takeshi YAMAGUCHI
-
Patent number: 9590016Abstract: A plurality of first conductive layers are stacked at a predetermined pitch in a first direction perpendicular to a substrate. A memory layer is provided in common on side surfaces of the first conductive layers and functions as the memory cells. A second conductive layer comprises a first side surface in contact with side surfaces of the first conductive layers via the memory layer, the second conductive layer extending in the first direction. A width in a second direction of the first side surface at a first position is smaller than a width in the second direction of the first side surface at a second position lower than the first position. A thickness in the first direction of the first conductive layer at the first position is larger than a thickness in the first direction of the first conductive layer at the second position.Type: GrantFiled: December 11, 2015Date of Patent: March 7, 2017Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Masaki Yamato, Yasuhiro Nojiri, Shigeki Kobayashi, Hiroyuki Fukumizu, Takeshi Yamaguchi
-
Publication number: 20160099289Abstract: A plurality of first conductive layers are stacked at a predetermined pitch in a first direction perpendicular to a substrate. A memory layer is provided in common on side surfaces of the first conductive layers and functions as the memory cells. A second conductive layer comprises a first side surface in contact with side surfaces of the first conductive layers via the memory layer, the second conductive layer extending in the first direction. A width in a second direction of the first side surface at a first position is smaller than a width in the second direction of the first side surface at a second position lower than the first position. A thickness in the first direction of the first conductive layer at the first position is larger than a thickness in the first direction of the first conductive layer at the second position.Type: ApplicationFiled: December 11, 2015Publication date: April 7, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Masaki YAMATO, Yasuhiro Nojiri, Shigeki Kobayashi, Hiroyuki Fukumizu, Takeshi Yamaguchi
-
Patent number: 9252358Abstract: First, a trench penetrating first conductive layers and interlayer insulating layers is formed. Next, a column-shaped conductive layer is formed to fill the trench via a side wall layer. Then, after formation of the side wall layer, by migration of oxygen atoms between the side wall layer and the first conductive layers or migration of oxygen atoms between the side wall layer and the interlayer insulating layers, a proportion of oxygen atoms in the side wall layer adjacent to the interlayer insulating layers is made larger than a proportion of oxygen atoms in the side wall layer adjacent to the first conductive layers, whereby the side wall layer adjacent to the first conductive layers is caused to function as the variable resistance element.Type: GrantFiled: February 14, 2013Date of Patent: February 2, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Hiroshi Kanno, Takayuki Tsukamoto, Hiroyuki Fukumizu, Yoichi Minemura, Takamasa Okawa
-
Publication number: 20160027682Abstract: According to the embodiments, a manufacturing method for a semiconductor device includes forming recessed parts on a surface of a semiconductor layer. The manufacturing method for the semiconductor device includes a process for forming a buffer layer, which has a melting point lower than that of the semiconductor layer, on a surface of the recessed part on the surface of the semiconductor layer. The manufacturing method for the semiconductor device includes a process for forming a high-melting point film, which has the melting point higher than that of the semiconductor layer, on the buffer layer and fills the recessed part with the high-melting point film. The manufacturing method for the semiconductor device includes a process for heating the semiconductor layer having the buffer layer and the high-melting point film formed thereon at a temperature equal to or higher than the melting point of the buffer layer.Type: ApplicationFiled: March 2, 2015Publication date: January 28, 2016Inventors: Shintaro Okujo, Kenichi Yoshino, Hiroyuki Fukumizu, Satoshi Kato
-
Patent number: 9246088Abstract: A plurality of first conductive layers are stacked at a predetermined pitch in a first direction perpendicular to a substrate. A memory layer is provided in common on side surfaces of the first conductive layers and functions as the memory cells. A second conductive layer comprises a first side surface in contact with side surfaces of the first conductive layers via the memory layer, the second conductive layer extending in the first direction. A width in a second direction of the first side surface at a first position is smaller than a width in the second direction of the first side surface at a second position lower than the first position. A thickness in the first direction of the first conductive layer at the first position is larger than a thickness in the first direction of the first conductive layer at the second position.Type: GrantFiled: September 13, 2013Date of Patent: January 26, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Masaki Yamato, Yasuhiro Nojiri, Shigeki Kobayashi, Hiroyuki Fukumizu, Takeshi Yamaguchi
-
Publication number: 20160020232Abstract: According to one embodiment, a solid state imaging device includes a semiconductor layer and an anti-reflection film. The semiconductor layer performs photoelectric conversion. The anti-reflection film is provided on the semiconductor layer. The anti-reflection film is conductive.Type: ApplicationFiled: July 13, 2015Publication date: January 21, 2016Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Hiroyuki FUKUMIZU, Rikyu IKARIYAMA
-
Patent number: 9219175Abstract: According to one embodiment, an imaging device includes a semiconductor layer, an electrode, first and second insulating films, and a light blocking film. The semiconductor layer has a first surface and a second surface on an opposite side to the first surface, and includes pixels configured to detect light. The electrode is provided on the first surface and is configured to control an output of the pixels. The first insulating film is provided on the second surface. The second insulating film is provided on the first insulating film and has a smaller refractive index in a visible light range than the first insulating film. One end of the light blocking film is located in the second insulating film or at a same level as a surface of the second insulating film. Another end of the light blocking film is located in the semiconductor layer.Type: GrantFiled: March 10, 2014Date of Patent: December 22, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Hiroyuki Fukumizu, Takaaki Minami, Kentaro Eda, Takeshi Yosho