Patents by Inventor Hiroyuki Fukumizu
Hiroyuki Fukumizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120217461Abstract: A semiconductor memory device according to an embodiment includes: first lines provided on a substrate; second lines provided between the first lines and the substrate so as to intersect the first lines; and a first memory cell array including first memory cells, each of the first memory cells being provided at respective intersections of the first lines and the second lines and including a current rectifying element and a variable resistor connected in series. The variable resistor of the first memory cell includes a first recording layer and a second recording layer, the first recording layer being made of an oxide of a first metal material, the second recording layer being made of the first metal material and being formed so as to contact with the first recording layer. The second recording layer is closer to the first line than the first recording layer is.Type: ApplicationFiled: February 24, 2012Publication date: August 30, 2012Applicant: Kabushiki Kaisha ToshibaInventors: Shigeki KOBAYASHI, Takashi Shigeoka, Mitsuru Sato, Takahiro Hirai, Katsuyuki Sekine, Kazuya Kinoshita, Soichi Yamazaki, Ryota Fujitsuka, Kensuke Takahashi, Yasuhiro Nojiri, Masaki Yamato, Hiroyuki Fukumizu, Takeshi Yamaguchi
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Patent number: 8153488Abstract: Manufacturing a nonvolatile storage device including: stacking a first electrode film forming a first electrode and a first storage unit film forming a first storage unit on a substrate; processing the first electrode film and the first storage unit film into a strip shape; burying a sacrifice layer between the processed first electrode films and between the processed first storage unit films; forming a second electrode film forming a second electrode on the first storage unit film and the sacrifice layer; forming a mask layer on the second electrode film; processing the second electrode film into a strip shape using the mask layer; removing a portion of the first storage unit film exposed from the sacrifice layer using the mask layer processing the first storage unit film into a columnar shape, removing the sacrifice layer exposing the first storage unit film; and removing the exposed first storage unit film.Type: GrantFiled: March 18, 2010Date of Patent: April 10, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Kazuhito Nishitani, Eiji Ito, Machiko Tsukiji, Hiroyuki Fukumizu, Naoya Hayamizu, Katsuhiro Sato
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Publication number: 20110303888Abstract: According to one embodiment, a nonvolatile memory device includes a memory cell connected to a first interconnect and a second interconnect. The memory cell includes a plurality of layers. The plurality of layers includes a carbon-containing memory layer sandwiched between a first electrode film and a second electrode film and a carbon-containing barrier layer provided at least one of between the first electrode film and the memory layer and between the second electrode film and the memory layer. The barrier layer has lower electrical resistivity than the memory layer.Type: ApplicationFiled: March 10, 2011Publication date: December 15, 2011Applicant: Kabushiki Kaisha ToshibaInventors: Hiroyuki FUKUMIZU, Yasuhiro Nojiri, Tsukasa Nakai, Kazuhiko Yamamoto
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Publication number: 20110306199Abstract: According to one embodiment, a method is disclosed for manufacturing a nonvolatile memory device. The nonvolatile memory device includes a memory cell connected to a first interconnect and a second interconnect. The method can include forming a first electrode film on the first interconnect. The method can include forming a layer including a plurality of carbon nanotubes dispersed inside an insulator on the first electrode film. At least one carbon nanotube of the plurality of carbon nanotubes is exposed from a surface of the insulator. The method can include forming a second electrode film on the layer. In addition, the method can include forming a second interconnect on the second electrode film.Type: ApplicationFiled: March 30, 2011Publication date: December 15, 2011Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yasuhiro NOJIRI, Hiroyuki Fukumizu, Shinichi Nakao, Kei Watanabe, Kazuhiko Yamamoto, Ichiro Mizushima, Yoshio Ozawa
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Publication number: 20110205781Abstract: According to one embodiment, a non-volatile semiconductor memory device includes: a first line; a second line intersecting with the first line; and a memory cell arranged at a position where the second line intersects with the first line, wherein, the memory cell includes: a variable resistance element; and a negative resistance element connected in series to the variable resistance element.Type: ApplicationFiled: September 15, 2010Publication date: August 25, 2011Applicant: Kabushiki Kaisha ToshibaInventors: Tsukasa Nakai, Yasuhiro Nojiri, Shuichi Kuboi, Motoya Kishida, Akiko Nomachi, Masanobu Baba, Hiroyuki Fukumizu
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Publication number: 20110175053Abstract: According to one embodiment, a nonvolatile memory device includes a substrate, first electrodes, a first and a second interelectrode insulating layer, second electrodes, a memory portion and a first protrusion. The first electrodes are provided on the substrate and extend in a first direction. The first interelectrode insulating layer is provided between the first electrodes. The second electrodes are opposed to the first electrodes and extend in a second direction crossing the first direction. The second interelectrode insulating layer is provided between the second electrodes. The memory portion is provided between the first electrode and the second electrode. The first protrusion is conductive and provided at least one of between the first electrode and the memory portion and between the first interelectrode insulating layer and the memory portion, and between the second electrode and the memory portion and between the second interelectrode insulating layer and the memory portion.Type: ApplicationFiled: September 20, 2010Publication date: July 21, 2011Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Hiroyuki FUKUMIZU
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Publication number: 20110149638Abstract: According to one embodiment, a nonvolatile memory device includes a memory layer and a driver section. The memory layer has a first state having a first resistance under application of a first voltage, a second state having a second resistance higher than the first resistance under application of a second voltage higher than the first voltage, and a third state having a third resistance between the first resistance and the second resistance under application of a third voltage between the first voltage and the second voltage. The driver section is configured to apply at least one of the first voltage, the second voltage and the third voltage to the memory layer to record information in the memory layer.Type: ApplicationFiled: February 28, 2011Publication date: June 23, 2011Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Noriko BOTA, Yasuhiro Nojiri, Hiroyuki Fukumizu, Takuya Konno, Kazuhito Nishitani
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Publication number: 20110069525Abstract: According to one embodiment, a nonvolatile memory device includes a memory cell. The memory cell is connected to a first interconnection and a second interconnection and includes a plurality of layers. The plurality of layers includes a memory layer and a carbon nanotube-containing layer which is in contact with the memory layer and contains a plurality of carbon nanotubes.Type: ApplicationFiled: September 14, 2010Publication date: March 24, 2011Applicant: Kabushiki Kaisha ToshibaInventors: Hiroyuki FUKUMIZU, Yasuhiro Nojiri, Tsukasa Nakai
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Publication number: 20110037045Abstract: According to one embodiment, a nonvolatile memory device includes a substrate, a first electrode, a second electrode, and a memory. The first electrode is provided on the substrate. The second electrode crosses on the first electrode. The memory portion is provided between the first electrode and the second electrode. At least one of an area of a first memory portion surface of the memory portion opposed to the first electrode and an area of a second memory portion surface of the memory portion opposed to the second electrode is smaller than an area of a cross surface of the first electrode and the second electrode opposed to each other by the crossing.Type: ApplicationFiled: September 7, 2010Publication date: February 17, 2011Applicant: Kabushiki Kaisha ToshibaInventors: Hiroyuki Fukumizu, Naoya Hayamizu, Makiko Tange
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Publication number: 20110031468Abstract: According to one embodiment, a nonvolatile memory device includes a substrate, a first electrode, a second electrode, a third electrode, a first memory portion and a second memory portion. The first electrode extends in a first direction and is provided on the substrate. The second electrode extends in a second direction crossing the first direction and is provided on the first electrode. The third electrode extends in a third direction crossing the second direction and is provided on the second electrode. The first memory portion is provided between the first and the second electrodes and has a first oxygen composition ratio and a first layer thickness. The second memory portion is provided between the second and the third electrodes and has at least one of a second oxygen composition ratio different from the first oxygen composition ratio and a second layer thickness different from the first layer thickness.Type: ApplicationFiled: September 20, 2010Publication date: February 10, 2011Applicant: Kabushiki Kaisha ToshibaInventors: Hiroyuki FUKUMIZU, Noriko Bota
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Publication number: 20100327253Abstract: According to one embodiment, a variable resistance layer includes a mixture of a first compound and a second compound. The first compound includes carbon (C) as well as at least one element selected from a group of elements G1. The group of elements G1 consists of hydrogen (H), boron (B), nitrogen (N), silicon (Si), and titanium (Ti). The second compound includes at least one compound selected from a group of compounds G2. The group of compounds G2 consists of silicon oxide (SiO2), silicon oxynitride (SiON), silicon nitride (Si3N4), carbon nitride (C3N4), boron nitride (BN), aluminum nitride (AlN), aluminum oxide (Al2O3), and silicon carbide (SiC). Concentration of the first compound in the variable resistance layer is not less than 30 volume percent, and not more than 70 volume percent.Type: ApplicationFiled: June 29, 2010Publication date: December 30, 2010Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tsukasa NAKAI, Hiroyuki FUKUMIZU, Yasuhiro NOJIRI, Motoya KISHIDA, Kazuyuki YAHIRO, Yasuhiro SATOH
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Publication number: 20100252797Abstract: A nonvolatile memory device, includes: a memory layer having a resistance changeable by performing at least one selected from applying an electric field and providing a current, the memory layer having a first major surface and a second major surface opposite to the first major surface; a plurality of first electrodes provided on the first major surface; a second electrode provided on the second major surface; a probe electrode disposed to face the plurality of first electrodes, the probe electrode having a changeable relative positional relationship with the first electrodes; and a drive unit connected to the probe electrode and the second electrode to record information in the memory layer by causing at least one selected from applying the electric field and providing the current via the probe electrode to the memory layer between the second electrode and at least one of the plurality of first electrodes.Type: ApplicationFiled: March 17, 2010Publication date: October 7, 2010Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Hiroyuki FUKUMIZU
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Publication number: 20100243980Abstract: A nonvolatile memory device includes: a first interconnection extending in a first direction; a second interconnection extending in a second direction nonparallel to the first direction; and a memory layer placed between the first interconnection and the second interconnection and reversibly transitioning between a first state and a second state by a current supplied via the first interconnection and the second interconnection. A cross section parallel to the first and the second direction of the memory layer decreases toward the second interconnection.Type: ApplicationFiled: March 18, 2010Publication date: September 30, 2010Applicant: Kabushiki Kaisha ToshibaInventor: Hiroyuki FUKUMIZU
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Publication number: 20100248431Abstract: A method for manufacturing a nonvolatile storage device including: a plurality of first electrodes aligning in a first direction; a plurality of second electrodes aligning in a second direction nonparallel to the first direction and provided above the first electrodes; and a first storage unit provided between the first electrode and the second electrode and including a first storage layer, a resistance of the first storage layer changing by at least one of an applied electric field and an applied current, the method includes: stacking a first electrode film forming a first electrode and a first storage unit film forming a first storage unit on a major surface of a substrate; processing the first electrode film and the first storage unit film into a strip shape aligning in the first direction; burying a sacrifice layer between the processed first electrode films and between the processed first storage unit films; forming a second electrode film forming a second electrode on the first storage unit film and theType: ApplicationFiled: March 18, 2010Publication date: September 30, 2010Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Kazuhito NISHITANI, Eiji Ito, Machiko Tsukiji, Hiroyuki Fukumizu, Naoya Hayamizu, Katsuhiro Sato
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Publication number: 20100244114Abstract: A nonvolatile memory device includes: at least one first interconnection extending in a first direction; at least one second interconnection disposed above the first interconnection and extending in a second direction nonparallel to the first direction; a memory cell disposed between the first interconnection and the second interconnection at an intersection of the first interconnection and the second interconnection and including a memory element; and an element isolation layer disposed between the memory cells. At least one dielectric film with a higher density than the element isolation layer is disposed on a sidewall surface of the memory cell.Type: ApplicationFiled: March 18, 2010Publication date: September 30, 2010Applicant: Kabushiki Kaisha ToshibaInventors: Takuya Konno, Hiroyuki Fukumizu, Kazuhito Nishitani
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Publication number: 20100244248Abstract: A nonvolatile memory device, includes: a lower side electrode aligned in a first direction; an upper side electrode positioned above the lower side electrode and aligned in a second direction intersecting the first direction; and a memory unit provided between the lower side electrode and the upper side electrode. At least one selected from the lower side electrode and the upper side electrode includes a first electrode and a second electrode, the first electrode having a forward-tapered side wall, the second electrode having a reverse-tapered side wall and being adjacent to the first electrode via an insulating layer in substantially identical plane.Type: ApplicationFiled: March 18, 2010Publication date: September 30, 2010Applicant: Kabushiki Kaisha ToshibaInventor: Hiroyuki Fukumizu
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Publication number: 20100238710Abstract: A nonvolatile memory device, includes: a memory layer having a resistance changeable by performing at least one selected from applying an electric field and providing a current, the storage layer having a first major surface; a plurality of first electrodes provided on the first major surface; a plurality of probe electrodes disposed to face the plurality of first electrodes, the plurality of probe electrodes having a changeable relative positional relationship with the first electrodes; a drive unit connected to the plurality of probe electrodes to record information in the memory layer by causing at least the one selected from the electric field and the current between at least two of the plurality of first electrodes via the plurality of probe electrodes, the electric field having a component parallel to the first major surface, the current flowing in a direction having a component parallel to the first major surface.Type: ApplicationFiled: March 17, 2010Publication date: September 23, 2010Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Hiroyuki FUKUMIZU
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Publication number: 20100237319Abstract: This nonvolatile semiconductor memory device comprises a memory cell array including memory cells arranged therein. Each of the memory cells is located at respective intersections between first wirings and second wirings and includes a variable resistance element. The variable resistance element comprises a thin film including carbon (C). The thin film includes a side surface along a direction of a current flowing in the memory cell. The side surface includes carbon nitride (CNx).Type: ApplicationFiled: February 17, 2010Publication date: September 23, 2010Applicant: Kabushiki Kaisha ToshibaInventors: Yasuhiro SATOH, Tsukasa Nakai, Kazuhiko Yamamoto, Motoya Kishida, Hiroyuki Fukumizu, Yasuhiro Nojiri
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Publication number: 20080057702Abstract: A method of manufacturing a semiconductor device includes forming an inter-layer insulating film on a silicon substrate, drying etching the inter-layer insulating film with an etching gas containing halogen using a mask of an organic material, forming a contact hole at a predetermined position on the inter-layer insulating film, separating and removing the mask of the organic material, coating a resist containing OH or H on the inter-layer insulating film including the contact hole followed by ashing with oxygen plasma, and burying a conductive material in the contact hole.Type: ApplicationFiled: March 12, 2007Publication date: March 6, 2008Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Hiroyuki Fukumizu, Takeshi Yamauchi
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Publication number: 20060040502Abstract: A wiring material film is formed by depositing a first conductive barrier film, an aluminum film, and a second conductive barrier film on a semiconductor substrate in this order. An organic material film, a silicon oxide film and a resist film are formed on the surface of the second barrier film in this order. A resist pattern is formed on silicon oxide film. A pattern of the silicon oxide film is formed on the surface of the organic material film by etching the silicon oxide film with a process gas containing at least fluorine using the resist pattern as a mask. The substrate is treated with a plasma of a process gas containing C before exposing the substrate to air after forming the pattern of the organic material film on the surface of the conductive barrier film by etching the organic material film.Type: ApplicationFiled: August 18, 2005Publication date: February 23, 2006Inventors: Hiroyuki Fukumizu, Shingo Honda