Patents by Inventor Hiroyuki Mori

Hiroyuki Mori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220189127
    Abstract: A technology for reducing a processing delay when a plurality of mixed reality spaces are shared between terminals is provided. An information processing system includes a terminal configured to display an image representing a mixed reality space obtained by superimposing a virtual space in a real space, and a server apparatus configured to communicate with the terminal. The server apparatus manages, for each of a plurality of real spaces, information for identifying the real space and anchor information for defining a superimposition position of the virtual space in the real space and, in a case where an acquisition request for anchor information corresponding to a first real space is received from the terminal, transmits response information including anchor information corresponding to the first real space and anchor information corresponding to a second real space adjacent to the first real space to the terminal.
    Type: Application
    Filed: April 2, 2020
    Publication date: June 16, 2022
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Kazuya MATSUO, Koya MORI, Hiroyuki TANAKA
  • Patent number: 11357847
    Abstract: The modified HSV gD protein of the present invention is a modified protein of a herpes simplex virus (HSV) envelope glycoprotein D (gD), wherein the modified HSV gD protein is derived from a wild-type HSV gD by modification of at least one of B cell epitopes having low or no neutralizing antibody-inducing activity compared to a B cell epitope present in a receptor-binding domain (RBD) (decotopes) in the ectodomain of the wild-type HSV gD, so that the modified epitope does not function as an epitope.
    Type: Grant
    Filed: August 29, 2018
    Date of Patent: June 14, 2022
    Assignee: KM BIOLOGICS CO., LTD.
    Inventors: Hiroaki Mori, Tomohiro Nishimura, Hiroyuki Shimizu, Akihiro Koube, Takahiro Katayama
  • Patent number: 11348750
    Abstract: A relay includes a first fixed contact, a second fixed contact, a movable contact piece having first and second movable contacts, a contact piece holding unit configured to hold the movable contact piece, and first to fourth magnets. The first magnet and the second magnet are disposed so that same poles thereof face each other. The movable contact piece is disposed between the first magnet and the second magnet in a width direction of the movable contact piece. The third magnet is disposed so as to increase a magnetic flux in a longitudinal direction of the movable contact piece at a position between the first fixed contact and the first movable contact. The fourth magnet is disposed so as to increase a magnetic flux in the longitudinal direction of the movable contact piece at a position between the second fixed contact and the second movable contact.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: May 31, 2022
    Assignee: OMRON CORPORATION
    Inventors: Naoki Kawaguchi, Ryota Minowa, Yasuo Hayashida, Kohei Otsuka, Shingo Mori, Hiroyuki Iwasaka
  • Patent number: 11341608
    Abstract: Provided is an information processing device configured to: acquire an image captured according to an imaging instruction by an imaging device mounted to a mobile object; acquire sensor information including position information about the mobile object from a sensor device according to a signal transmitted from the imaging device in response to the imaging instruction; and associate the acquired sensor information with the acquired image.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: May 24, 2022
    Assignee: SONY CORPORATION
    Inventors: Hiroshi Mori, Hiroyuki Sano, Hideo Miyamaki, Masato Tsujie, Yoichiro Sato
  • Patent number: 11335699
    Abstract: In one embodiment, a semiconductor device includes a substrate, insulating films and first films alternately stacked on the substrate, at least one of the first films including an electrode layer and a charge storage layer provided on a face of the electrode layer via a first insulator, and a semiconductor layer provided on a face of the charge storage layer via a second insulator. The device further includes at least one of a first portion including nitrogen and provided between the first insulator and the charge storage layer with an air gap provided in the first insulator, a second portion including nitrogen, provided between the charge storage layer and the second insulator, and including a portion protruding toward the charge storage layer, and a third portion including nitrogen and provided between the second insulator and the semiconductor layer with an air gap provided in the first insulator.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: May 17, 2022
    Assignee: KIOXIA CORPORATION
    Inventors: Keiichi Sawa, Kazuhiro Matsuo, Kazuhisa Matsuda, Hiroyuki Yamashita, Yuta Saito, Shinji Mori, Masayuki Tanaka, Kenichiro Toratani, Atsushi Takahashi, Shouji Honda
  • Publication number: 20220145424
    Abstract: To improve adhesion between a plating film reducing contact electrical resistance and a copper alloy plate containing Mg. A copper alloy plate containing Mg of more than 1.2% by mass and 2% by mass or less and the balance Cu and inevitable impurities in a center portion in a plate thickness direction, in the copper alloy plate, a surface Mg concentration at a surface is 30% or less of a center Mg concentration at the center portion in the plate thickness direction, a surface layer portion having a depth from the surface to where a Mg concentration is 90% of the center Mg concentration is provided, and in the surface layer portion, the Mg concentration increases from the surface toward the center portion of the plate thickness direction with a concentration gradient of 0.2% by mass/?m or more and 50% by mass/?m or less.
    Type: Application
    Filed: March 25, 2020
    Publication date: May 12, 2022
    Applicant: MITSUBISHI MATERIALS CORPORATION
    Inventors: Naoki Miyashima, Takanori Kobayashi, Kazunari Maki, Shinichi Funaki, Hiroyuki Mori, Yuki Ito
  • Patent number: 11312580
    Abstract: An article sorting facility includes a plurality of storage members each configured to store one or more articles, a plurality of article transport vehicles each capable of traveling in at least a portion of a preset travel lane with one or more support members on board, each support member being configured to support one or more articles; a plurality of work areas each configured to allow work to be performed to transfer articles between one or more storage members and at least one of the one or more support members on board an article transport vehicle in the travel lane, wherein each of the work areas is located adjacent to one or more storage members and to the travel lane, wherein the plurality of work areas are arranged one adjacent to another along the travel lane, and wherein two or more article transport vehicles are in the travel lane simultaneously to travel in a line.
    Type: Grant
    Filed: December 24, 2020
    Date of Patent: April 26, 2022
    Assignee: Daifuku Co., Ltd.
    Inventor: Hiroyuki Mori
  • Patent number: 11306847
    Abstract: A valve device includes: valves configured to control a flow of processing gases supplied to a process vessel; a housing in which first flow paths through which the processing gases flow are formed; a heat diffuser configured to cover the housing and diffuse heat of the housing; a heating part configured to cover the housing covered with the heat diffuser and heat the housing via the heat diffuser; a supply configured to supply a coolant to a second flow path formed between the housing and the heat diffuser; and a controller configure to control the heating part to heat the housing to a first temperature when a predetermined process is performed on a target substrate, and before a start of a cleaning process of the process vessel, control the heating part to stop heating of the housing and control the supply to supply the coolant to the second flow path.
    Type: Grant
    Filed: August 12, 2019
    Date of Patent: April 19, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Tomohisa Kimoto, Yuichi Furuya, Takashi Kakegawa, Eiichi Komori, Hideaki Fujita, Hiroyuki Mori
  • Publication number: 20220065338
    Abstract: In a differential device in which a differential case has a pair of case half bodies that are mutually adjacently disposed in the axial direction, one case half body has a cutout part that extends in the axial direction while having one end opening on a face opposing the other case half body and that enables a shaft portion of a pinion shaft to be inserted thereinto, the other case half body has a support projecting portion that is fitted into the cutout part in the axial direction, and in an assembled state of the differential device in which the pair of case half bodies are joined to each other, the shaft portion of the pinion shaft inserted into the cutout part is held between the cutout part and the support projecting portion, and the pinion shaft is fixed to the differential case. Such differential device has easy assembly.
    Type: Application
    Filed: January 21, 2020
    Publication date: March 3, 2022
    Inventors: Toshiki KATO, Hiroyuki MORI, Yusuke SHINJO
  • Patent number: 11264314
    Abstract: An interconnection structure is disclosed. The interconnection structure includes a base substrate, a set of conductive pads disposed on the base substrate and an interconnection layer disposed on the base substrate. The interconnection layer has an edge located next to the set of the conductive pads and includes a set of side connection pads located and disposed at the edge of the interconnection layer. Each side connection pad is arranged with respect to a corresponding one of the conductive pads disposed on the base substrate.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: March 1, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Risa Miyazawa, Takahito Watanabe, Hiroyuki Mori, Keishi Okamoto
  • Patent number: 11246498
    Abstract: A sensor includes a light emitting element, a photodetector element for receiving light emitted by the light emitting element, and a circuit board having the light emitting element and the photodetector element mounted thereon. A light emitting surface of the light emitting element is facing the circuit board which is provided with a light-transmitting portion for transmitting the light emitted by the light emitting element.
    Type: Grant
    Filed: December 16, 2015
    Date of Patent: February 15, 2022
    Assignee: KYOCERA Corporation
    Inventors: Yuji Masuda, Hiroyuki Mori
  • Publication number: 20220025486
    Abstract: This pure copper plate includes Cu having a purity of 99.96 mass % or higher, with a remainder of unavoidable impurities, wherein an amount of P is 2 mass ppm or less, and a total amount of Pb, Se, and Te is 10 mass ppm or less. The amount of S may be in a range of 2 mass ppm or more and 20 mass ppm or less.
    Type: Application
    Filed: December 11, 2019
    Publication date: January 27, 2022
    Applicant: MITSUBISHI MATERIALS CORPORATION
    Inventors: Yuki ITO, Hiroyuki MORI, Hiroyuki MATSUKAWA, Norihisa IIDA, Motohiro HITAKA
  • Publication number: 20220020799
    Abstract: There is provided a imaging device including: an N-type region formed for each pixel and configured to perform photoelectric conversion; an inter-pixel light-shielding wall penetrating a semiconductor substrate in a depth direction and formed between N-type regions configured to perform the photoelectric conversion, the N-type regions each being formed for each of pixels adjacent to each other; a P-type layer formed between the N-type region configured to perform the photoelectric conversion and the inter-pixel light-shielding wall; and a P-type region adjacent to the P-type layer and formed between the N-type region and an interface on a side of a light incident surface of the semiconductor substrate.
    Type: Application
    Filed: September 29, 2021
    Publication date: January 20, 2022
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Tetsuya UCHIDA, Ryoji SUZUKI, Hisahiro ANSAI, Yoichi Ueda, Shinichi YOSHIDA, Yukari TAKEYA, Tomoyuki HIRANO, Hiroyuki MORI, Hirotoshi NOMURA, Yoshiharu KUDOH, Masashi OHURA, Shin IWABUCHI
  • Patent number: 11193205
    Abstract: A source material container includes a housing, a tray assembly and a plurality of cylindrical members. The housing provides a carrier gas introduction port and an opening through which a gas containing source material vapor is outputted. The tray assembly trays stacked in the housing. The cylindrical members are arranged in a radial direction between the tray assembly and the housing. The outermost cylindrical member provides a slit and each of the other cylindrical members than the outermost cylindrical member provides a plurality of slits. From the introduction port to the gap between the tray assembly and the innermost cylindrical member, the flow path of the carrier gas is branched in a stepwise manner in the height direction.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: December 7, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Yuichi Furuya, Hiroyuki Mori, Einosuke Tsuda, Eiichi Komori, Tomohisa Kimoto
  • Publication number: 20210363612
    Abstract: This copper alloy for electronic or electric devices includes: Mg: 0.15 mass % or greater and less than 0.35 mass %; and P: 0.0005 mass % or greater and less than 0.01 mass %, with a remainder being Cu and unavoidable impurities, wherein an amount of Mg [Mg] and an amount of P [P] in terms of mass ratio satisfy [Mg]+20×[P]<0.5, and 0.20<(NFJ2/(1?NFJ3))0.5?0.45 is satisfied in a case where a proportion of J3, in which all three grain boundaries constituting a grain boundary triple junction are special grain boundaries, to total grain boundary triple junctions is represented by NFJ3, and a proportion of J2, in which two grain boundaries constituting a grain boundary triple junction are special grain boundaries and one grain boundary is a random grain boundary, to the total grain boundary triple junctions is represented by NFJ2.
    Type: Application
    Filed: March 28, 2019
    Publication date: November 25, 2021
    Applicant: MITSUBISHI MATERIALS CORPORATION
    Inventors: Hirotaka MATSUNAGA, Kenichiro KAWASAKI, Hiroyuki MORI, Kazunari MAKI, Yoshiteru AKISAKA
  • Publication number: 20210356033
    Abstract: In a differential device including a pair of side gears, a plurality of pinion gears and a pinion shaft, the pinion shaft includes a plurality of shaft parts rotatably fitted to and supporting the plurality of pinion gears respectively, and an annular support part linking the plurality of shaft parts to each other, an annular recess portion is formed in an inner peripheral face of the support part, the pinion shaft has an oil guide part that guides lubricating oil within the recess portion to a part where the shaft part and the pinion gear are fitted together, and an inner end portion of at least one of the side gears protrudes into an inner space of the support part and is positioned within a width of the recess portion in an axial direction of the rotating shaft.
    Type: Application
    Filed: October 23, 2019
    Publication date: November 18, 2021
    Inventors: Hirohisa ODA, Hiroyuki MORI
  • Patent number: 11171167
    Abstract: There is provided a imaging device including: an N-type region formed for each pixel and configured to perform photoelectric conversion; an inter-pixel light-shielding wall penetrating a semiconductor substrate in a depth direction and formed between N-type regions configured to perform the photoelectric conversion, the N-type regions each being formed for each of pixels adjacent to each other; a P-type layer formed between the N-type region configured to perform the photoelectric conversion and the inter-pixel light-shielding wall; and a P-type region adjacent to the P-type layer and formed between the N-type region and an interface on a side of a light incident surface of the semiconductor substrate.
    Type: Grant
    Filed: February 22, 2018
    Date of Patent: November 9, 2021
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Tetsuya Uchida, Ryoji Suzuki, Hisahiro Ansai, Yoichi Ueda, Shinichi Yoshida, Yukari Takeya, Tomoyuki Hirano, Hiroyuki Mori, Hirotoshi Nomura, Yoshiharu Kudoh, Masashi Ohura, Shin Iwabuchi
  • Publication number: 20210343545
    Abstract: An interconnection layer carrying structure for transferring an interconnection layer onto a substrate is disclosed. The interconnection layer carrying structure includes a support substrate, a release layer on the support substrate; and an interconnection layer on the release layer. The interconnection layer includes an organic insulating material and a set of pads embedded in the organic insulating material. The set of the pads is configured to face towards the support substrate. The support substrate has a base part where the interconnection layer is formed and an extended part extending outside the base part.
    Type: Application
    Filed: July 15, 2021
    Publication date: November 4, 2021
    Inventors: Keishi Okamoto, Akihiro Horibe, Hiroyuki Mori
  • Patent number: 11154001
    Abstract: An inspection management system having a plurality of processes and managing final inspection performed to inspect a completed product and one or more intermediate inspections performed to inspect an intermediate product manufactured in the processes earlier than a final process includes: an inspection content data acquisition unit that acquires inspection content data including an inspection standard for each inspection item of the product; an inspection content setting unit that sets inspection content based on the inspection content data acquired by the inspection content data acquisition unit; a simulation unit that simulates inspection in accordance with assumed inspection content; an inspection standard calculation unit that calculates an inspection standard more appropriate than a current inspection standard based on the simulation; and an output unit that outputs base information indicating that at least the inspection standard calculated by the inspection standard calculation unit is more appropriate
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: October 19, 2021
    Assignee: OMRON Corporation
    Inventors: Hiroyuki Mori, Katsuki Nakajima, Takako Onishi, Isao Nakanishi, Mayuko Tanaka
  • Patent number: 11114308
    Abstract: An interconnection layer carrying structure for transferring an interconnection layer onto a substrate is disclosed. The interconnection layer carrying structure includes a support substrate, a release layer on the support substrate; and an interconnection layer on the release layer. The interconnection layer includes an organic insulating material and a set of pads embedded in the organic insulating material. The set of the pads is configured to face towards the support substrate. The support substrate has a base part where the interconnection layer is formed and an extended part extending outside the base part.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: September 7, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Keishi Okamoto, Akihiro Horibe, Hiroyuki Mori