Patents by Inventor Hiroyuki Moriya

Hiroyuki Moriya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120093746
    Abstract: An amino acid-modified organopolysiloxane can be prepared under mild reaction conditions by reacting an amino-modified organopolysiloxane with an amino acid or amino acid derivative ester in the presence of an organometallic catalyst. The amino acid-modified organopolysiloxane having a hydrophilic group is useful in cosmetics, powder surface treatment, fiber or fabric treatment, coating, and resin modification.
    Type: Application
    Filed: October 6, 2011
    Publication date: April 19, 2012
    Applicant: Shin-Etsu Chemical Co., Ltd.
    Inventor: Hiroyuki MORIYA
  • Patent number: 8025725
    Abstract: According to the present invention, there is provided a temperature-sensitive aluminum phosphate solution, characterized in that, composition of the aluminum phosphate is within such ranges that 3Al2O3/P2O5 (molar ratio) is from 1.2 to 1.5, M2O/P2O5 (molar ratio) (M is an alkali metal) is from 0.02 to 0.15 and concentration of Al2O3 is from 2 to 8% by mass and the sensing temperature is within a temperature range of from 20 to 100° C. The solution is particularly useful as an antioxidant for carbon materials.
    Type: Grant
    Filed: December 11, 2007
    Date of Patent: September 27, 2011
    Assignee: Taki Chemical Co., Ltd.
    Inventors: Shohei Matsuda, Hiroaki Hani, Koji Yamada, Hiroyuki Moriya, Shinichiro Orai
  • Publication number: 20110144369
    Abstract: An amino acid-modified organopolysiloxane is provided. It has an amino acid derivative bonded to at least one silicon atom of the organopolysiloxane segment constituting the backbone of the organopolysiloxane via an amide bond represented by the following general formula (1): wherein X and Y are independently a C1-10 divalent hydrocarbon group; m is an integer of 0 to 4; Ra is hydrogen atom, a monovalent hydrocarbon group containing 1 to 4 carbon atoms, or an organic group represented by the following general formula (2): (wherein Rb is hydrogen atom, a C1-7 monovalent hydrocarbon group, an alkaline metal, or an alkaline earth metal, and Rc is independently hydrogen atom, hydroxy group, or a C1-10 monovalent hydrocarbon group optionally containing oxygen atom, sulfur atom, or nitrogen atom); and Z is an organic group represented by the general formula (2).
    Type: Application
    Filed: December 10, 2010
    Publication date: June 16, 2011
    Inventor: Hiroyuki MORIYA
  • Publication number: 20110063384
    Abstract: A disclosed liquid container containing liquid to be supplied to a liquid discharge head includes a container main body defining a liquid containing section and including an opening section formed in one surface of the container main body, the opening section including an opening; and a film-like flexible member sealing the opening section of the container main body. Further, the film-like flexible member is joined with a joint section formed on the opening section of the container main body in a state where the film-like flexible member is bent, and a concave-convex structure is formed in the circumferential direction of the joint section.
    Type: Application
    Filed: September 9, 2010
    Publication date: March 17, 2011
    Applicant: RICOH COMPANY, LTD.
    Inventors: Takuya Uchida, Hiroyuki Moriya, Hideki Watanabe
  • Publication number: 20110052523
    Abstract: An organopolysiloxane compound having a weight average molecular weight of 300 to 200,000 and having in one molecule at least one organic group represented by the following formula (1) and at least one selected from (SiO2) unit and (R1SiO3/2) unit, wherein R2 represents a hydrogen atom, an alkyl group having 1 to 6 carbon atoms, or an alkali metal, A independently represents an alkylene group, B represents —NR3—, sulfur or oxygen atom, n is 0 or 2, n1 is 0 or 1, and n2 is 0 or 1 provided that when n is 0 and n2 is 1, n1 is 1, when n is 2 and n2 is 1, n1 is 0 or 1, and when n is 2 and n2 is 0, n1 is 0.
    Type: Application
    Filed: August 26, 2010
    Publication date: March 3, 2011
    Inventors: Hiroyuki MORIYA, Masanao KAMEI, Teruki IKEDA
  • Publication number: 20110042279
    Abstract: A classification device includes: a classification channel, a particle dispersion delivery channel having an opening for introducing a particle dispersion at one end thereof with the other end connected to the classification channel via a junction, a conveying fluid feed channel having an opening for introducing a conveying fluid at one end thereof with the other end connected to the classification channel, and at least one collection channel for collecting separated particles, the collection channel having an opening at one end thereof with the other end connected to the classification channel, the junction and the classification channel having substantially equal widths, and at least one of the at least one collection channel having a bottom wall with an upwardly convex shape in the middle portion of its width.
    Type: Application
    Filed: March 22, 2010
    Publication date: February 24, 2011
    Applicant: FUJI XEROX CO., LTD.
    Inventors: Hiroyuki MORIYA, Kazuya HONGO, Hiroshi KOJIMA, Seiichi TAKAGI, Tetsuo OHTA
  • Publication number: 20100124717
    Abstract: Colored resin particles, each includes: a resin; and a colorant, wherein a value of average equivalent circle diameter A (?m) of the colored resin particles is 3?A?6, an average degree of circularity B of the colored resin particles satisfies the following expression (1), and 0.990?0.0083A?B?1.021?0.0117A??(1) a cumulative number frequency of particles which have degrees of circularity of less than 0.9 in the colored resin particles is 1% or less.
    Type: Application
    Filed: May 13, 2009
    Publication date: May 20, 2010
    Applicant: FUJI XEROX CO., LTD.
    Inventors: Tomohito NAKAJIMA, Hiroyuki MORIYA, Hideya KATSUHARA, Seiichi TAKAGI, Kazuya HONGO
  • Publication number: 20100125106
    Abstract: A blending apparatus is provided, the blending apparatus including: an outer tube; and at least one inner tube disposed inside the outer tube, wherein a distal end, in a lengthwise direction, of the inner tube is located at an intermediate position, in a lengthwise direction, of the outer tube, and the inner tube has plural of through holes in a vicinity of the distal end thereof.
    Type: Application
    Filed: April 23, 2009
    Publication date: May 20, 2010
    Applicant: FUJI XEROX CO., LTD.
    Inventors: Hideya KATSUHARA, Hiroyuki MORIYA, Tomohito NAKAJIMA, Kazuya HONGO
  • Publication number: 20100052204
    Abstract: A method for manufacturing aggregated resin particles, includes: preparing a microreactor that includes a first flow channel, a second flow channel, and a confluent flow channel, to which the first flow channel and the second flow channel merge; introducing a first fluid that contains resin particles dispersed therein into the first flow channel; introducing a second fluid that contains an aggregating agent into the second flow channel; feeding the first and second fluids so that a feed amount per unit time of the second fluid is greater than a feed amount per unit time of the first fluid, so as to form a laminar flow, in which the first fluid and the second fluid are merged, in the confluent flow channel; and forming aggregated resin particles by aggregating the resin particles.
    Type: Application
    Filed: February 27, 2009
    Publication date: March 4, 2010
    Applicant: FUJI XEROX CO., LTD.
    Inventors: Seiichi TAKAGI, Hiroyuki MORIYA, Hideya KATSUHARA, Tomohito NAKAJIMA, Takashi IMAI, Shingo ISHIMARU
  • Publication number: 20090208638
    Abstract: According to the present invention, there is provided a temperature-sensitive aluminum phosphate solution, characterized in that, composition of the aluminum phosphate is within such ranges that 3Al2O3/P2O5 (molar ratio) is from 1.2 to 1.5, M2O/P2O5 (molar ratio) (M is an alkali metal) is from 0.02 to 0.15 and concentration of Al2O3 is from 2 to 8% by mass and the sensing temperature is within a temperature range of from 20 to 100° C. The solution is particularly useful as an antioxidant for carbon materials.
    Type: Application
    Filed: December 11, 2007
    Publication date: August 20, 2009
    Applicant: TAKI CHEMICAL CO., LTD.
    Inventors: Shohei Matsuda, Hiroaki Hani, Koji Yamada, Hiroyuki Moriya, Shinichiro Orai
  • Publication number: 20060288882
    Abstract: The present invention relates to a zero point correction circuit for a load meter used for a press machine or the like, and more particularly to a configuration with which a zero point correction is made a plurality of times after a predetermined amount of time elapses, after press processing is performed, and a zero point correction value is set by calculating an average value of measured values. The predetermined amount of time is measured, for example, with an internal timer or the like, a sampling process is performed after the predetermined amount of time elapses, and an average value of sampled values is calculated and set as a zero point correction value, whereby an accurate zero point correction value can be obtained.
    Type: Application
    Filed: March 3, 2006
    Publication date: December 28, 2006
    Inventor: Hiroyuki Moriya
  • Patent number: 6858497
    Abstract: The present invention prevents production of residue which causes short-circuit between word lines. A memory cell comprises a channel formation region CH, charge storage films CSF each comprised of a plurality of stacked dielectric films, two storages comprised of regions of the charge storage films CSF overlapping the two ends of the channel formation region CH, a single-layer dielectric film DF2 contacting the channel formation region CH between the storages, auxiliary layers (for example, bit lines BL1 and BL2) formed on two impurity regions S/D, two first control electrodes CG1 and CG2 formed on the auxiliary layers with dielectric film interposed and positioned on the storages, and a second control electrode WL buried in a state insulated from the first control electrodes CG1 and CG2 in a space between them and contacting the single-layer dielectric film DF2.
    Type: Grant
    Filed: August 19, 2004
    Date of Patent: February 22, 2005
    Assignee: Sony Corporation
    Inventors: Hiroyuki Moriya, Toshio Kobayashi
  • Publication number: 20050020013
    Abstract: The present invention prevents production of residue which causes short-circuit between word lines. A memory cell comprises a channel formation region CH, charge storage films CSF each comprised of a plurality of stacked dielectric films, two storages comprised of regions of the charge storage films CSF overlapping the two ends of the channel formation region CH, a single-layer dielectric film DF2 contacting the channel formation region CH between the storages, auxiliary layers (for example, bit lines BL1 and BL2) formed on two impurity regions S/D, two first control electrodes CG1 and CG2 formed on the auxiliary layers with dielectric film interposed and positioned on the storages, and a second control electrode WL buried in a state insulated from the first control electrodes CG1 and CG2 in a space between them and contacting the single-layer dielectric film DF2.
    Type: Application
    Filed: August 19, 2004
    Publication date: January 27, 2005
    Inventors: Hiroyuki Moriya, Toshio Kobayashi
  • Patent number: 6803620
    Abstract: The present invention prevents production of residue which causes short-circuit between word lines. A memory cell comprises a channel formation region CH, charge storage films CSF each comprised of a plurality of stacked dielectric films, two storages comprised of regions of the charge storage films CSF-overlapping the two ends of the channel formation region CH, a single-layer dielectric film DF2 contacting the channel formation region CH between the storages, auxiliary layers (for example, bit lines BL1 and BL2) formed on two impurity regions S/D, two first control-electrodes CG1 and CG2 formed on the auxiliary layers with dielectric film interposed and positioned on the storages, and a second control electrode WL buried in a state insulated from the first control electrodes CG1 and CG2 in a space between them and contacting the single-layer dielectric film DF2.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: October 12, 2004
    Assignee: Sony Corporation
    Inventors: Hiroyuki Moriya, Toshio Kobayashi
  • Publication number: 20040181662
    Abstract: This invention is intended to build a system with service cores integrated. A user terminal sends authentication information and area information to an image service providing server via a network. The image service providing server receives the authentication information and the area information from the user terminal, selects an authentication server of an area corresponding to the area information from among authentication servers of all areas, and sends the authentication information received from the user terminal to the selected authentication server via the network. The authentication server receives the authentication information of the user terminal from the image service providing server and executes the authentication of the user terminal on the basis of the received authentication information. The present invention is applicable to image service providing systems which provide image-based services.
    Type: Application
    Filed: August 28, 2003
    Publication date: September 16, 2004
    Inventors: Shinichi Kanai, Tsunetake Noma, Masataro Yamaguchi, Atsushi Fuse, Takamasa Iwade, Kou Fujiwara, Hiroyuki Moriya, Kazushi Yoshida
  • Patent number: 6721205
    Abstract: A nonvolatile semiconductor memory device with high reliability (free from troubles in storing data), a high charge injection efficiency, and enabling parallel operation in a VG cell array, includes channel forming regions, a charge storing film which consists of stacked dielectric films and is capable of storing a charge, two storage portions forming parts of the charge storing film and overlapping the channel forming regions, a single layer dielectric film between the storage portions and in contact with the channel forming region, a control gate electrode on the single layer dielectric film, and a memory gate electrode on the storage portions.
    Type: Grant
    Filed: December 14, 2000
    Date of Patent: April 13, 2004
    Assignee: Sony Corporation
    Inventors: Toshio Kobayashi, Hiroyuki Moriya, Ichiro Fujiwara
  • Publication number: 20030161192
    Abstract: A nonvolatile semiconductor memory device with high reliability (free from troubles in storing data), a high charge injection efficiency, and enabling parallel operation in a VG cell array, includes channel forming regions, a charge storing film which consists of stacked dielectric films and is capable of storing a charge, two storage portions forming parts of the charge storing film and overlapping the channel forming regions, a single layer dielectric film between the storage portions and in contact with the channel forming region, a control gate electrode on the single layer dielectric film, and a memory gate electrode on the storage portions.
    Type: Application
    Filed: December 14, 2000
    Publication date: August 28, 2003
    Inventors: Toshio Kobayashi, Hiroyuki Moriya, Ichiro Fujiwara
  • Publication number: 20030053345
    Abstract: The present invention prevents production of residue which causes short-circuit between word lines. A memory cell comprises a channel formation region CH, charge storage films CSF each comprised of a plurality of stacked dielectric films, two storages comprised of regions of the charge storage films CSF overlapping the two ends of the channel formation region CH, a single-layer dielectric film DF2 contacting the channel formation region CH between the storages, auxiliary layers (for example, bit lines BL1 and BL2) formed on two impurity regions S/D, two first control electrodes CG1 and CG2 formed on the auxiliary layers with dielectric film interposed and positioned on the storages, and a second control electrode WL buried in a state insulated from the first control electrodes CG1 and CG2 in a space between them and contacting the single-layer dielectric film DF2.
    Type: Application
    Filed: October 2, 2002
    Publication date: March 20, 2003
    Inventors: Hiroyuki Moriya, Toshio Kobayashi
  • Patent number: 5661320
    Abstract: In method of manufacturing a DRAM by using a laminate SOI technique, which makes it possible to form a thin semiconductor film of a uniform thickness, the method includes steps of forming a step portion on a major surface of a silicon substrate, forming an insulating film on the major surface of the silicon substrate, forming a capacitor which is connected to the step potion through a contact hole formed through the insulating film on the step portion, grinding the silicon substrate from the other major surface thereof after a support substrate is laminated onto the silicon substrate to remain the step portion, forming a thin silicon film on the insulating film by lateral epitaxial growth process based on the silicon of the remaining step portion serving as a seed for the lateral epitaxial growth, and forming a MOS transistor in the thin silicon film.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: August 26, 1997
    Assignee: Sony Corporation
    Inventor: Hiroyuki Moriya
  • Patent number: 5547135
    Abstract: A micromilling device includes a milling chamber, a sorter located in the milling chamber for sorting solid material, nozzles for injecting a stream of solid particles to be milled into the chamber in a predetermined path, and impact elements positioned in the path for impacting the stream of solid material.
    Type: Grant
    Filed: April 8, 1994
    Date of Patent: August 20, 1996
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: Hiroyuki Moriya, Junichi Tomonaga, Kiyoshi Hashimoto, Kazunari Muraoka