Patents by Inventor Hisao Honma

Hisao Honma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050144383
    Abstract: The present invention provides a storage control device which enables the time between failures to prolong as much as possible, though it uses HDD's whose mean time between failures is relatively short. The storage control device controls spindle motors in a manner that a spindle motor is rotated regarding the HDD of data which can access from a host computer and a spindle motor is stopped regarding the HDD of data which are clearly judged that a host computer does not access the data. Whether the host computers can access the HDD or not is judged by the fact that whether the memory region (internal logical volume) provided by the HDD is in mapped to the host logical volume or not which is recognized by the host computer and is able to access thereby.
    Type: Application
    Filed: March 19, 2004
    Publication date: June 30, 2005
    Inventors: Seiichi Higaki, Hisao Honma
  • Publication number: 20050132136
    Abstract: The present invention provides a technique for, in the case in which a failure has occurred in a shared memory, controlling a period of a pseudo through operation to reduce a period in which performance of a disk array device falls. Control information is divided into management information, which is required to be duplexed, and directory information, which is only required to simplexed, and the management information and the directory information are stored in separate shared memories. In the case in which a failure has occurred in the shared memory of an expanded memory unit (Option) storing the directory information, the directory information is reestablished in the shared memory of a basic memory unit (Basic). The pseudo through operation is cancelled at the point when the directory information is reestablished. After a package of the expanded memory unit is replaced with a normal product, the directory information is reestablished again.
    Type: Application
    Filed: February 2, 2004
    Publication date: June 16, 2005
    Inventors: Masao Inoue, Katsuhiro Okumoto, Hisao Honma
  • Publication number: 20040221103
    Abstract: When storage controllers are added to a storage system to change the storage system from a configuration having only one storage controller to a configuration having plural storage controllers, or when storage controllers are removed from the storage system to change the storage system from a configuration having plural storage controllers to a configuration having only one storage controller, a controller-internal management-information memory controller carries out a copy process to copy management information from each of the storage controllers to a management-information-memory switch or vice versa at the same time as processing of read and write requests for access to the management information, made by a channel interface or a disc interface, in order to change storage locations of the management information while processing the read and write requests made by the host.
    Type: Application
    Filed: June 8, 2004
    Publication date: November 4, 2004
    Applicant: Hitachi, Ltd.
    Inventors: Noboru Morishita, Hiroshi Arakawa, Seiji Kaneko, Hisao Honma
  • Publication number: 20040153691
    Abstract: In a shared bus connection scheme or an individual path connection scheme, a fault caused at a part of a system affects the same in its entirety. Also, these schemes do not permit the determination of fault locations. Adapters 11, 12 are connected to shared memories 21, 22 with a plurality of individual paths 31 through 38. An address locking unit (not shown) is arranged in each of the shared memories 21, 22 to perform address lock check on memory access operations from the adapters 11, 12. If an address to be accessed is in the locked state, the access is held in the lock wait state until the address is unlocked. The access is made when the address locking is cleared.
    Type: Application
    Filed: June 23, 2003
    Publication date: August 5, 2004
    Applicants: Hitachi, Ltd., Hitachi Software Engineering Co., Ltd.
    Inventors: Takeo Fujimoto, Hisao Honma, Katsuhiro Okumoto, Osamu Sakaguchi
  • Patent number: 6757792
    Abstract: When storage controllers are added to a storage system to change the storage system from a configuration having only one storage controller to a configuration having plural storage controllers, or when storage controllers are removed from the storage system to change the storage system from a configuration having plural storage controllers to a configuration having only one storage controller, a controller-internal management-information memory controller carries out a copy process to copy management information from each of the storage controllers to a management-information-memory switch or vice versa at the same time as processing of read and write requests for access to the management information, made by a channel interface or a disc interface, in order to change storage locations of the management information while processing the read and write requests made by the host.
    Type: Grant
    Filed: September 5, 2001
    Date of Patent: June 29, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Noboru Morishita, Hiroshi Arakawa, Seiji Kaneko, Hisao Honma
  • Publication number: 20040073750
    Abstract: A storage control apparatus is coupled to a central processing unit (CPU) and a storage unit to control input/output of data between the CPU and the storage unit. The storage control apparatus has at least two processors coupled to the CPU and the storage unit, a cashe memory (CM) unit for temporarily storing data of the storage unit, a shared memory (SM) unit for storing information concerning control of the CM unit and the storage unit, and a selector coupled to the at least two processors, the CM unit and the SM unit through access paths to selectively apply access requests from the at least two processors to the CM unit and the SM unit.
    Type: Application
    Filed: July 7, 2003
    Publication date: April 15, 2004
    Applicant: Hitachi, Ltd.
    Inventors: Kenji Yamagami, Kazuhisa Fujimoto, Yasuo Kurosu, Hisao Honma
  • Publication number: 20030204683
    Abstract: A method for controlling shared memories permits I/O data exchange among storage controllers. A storage controller is provided for each of a plurality of disk array devices. Each storage controller includes at least one shared memory. Each shared memory stores information about the disk array devices. On each shared memory, addresses of the shared memories of other storage controllers are stored. An I/O request is received from a host device with one storage controller A. The storage controller A identifies an address of a shared memory managing a volume that is a target of the request. If the address is of a shared memory of another storage controller B, the storage controller A issues an instruction to a switching device to establish a connection path between the storage controller A's memory and the storage controller B's memory. The host device is notified that a connection path has been established.
    Type: Application
    Filed: April 30, 2003
    Publication date: October 30, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Katsuhiro Okumoto, Hisao Honma
  • Publication number: 20030167375
    Abstract: There is raised a demand for a storage system having a configuration easy to change and having a capability of executing centralized management of management information so as to prevent performance to access the management information from deteriorating. It is also desirable to provide a storage system which allows a host to make accesses to a disc storage of the storage system without suspending the operation of the storage system even while the configuration of the storage system is being changed.
    Type: Application
    Filed: September 5, 2001
    Publication date: September 4, 2003
    Inventors: Noboru Morishita, Hiroshi Arakawa, Seiji Kaneko, Hisao Honma
  • Patent number: 6601134
    Abstract: A storage control apparatus is coupled to a central processing unit (CPU) and a storage unit to control input/output of data between the CPU and the storage unit. The storage control apparatus has at least two processors coupled to the CPU and the storage unit, a cache memory (CM) unit for temporarily storing data of the storage unit, a shared memory (SM) unit for storing information concerning control of the CM unit and the storage unit, and a selector coupled to the at least two processors, the CM unit and the SM unit through access paths to selectively apply access requests from the at least two processors to the CM unit and the SM unit.
    Type: Grant
    Filed: April 26, 1999
    Date of Patent: July 29, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Kenji Yamagami, Kazuhisa Fujimoto, Yasuo Kurosu, Hisao Honma
  • Publication number: 20020194435
    Abstract: A storage control apparatus is coupled to a central processing unit (CPU) and a storage unit to control input/output of data between the CPU and the storage unit. The storage control apparatus has at least two processors coupled to the CPU and the storage unit, a cashe memory (CM) unit for temporarily storing data of the storage unit, a shared memory (SM) unit for storing information concerning control of the CM unit and the storage unit, and a selector coupled to the at least two processors, the CM unit and the SM unit through access paths to selectively apply access requests from the at least two processors to the CM unit and the SM unit.
    Type: Application
    Filed: August 13, 2002
    Publication date: December 19, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Kenji Yamagami, Kazuhisa Fujimoto, Yasuo Kurosu, Hisao Honma
  • Publication number: 20020006742
    Abstract: An electrical connection box 1 having circuit boards 41, 42 contained in a case. The circuit boards 41, 42 are assigned to a power supply system for start and travelling of an automobile and a power supply system for general loads, respectively.
    Type: Application
    Filed: November 29, 1999
    Publication date: January 17, 2002
    Applicant: THE FURUKAWA ELECTRIC CO., LTD.
    Inventors: TOSHITAKA HARA, HISAO HONMA, YUTAKA MATSUDA, JUTARO MUKAI, MITSUO TANAKA
  • Publication number: 20010037403
    Abstract: In performing the issuance of a license key to a user through a selling agent or the like on line, the issuance of the license key is performed from a manufacturer to the selling agent or the like in such a manner that information which the selling agent or the like wants to keep in secret is prevented from being transmitted to the manufacturer. Further, when a deadline of a trial period by a trial license key is coming very close, a special license key which extends the deadline of the trial period is issued. In operation, the sales computer receives client information, a product number and a license program name inputted by a purchaser computer and transfers such information from which the client information is eliminated to the license-issuing computer. The license-issuing computer issues the license key when the authentication of the product number is normally finished. Further, the present invention provides a trial license key to a user.
    Type: Application
    Filed: April 24, 2001
    Publication date: November 1, 2001
    Inventors: Masao Mougi, Hisao Honma, Makoto Kogai
  • Patent number: 5606529
    Abstract: A semiconductor storage device transfers data with an information processing device and includes a non-volatile semiconductor memory in which data is electrically re-writable, a volatile semiconductor memory connected to the non-volatile memory and temporarily storing data of the non-volatile semiconductor memory, and a CPU connected to the volatile semiconductor memory and the non-volatile semiconductor memory. The CPU controls the transfer of data among the non-volatile memory, the volatile memory and the CPU. The CPU also transfers data with the information processing device in accordance with a fixed-length form for data. When an access from the CPU to the volatile semiconductor makes a miss hit (i.e., misses), the CPU accesses the non-volatile semiconductor memory. When a failure is generated in the non-volatile semiconductor memory or when a predicted service life of the non-volatile semiconductor memory is elapsed, the non-volatile semiconductor memory can be substituted by an alternate memory.
    Type: Grant
    Filed: March 6, 1996
    Date of Patent: February 25, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Hisao Honma, Kazuo Nakagoshi, Naoya Takahashi, Makoto Kogai, Kenichi Takamoto
  • Patent number: 5546348
    Abstract: A semiconductor storage device is connected to at least one magnetic storage device. The input and output of data is made between the semiconductor storage device and an information processing device.
    Type: Grant
    Filed: December 20, 1994
    Date of Patent: August 13, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Hisao Honma, Kazuo Nakagoshi, Naoya Takahashi, Makoto Kogai, Kenichi Takamoto
  • Patent number: 5075107
    Abstract: A dental composition comprises a powdery component and a liquid component, which are mixed together to use it as a tissue condition, (a) the powdery component is at least one of a copolymer of butyl methacrylate with ethyl methacrylate or a mixture of poly butyl methacrylate with poly ethyl methacrylate, and (b) the liquid component is at least one of butyl phthalyl butyl glycolate (BPBG), dibutyl phthalate (DBP), benzylbutyl phthalate, benzyl benzoate, ethyl benzoate, butyl benzoate and amyl benzoate.
    Type: Grant
    Filed: June 6, 1990
    Date of Patent: December 24, 1991
    Assignee: G-C Dental Industrial Corp.
    Inventors: Naoyuki Katakura, Hisao Honma, Makoto Hosotani, Kazunori Iijima