Patents by Inventor Hisao Ochi

Hisao Ochi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11069877
    Abstract: An organic EL display device is provided with an eaves body that includes a protruding portion outside a display region on a TFT substrate, along an edge portion on which a first inorganic layer and a second inorganic layer of a sealing film are provided. The first inorganic layer and the second inorganic layer cover the protruding portion and are split apart below the protruding portion facing a wall surface of the eaves body.
    Type: Grant
    Filed: March 3, 2017
    Date of Patent: July 20, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tohru Sonoda, Takeshi Hirase, Hisao Ochi, Takashi Ochi, Tohru Senoo, Akihiro Matsui, Jumpei Takahashi, Yoshinobu Miyamoto
  • Publication number: 20210210724
    Abstract: An organic EL display device includes an organic EL element disposed on a flattening film, and a sealing film disposed over the organic EL element, a display region, and a frame region disposed around the display region. The frame region includes a plurality of mask spacers. The flattening film has a recess disposed between the display region and the mask spacers adjacent to the display region. The recess is filled with an organic film.
    Type: Application
    Filed: May 23, 2018
    Publication date: July 8, 2021
    Inventors: TOHRU SENOO, TAKESHI HIRASE, HISAO OCHI, TAKASHI OCHI, TOHRU SONODA, AKIHIRO MATSUI, YOSHINOBU MIYAMOTO, JUMPEI TAKAHASHI
  • Publication number: 20210159453
    Abstract: A display device includes a TFT substrate including a flattening layer on a surface, a sealing film including a resin film that is an ink-jet resin film, and a first bank that surrounds the flattening layer, is covered with the resin film on an inner side, and has a frame shape. The flattening layer includes, on an entire periphery of a circumferential end portion thereof, a recessed and protruding portion provided with recesses and protrusions having sizes different on a first side and a second side in a plan view.
    Type: Application
    Filed: March 27, 2018
    Publication date: May 27, 2021
    Inventors: JUMPEI TAKAHASHI, HISAO OCHI, TOHRU SENOO, TAKESHI HIRASE, TOHRU SONODA, TAKASHI OCHI, AKIHIRO MATSUI
  • Publication number: 20210135159
    Abstract: A display wiring line provided on a resin substrate layer, a flattening film covering the display wiring line, and an organic EL element provided on the flattening film are provided. The display wiring line includes first to third conductive layers layered sequentially from the resin substrate layer side. In the display wiring line, the second conductive layer is formed with a width smaller than a width of each of the first conductive layer and the third conductive layer, and a portion of a perimeter edge surface corresponding to the second conductive layer includes a recessed portion, and a resin cover covering a perimeter edge surface of the second conductive layer is provided in the recessed portion in a portion of the display wiring line exposed from the flattening film.
    Type: Application
    Filed: March 29, 2018
    Publication date: May 6, 2021
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Tohru SENOO, Takeshi HIRASE, Hisao OCHI, Takashi OCHI, Tohru SONODA, Akihiro MATSUI, Jumpei TAKAHASHI, Yoshinobu MIYAMOTO, Takeshi YANEDA
  • Publication number: 20210098548
    Abstract: A first metal layer on a resin substrate layer, a flattening film on the first metal layer, a second metal layer and a plurality of organic EL elements on the flattening film, and a sealing film covering the plurality of organic EL elements are provided. An organic layer provided in the sealing film includes a circumferential end edge positioned in a frame region in a periphery of a display region. A slit overlapping the circumferential end edge of the organic layer is formed in an outer side of the flattening film. The first metal layer and the second metal layer are in contact with each other inside the slit. A low reflection film is provided on a light reflective portion including the first and second metal layers at a location at which the organic layer and the slit overlap each other.
    Type: Application
    Filed: March 28, 2018
    Publication date: April 1, 2021
    Inventors: HISAO OCHI, JUMPEI TAKAHASHI
  • Publication number: 20210028410
    Abstract: A method for manufacturing a display device, includes: forming a thin film transistor layer; forming a light-emitting element layer; and forming a sealing layer, wherein the display device includes: a display region; and a frame region being a non-display region formed on an outer side of the display region, during forming the thin film transistor layer, a mask spacer is formed on an outer side of a cutting surface corresponding to an end face of the frame region, the mask spacer on which a deposition mask is placed, during forming the sealing layer, at least one inorganic film is formed through use of the deposition mask, and the at least one inorganic film covers the display region, and is formed on an inner side of the cutting surface.
    Type: Application
    Filed: March 28, 2018
    Publication date: January 28, 2021
    Inventors: AKIHIRO MATSUI, TAKESHI HIRASE, YOSHINOBU MIYAMOTO, TOHRU SONODA, HISAO OCHI, TOHRU SENOO, JUMPEI TAKAHASHI, TAKASHI OCHI
  • Publication number: 20210028256
    Abstract: A display device includes: a plurality of pixel-region mask spacers disposed in a pixel region where a plurality of pixels are disposed; a plurality of frame-region mask spacers disposed in a frame region outside the pixel region so as to surround the pixel region; and a common layer disposed on the plurality of pixel-region mask spacers, the common layer being common to the plurality of pixels, wherein the common layer comprises an end that has undulations in a plan view.
    Type: Application
    Filed: March 30, 2018
    Publication date: January 28, 2021
    Inventors: TOHRU SONODA, TAKASHI OCHI, HISAO OCHI, TSUYOSHI SENZAKI, HIDEKI NAKADA
  • Publication number: 20210020715
    Abstract: A first metal layer provided on a resin substrate layer, a flattening film provided on the first metal layer, a second metal layer and a plurality of organic EL elements provided on the flattening film, and a sealing film covering the plurality of organic EL elements are provided. An organic layer provided in the sealing film includes a circumferential end edge positioned in a frame region. A slit overlapping the circumferential end edge of the organic layer is formed in an outer side of the flattening film. The first metal layer and the second metal layer are in contact with each other inside the slit. An opening is formed in a metal layer of the first metal layer and the second metal layer, the opening exposing an interlayer insulating film from the metal layer of the first metal layer and the second metal layer at a position at which the organic layer and the slit overlap each other.
    Type: Application
    Filed: March 28, 2018
    Publication date: January 21, 2021
    Inventors: HISAO OCHI, JUMPEI TAKAHASHI
  • Publication number: 20210020863
    Abstract: A display device includes: a base substrate; a TFT layer; a plurality of light-emitting elements; a sealing portion; a display region; and a frame region, wherein the sealing portion includes a first sealing film provided on the plurality of light-emitting elements, a second sealing film provided above the first sealing film, a third sealing film provided above the second sealing film, and a light-transmissive conductive film provided between two sealing films of the first sealing film, the second sealing film, and the third sealing film, an edge of the first sealing film and an edge of the third sealing film are positioned outward of an edge of the second sealing film in the frame region, and the light-transmissive conductive film is electrically connected to a first electrodes or a second electrode.
    Type: Application
    Filed: March 29, 2018
    Publication date: January 21, 2021
    Inventors: TOHRU SONODA, TAKASHI OCHI, HISAO OCHI, AKIHIRO MATSUI, TOHRU SENOO, TAKESHI HIRASE, JUMPEI TAKAHASHI
  • Publication number: 20210013296
    Abstract: A display device includes: a first conductive layer on a resin substrate layer; a planarization film on the first conductive layer; and OLEDs on the planarization film. There is provided a second conductive layer in a frame area surrounding a display area. The second conductive layer is in contact with second electrodes of the OLEDs on the planarization film and also in contact with the first conductive layer in an external side of the planarization film. The second electrode is electrically connected to the first conductive layer via the second conductive layer. The planarization film includes, in the frame area, a portion where there is provided a trench. The first conductive layer is exposed from the planarization film in the trench. The second electrode is electrically connected to the first conductive layer via the second conductive layer in the trench.
    Type: Application
    Filed: March 29, 2018
    Publication date: January 14, 2021
    Inventors: HISAO OCHI, JUMPEI TAKAHASHI, TOHRU SONODA
  • Patent number: 10816865
    Abstract: Provided is an active matrix substrate provided with a substrate (1), a peripheral circuit that includes a first oxide semiconductor thin-film transistor (TFT) (101), a plurality of second oxide semiconductor TFTs (102) disposed in a display area, and a first inorganic insulating layer (11) covering the plurality of second oxide semiconductor TFTs (102), the first oxide semiconductor TFT (101) having a lower gate electrode (3A), a gate insulating layer (4), an oxide semiconductor (5A) disposed so as to face the lower gate electrode with the gate insulating layer interposed therebetween, a source electrode (7A) and a drain electrode (8A), and an upper gate electrode (BG) disposed on the oxide semiconductor (5A) with an insulating layer that includes the first inorganic insulating layer (11) interposed therebetween, and furthermore having, on the upper gate electrode (BG), a second inorganic insulating layer (17) covering the first oxide semiconductor TFT (101).
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: October 27, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tetsuo Kikuchi, Tohru Daitoh, Hajime Imai, Toshikatsu Itoh, Hisao Ochi, Hideki Kitagawa, Masahiko Suzuki, Teruyuki Ueda, Ryosuke Gunji, Kengo Hara, Setsuji Nishimiya
  • Publication number: 20200335564
    Abstract: A display device includes: a display including a plurality of light-emitting devices; a first bank provided outside the display; a second bank provided outside the first bank; and a plurality of peripheral lines formed below, and intersecting with, the first bank and the second bank, wherein each of the peripheral lines includes a plurality of bends provided between the first bank and the second bank in plan view.
    Type: Application
    Filed: December 26, 2017
    Publication date: October 22, 2020
    Inventors: HISAO OCHI, TOHRU SENOO, JUMPEI TAKAHASHI, TOHRU SONODA, TAKASHI OCHI, TAKESHI HIRASE
  • Patent number: 10748939
    Abstract: A semiconductor device (100A) is provided with: a gate electrode (3); an oxide semiconductor layer (5); a thin-film transistor (101) including a gate insulating layer (4), a source electrode (7S), and a drain electrode (7D); an inter-layer insulating layer (11) arranged so as to cover the thin-film transistor (101) and come into contact with a channel area (5c) of the thin-film transistor (101); and a transparent electroconductive layer (19) arranged on the inter-layer insulating layer (11), the source electrode (7S) and the drain electrode (7D) each having a copper layer (7a), and the device being further provided with a copper oxide film (8) arranged between the source and drain electrodes and the inter-layer insulating layer (11). The inter-layer insulating layer (11) covers the drain electrode (7D) with the copper oxide film (8) interposed therebetween.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: August 18, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Hideki Kitagawa, Tohru Daitoh, Hajime Imai, Hisao Ochi, Tetsuo Fujita, Tetsuo Kikuchi, Shingo Kawashima, Masahiko Suzuki
  • Patent number: 10714706
    Abstract: An organic EL display device including: a base substrate; an organic EL element formed on the base substrate, and including a plurality of organic EL layers arranged in a matrix shape; and a sealing film formed on the organic EL element, wherein a plurality of subpixels are defined in association with the plurality of organic EL layers, and a plurality of grooves are formed in the sealing film through the interstices among the plurality of subpixels, and a foreign-matter contact portion configured to be in contact with a foreign matter existing on the organic EL element is formed in the sealing film.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: July 14, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Jumpei Takahashi, Tohru Sonoda, Takashi Ochi, Takeshi Hirase, Hisao Ochi, Tohru Senoo, Akihiro Matsui
  • Patent number: 10700210
    Abstract: A semiconductor device includes a substrate and a thin film transistor supported by the substrate. The thin film transistor includes a gate electrode, an oxide semiconductor layer, a gate insulating layer provided between the gate electrode and the oxide semiconductor layer, and source and drain electrodes electrically connected to the oxide semiconductor layer. The gate insulating layer includes a first portion which is covered with the oxide semiconductor layer and a second portion which is adjacent to the first portion and which is not covered with any of the oxide semiconductor layer, the source electrode and the drain electrode. The second portion is smaller in thickness than the first portion, and the difference in thickness between the second portion and the first portion is more than 0 nm and not more than 50 nm.
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: June 30, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tetsuo Kikuchi, Hajime Imai, Hisao Ochi, Tetsuo Fujita, Hideki Kitagawa, Masahiko Suzuki, Shingo Kawashima, Tohru Daitoh
  • Publication number: 20200183208
    Abstract: Provided is an active matrix substrate provided with a substrate (1), a peripheral circuit that includes a first oxide semiconductor thin-film transistor (TFT) (101), a plurality of second oxide semiconductor TFTs (102) disposed in a display area, and a first inorganic insulating layer (11) covering the plurality of second oxide semiconductor TFTs (102), the first oxide semiconductor TFT (101) having a lower gate electrode (3A), a gate insulating layer (4), an oxide semiconductor (5A) disposed so as to face the lower gate electrode with the gate insulating layer interposed therebetween, a source electrode (7A) and a drain electrode (8A), and an upper gate electrode (BG) disposed on the oxide semiconductor (5A) with an insulating layer that includes the first inorganic insulating layer (11) interposed therebetween, and furthermore having, on the upper gate electrode (BG), a second inorganic insulating layer (17) covering the first oxide semiconductor TFT (101).
    Type: Application
    Filed: March 13, 2017
    Publication date: June 11, 2020
    Inventors: Tetsuo KIKUCHI, Tohru DAITOH, Hajime IMAI, Toshikatsu ITOH, Hisao OCHI, Hideki KITAGAWA, Masahiko SUZUKI, Teruyuki UEDA, Ryosuke GUNJI, Kengo HARA, Setsuji NISHIMIYA
  • Patent number: 10673017
    Abstract: An organic EL display device includes an organic EL element and a sealing film. The organic EL element is formed over a display region of a base substrate. The sealing film covers the organic EL element. The sealing film includes a first barrier layer, a buffer layer, and a second barrier layer. The first barrier layer includes a first inorganic film and is disposed on the surface of the organic EL element. The buffer layer includes an organic film and is disposed on the surface of the first barrier layer. The second barrier layer includes a second inorganic film and is disposed on the surface of the buffer layer. The first barrier layer includes micropores in the surface, the surface being in contact with the buffer layer.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: June 2, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Takeshi Hirase, Tohru Sonoda, Takashi Ochi, Hisao Ochi, Tohru Senoo, Akihiro Matsui, Jumpei Takahashi
  • Patent number: 10608062
    Abstract: A bank (BK1b) and a bank (BK1a) having a height less than a height of the bank (BK1b) are intermittently provided on a bank (BK1) covering a peripheral portion of each first electrode (21) of a light emitting element.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: March 31, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Jumpei Takahashi, Takeshi Hirase, Hisao Ochi, Takashi Ochi, Tohru Senoo, Tohru Sonoda, Akihiro Matsui, Yoshinobu Miyamoto
  • Publication number: 20200091459
    Abstract: The organic EL display device includes a third organic insulating film pattern portion, which includes a groove on an upper surface thereof, between a display region and at least part of an edge portion of a TFT substrate. A first inorganic layer and a second inorganic layer of a sealing film cover the third organic insulating film pattern portion and at least part of the edge portion in a plan view, and are split apart in the groove.
    Type: Application
    Filed: March 27, 2017
    Publication date: March 19, 2020
    Inventors: Tohru SENOO, Takeshi HIRASE, Hisao OCHI, Takashi OCHI, Tohru SONODA, Jumpei TAKAHASHI, Akihiro MATSUI, Yoshinobu MIYAMOTO
  • Patent number: 10573853
    Abstract: A method of manufacturing a display device includes a step of forming a first inorganic film constituting a sealing film and a step of forming an organic film constituting the sealing film. Between these steps, the method further includes a foreign matter inspection step of inspecting a substrate surface on which the first inorganic film has been formed and identifying the location of a foreign matter adhering to the substrate surface, and a partial ejection step of using an ink-jet method to eject ink to be formed a part of the organic film at the location of the foreign matter on the substrate surface identified in the foreign matter inspection step.
    Type: Grant
    Filed: September 22, 2017
    Date of Patent: February 25, 2020
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tohru Senoo, Takeshi Hirase, Hisao Ochi, Takashi Ochi, Tohru Sonoda, Jumpei Takahashi, Akihiro Matsui, Yoshinobu Miyamoto