Abstract: A transmission circuit capable of transmitting a modulated wave signal using polar modulation in a broad band and with low power consumption is provided. The transmission circuit generates an amplitude signal and a phase signal based on data to be transmitted, and separates the amplitude signal into a low-frequency amplitude signal and a high-frequency amplitude signal. The transmission circuit amplitude-modulates the phase signal in a broad band using the high-frequency amplitude signal in a high-frequency voltage control section 104 and an amplitude modulation section 105 and amplitude-modulates the phase signal into low power consumption using the low-frequency amplitude signal in a low-frequency voltage control section 106 and amplitude modulation section 107.

Abstract: A transmission circuit capable of transmitting a modulated wave signal using polar modulation in a broad band and with low power consumption is provided. The transmission circuit generates an amplitude signal and a phase signal based on data to be transmitted, and separates the amplitude signal into a low-frequency amplitude signal and a high-frequency amplitude signal. The transmission circuit amplitude-modulates the phase signal in a broad band using the high-frequency amplitude signal in a high-frequency voltage control section 104 and an amplitude modulation section 105 and amplitude-modulates the phase signal into low power consumption using the low-frequency amplitude signal in a low-frequency voltage control section 106 and amplitude modulation section 107.

Abstract: There provides a two-point modulation phase modulation apparatus capable of obtaining an RF phase modulation signal of superior modulation precision with low power consumption and a simple configuration even in the event of inputting a wide band baseband modulation signal. A differentiator (21) of the opposite characteristics to the attenuation characteristics of anti-alias filter (22) is provided at the front stage of a D/A converter (6). As a result, it is possible to sufficiently suppress an alias signal without raising the sampling frequency of the D/A converter (6) (i.e. low power consumption) using an anti-alias filter (22) of a simple configuration (i.e. low cost) with a low order for a narrower bandwidth than a PLL modulation frequency bandwidth, and it is possible to obtain an RF phase modulation signal where the entire frequency band of input digital baseband modulation signal (S1) is reflected in a superior manner.

Abstract: The output of a first integrator is quantized in a quantizer. The quantized signal is subjected to D/A conversion, successively output to a plurality of output paths by a first switching circuit, sampled and held by a plurality of charge-holding circuits of a first feedback circuit, and successively output by a second switching circuit to one of the input terminals of a subtractor. On the other hand, the output signal of the first integrator is successively output by a third switching circuit to a plurality of output paths, sampled and held by a plurality of charge-holding circuits of a second feedback circuit, and successively input to the other input terminal of the subtractor by a fourth switching circuit along with signals held in an input portion, which samples and holds input analog signals. By doing so, a plurality of signals with different sampling timings are integrated accumulatively by the subtractor and the first integrator.

Abstract: An A/D converter includes a first switched capacitor block that charges and holds charges by connecting each of a first group of capacitors to a single basic reference voltage at a first timing, and discharges each of the charges held by the first group of capacitors at a second timing, a second switched capacitor block that charges and holds each of the charges discharged by the first group of capacitors respectively in the second group of capacitors at the second timing, and converts each of the charges held by the second group of capacitors to a voltage and outputs the voltages at the first timing, and a quantizer that quantizes an analog input signal using the plurality of voltages output from the second switched capacitor block as reference voltages for each level. A plurality of reference voltages is generated from a single basic reference voltage, based on different amounts of charges held in the plurality of capacitors.

Abstract: To provide a method of controlling a delta-sigma modulator and a delta-sigma modulator capable of suppressing a consumption power and also improving a signal-to-noise ratio by implementing both the zero-point shifting technology and the double sampling technology simultaneously, a delta-sigma modulator includes a first integrator (1), a second integrator (2), a third integrator (3), a local feedback (4), delay units (5), a quantizer (6), a DA converter (7), gains (8a to 8c) of the DA converter, gains (9a to 9c) of the integrators, adders (10), no-delay integrators (11) each having a gain “1”, a gain (12) of the local feedback, a DAC (13) of a gain “1”, a delay unit (5) for delaying output signals of the DA converter (7), and a delay unit (5) for delaying an output signal of the local feedback (4).

Abstract: A voltage-controlled oscillator having an inductor circuit, n pieces (n is two or more) of variable capacitance circuit having variable capacitance elements, negative resistance circuits, and reference voltage generation means of generating a reference voltage from a power supply voltage, and wherein a predetermined reference voltage is inputted to some terminals of the variable capacitance elements of the n pieces of variable capacitance circuit, a control voltage is inputted to the other terminals thereof, and of the variable capacitance elements of the n pieces of variable capacitance circuits, the predetermined reference voltage inputted to some terminals of the variable capacitance elements of at least two pieces of the variable capacitance circuit is different.

Abstract: The present invention provides a differential voltage control oscillator including: a parallel resonance circuit in which an inductor circuit, a variable capacitance circuit, and a radio-frequency switching circuit are connected in parallel together; and a negative resistance circuit connected in parallel with the parallel resonance circuit.

Abstract: The amplitude modulator comprises: an angle modulator for angle-modulating a phase signal to be inputted; a waveform shaping means in which, (1) when the magnitude of an amplitude signal to be inputted becomes smaller than a first prescribed value, a waveform of the amplitude signal is shaped so that the magnitude of the amplitude signal of the portion which becomes small becomes the first prescribed value; and/or (2) the waveform shaping means in which, when the magnitude of the amplitude signal to be inputted becomes larger than the second prescribed value which is larger than the first prescribed value, the waveform of the amplitude signal is shaped so that the magnitude of the amplitude signal of the portion which becomes larger becomes the second prescribed value; and an amplitude modulator for amplitude modulating the signal of the output of the angle modulator by the signal of the output of the waveform shaping means.

Abstract: Radio communication apparatus comprising an antenna, a transmitting circuit of outputting a transmitting signal in a first frequency band. A duplexer connected to the antenna and having a single-phase input terminal and a balanced output terminal, conveying the transmitting signal inputted to the single-phase input terminal to the antenna. The duplexer outputs a receiving signal in a second frequency band different from the first frequency band received from the antenna substantially as a differential signal from the balanced output terminal. A receiving circuit connected to the balanced output terminal and having a circuit in which a gain of a signal of a differential component is higher than that of a signal of an in-phase component, or a loss of the signal of the differential component is lower than that of the signal of the in-phase component.

Abstract: A data converter arranged to enable linear high-efficiency amplification of a signal having a fluctuating envelope. The data converter has a computation circuit, a vector quantizer, and an output terminal. The computation circuit is formed by connecting n (n: a natural number) number of unit circuits each including a vector subtracter having a first input terminal and a second input terminal, and a vector integrator connected to an output side of the vector subtracter. An output at the output terminal and/or an output from each vector integrator are input to the vector subtracter through the second input terminal in the corresponding unit circuit. The vector subtracter outputs data obtained by subtracting a vector input through the second input terminal from a vector input through the first input terminal. The vector quantizer outputs a predetermined value quantized at least with respect to the magnitude of the input vector.

Abstract: A phase modulation section (101) generates a first modulated signal including phase information. An amplitude signal control section (103) generates a second modulated signal including amplitude information. A waveform shaping section (104), when an amplitude of the second modulated signal is larger than a regulated value generates a waveform-shaped modulated signal. An amplitude modulated voltage supply section (105) amplifies the waveform-shaped modulated signal based on the supply voltage from a voltage control section (106) and supplies the amplified signal to a power amplification section (102). The power amplification section (102) amplifies the first modulated signal based on the amplitude modulated voltage, and outputs the resultant signal.

Abstract: A voltage controlled oscillator 1, a variable frequency divider 2, a phase comparator 3, and a loop filter 4 form a Phase Locked Loop (PLL). A sigma-delta modulator 5 sigma-delta modulates data obtained by adding a fractional part M2 of the frequency division factor data with modulation data X by using an output signal of the variable frequency divider 2 as a clock. An output signal of the sigma-delta modulator 5 is added to an integral part M1 of the frequency division factor data, and the resultant data becomes effective frequency division factor data 13 of the variable frequency divider 2. An output signal of the sigma-delta modulator 5 also becomes control data 14 after passing through a D/A converter 6, a low-pass filter 7, and an amplitude adjustment circuit 8. The control data 14 is inputted into a frequency modulation terminal of the voltage controlled oscillator 1.

Abstract: The amplitude modulator comprises: an angle modulator for angle-modulating a phase signal to be inputted; a waveform shaping means in which, (1) when the magnitude of an amplitude signal to be inputted becomes smaller than a first prescribed value, a waveform of the amplitude signal is shaped so that the magnitude of the amplitude signal of the portion which becomes small becomes the first prescribed value; and/or (2) the waveform shaping means in which, when the magnitude of the amplitude signal to be inputted becomes larger than the second prescribed value which is larger than the first prescribed value, the waveform of the amplitude signal is shaped so that the magnitude of the amplitude signal of the portion which becomes larger becomes the second prescribed value; and an amplitude modulator for amplitude modulating the signal of the output of the angle modulator by the signal of the output of the waveform shaping means.

Abstract: A high frequency variable gain amplification device 100 includes: a feedback circuit 103 capable of changing a feedback impedance to adjust the gain of an amplifier 101 in accordance with a control signal from a control device 200; and a current consumption adjustment circuit 102 capable of adjusting current consumption of the amplifier 101. The control device 200 controls the feedback impedance and the current consumption based on a desired signal power level and an undesired signal power level. If the desired signal power level exceeds a predetermined value, the control device 200 reduces the feedback impedance to increase the amount of a feedback signal, thereby allowing the amplifier 101 to operate with low gain so as to prevent the distortion characteristic from being reduced and to reduce the current consumption.

Abstract: Radio communication apparatus comprising an antenna, a transmitting circuit outputting a transmitting signal in a first frequency band. A duplexer connected to the antenna and having a single-phase input terminal and a balanced output terminal, conveying the transmitting signal inputted to the single-phase input terminal to the antenna. The duplexer outputs a receiving signal in a second frequency band different from the first frequency band received from the antenna substantially as a differential signal from the balanced output terminal. A receiving circuit connected to the balanced output terminal and having a circuit in which a gain of a signal of a differential component is higher than that of a signal of an in-phase component, or a loss of the signal of the differential component is lower than that of the signal of the in-phase component.

Abstract: A transmitting circuit device has a first signal source which outputs a first signal that is a binary or multilevel discrete analog signal or a discrete analog signal with a binary or multilevel envelope and that has signal components and quantization noise components; a second signal source which outputs a second signal composed of the quantization noise components; a first amplifier which amplifies the first signal; and a combiner which cancels out the quantization noise components by combining an output of the first amplifier and the second signal.

Abstract: A voltage controlled oscillator 1, a variable frequency divider 2, a phase comparator 3, and a loop filter 4 form a Phase Locked Loop (PLL). A sigma-delta modulator 5 sigma-delta modulates data obtained by adding a fractional part M2 of the frequency division factor data with modulation data X by using an output signal of the variable frequency divider 2 as a clock. An output signal of the sigma-delta modulator 5 is added to an integral part M1 of the frequency division factor data, and the resultant data becomes effective frequency division factor data 13 of the variable frequency divider 2. An output signal of the sigma-delta modulator 5 also becomes control data 14 after passing through a D/A converter 6, a low-pass filter 7, and an amplitude adjustment circuit 8. The control data 14 is inputted into a frequency modulation terminal of the voltage controlled oscillator 1.

Abstract: A phase modulation apparatus is provided whereby excellent RF phase modulation signals can be obtained even when the modulation sensitivity of a voltage controlled oscillator varies. Phase modulation apparatus 100 has: phase detector 105 that performs phase detection with respect to an RF phase modulation signal outputted from VCO 101; comparator 106 that compares the phase of the detected signal with the phase of a baseband phase modulation signal and outputs the difference between the signals; variable gain amplifier 107 that controls the gain of the baseband phase modulation signal based on the output of comparator 106 and supplies the gain-controlled baseband phase modulation signal to VCO 101.

Abstract: A frequency modulation apparatus 100 has a synthesizer 101, a differentiator 102 that differentiates phase modulation data and generates differential phase modulation data, an adder 103 that adds together that differential phase modulation data and carrier frequency data fractional part K and generates addition fractional part K1, an input data operation section 104 that receives addition fractional part K1 and carrier frequency data integer part M, generates integer part input data M1 and fractional part input data K2, and provides fractional part input data K2 to synthesizer 101, and an integer part data delay section 105 that delays integer part input data M1 before providing it to synthesizer 101. Input data operation section 104 makes M1=M?1 and K2=K1+1 when K1<0, makes M1=M and K2=K1 when 0?K1<1, and makes M1=M+1 and K2=K1?1 when 1?K1.