Patents by Inventor Hisashi Aikawa
Hisashi Aikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240121530Abstract: A light detector is configured such that a light receiving portion having APDs and a peripheral portion are provided on a first principal surface of a p-type semiconductor substrate, and further includes a back electrode provided on a second principal surface of the semiconductor substrate and a p-type first separation portion provided between the light receiving portion and the peripheral portion. The APD has, on a first principal surface side, an n-type region and a p-epitaxial layer contacting the n-type region in a Z-direction. The peripheral portion has an n-type MISFET provided at a p-well and an n-well provided to surround entire side and bottom portions of the p-well.Type: ApplicationFiled: December 15, 2023Publication date: April 11, 2024Inventors: Tatsuya KABE, Hideyuki ARAI, Hisashi AIKAWA, Yuki SUGIURA, Akito INOUE, Mitsuyoshi MORI, Kentaro NAKANISHI, Yusuke SAKATA
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Publication number: 20240054397Abstract: A processing system includes a first acquirer, a second acquirer, a third acquirer, an identifier, and an extractor. The first acquirer is configured to acquire a plurality of pieces of learning data to which labels have been assigned. The second acquirer is configured to acquire a learned model generated based on the plurality of pieces of learning data. The third acquirer is configured to acquire identification data to which a label has been assigned. The identifier is configured to identify the identification data on a basis of the learned model. The extractor is configured to extract, based on an index which is applied in the learned model and which relates to similarity between the identification data and each of the plurality of pieces of learning data, one or more pieces of learning data similar to the identification data from the plurality of pieces of learning data.Type: ApplicationFiled: October 14, 2021Publication date: February 15, 2024Inventors: Jeffry NAINGGOLAN, Yuya SUGASAWA, Hisaji MURATA, Yoshinori SATOU, Hisashi AIKAWA
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Patent number: 11889215Abstract: A light detector is configured such that a light receiving portion having APDs and a peripheral circuit portion are provided on a first principal surface of a p-type semiconductor substrate, and further includes a back electrode provided on a second principal surface of the semiconductor substrate and a p-type first separation portion provided between the light receiving portion and the peripheral circuit portion. The APD has, on a first principal surface side, an n-type region and a p-epitaxial layer contacting the n-type region in a Z-direction. The peripheral circuit portion has an n-type MISFET provided at a p-well and an n-well provided to surround side and bottom portions of the p-well.Type: GrantFiled: September 27, 2021Date of Patent: January 30, 2024Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Tatsuya Kabe, Hideyuki Arai, Hisashi Aikawa, Yuki Sugiura, Akito Inoue, Mitsuyoshi Mori, Kentaro Nakanishi, Yusuke Sakata
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Publication number: 20230122673Abstract: A data generation method includes a first acquisition step, a second acquisition step, and a generation step. The first acquisition step includes acquiring result information about a result of a classification executed by a living being on a target. The second acquisition step includes acquiring execution information about execution of the classification. The generation step includes generating data for machine learning based on the result information and the execution information. The data for machine learning includes learning data and evaluation information about evaluation of the learning data.Type: ApplicationFiled: March 9, 2021Publication date: April 20, 2023Inventors: Junko ONOZAKI, Koji OBATA, Hisashi AIKAWA, Yuya SUGASAWA
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Publication number: 20220014701Abstract: A light detector is configured such that a light receiving portion having APDs and a peripheral circuit portion are provided on a first principal surface of a p-type semiconductor substrate, and further includes a back electrode provided on a second principal surface of the semiconductor substrate and a p-type first separation portion provided between the light receiving portion and the peripheral circuit portion. The APD has, on a first principal surface side, an n-type region and a p-epitaxial layer contacting the n-type region in a Z-direction. The peripheral circuit portion has an n-type MISFET provided at a p-well and an n-well provided to surround side and bottom portions of the p-well.Type: ApplicationFiled: September 27, 2021Publication date: January 13, 2022Inventors: Tatsuya KABE, Hideyuki ARAI, Hisashi AIKAWA, Yuki SUGIURA, Akito INOUE, Mitsuyoshi MORI, Kentaro NAKANISHI, Yusuke SAKATA
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Publication number: 20210233232Abstract: A learning device includes a camera configured to acquire image data by imaging a sample of a product, a physical property information acquisition unit configured to acquire physical property information of the sample, and a processing unit configured to generate a learning model. The processing unit is configured to identify a category of the sample based on rule information relating the physical property information to the category, to generate teacher data by relating the identified category to the image data, and to generate a learning model by machine learning using the teacher data. The learning model outputs the category of the sample in response to an input of the image data of the sample.Type: ApplicationFiled: May 13, 2019Publication date: July 29, 2021Inventors: YUYA SUGASAWA, HIDEYUKI ARAI, HISASHI AIKAWA
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Publication number: 20150325614Abstract: According to one embodiment, a method of manufacturing a solid-state imaging device includes a trench forming process, a concave portion forming process, a coating process, and a burying process. In the trench forming process, a trench is formed at the position to isolate a plurality of photoelectric conversion elements. In the concave portion forming process, a concave portion is formed at the position to form a light shielding film of shielding at least part of subject light incident on an adjustment photoelectric conversion element used for an image quality adjustment of an imaged image. In the coating process, inner circumferential surfaces of the trench and the concave portion are coated with an insulating film. In the burying process, a light shielding member is buried inside the trench and the concave portion whose inner circumferential surface are coated with the insulating film.Type: ApplicationFiled: July 20, 2015Publication date: November 12, 2015Applicant: Kabushiki Kaisha ToshibaInventors: Yosuke KITAMURA, Hisashi AIKAWA, Kazunori KAKEHI
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Patent number: 9111833Abstract: According to one embodiment, a method of manufacturing a solid-state imaging device includes a trench forming process, a concave portion forming process, a coating process, and a burying process. In the trench forming process, a trench is formed at the position to isolate a plurality of photoelectric conversion elements. In the concave portion forming process, a concave portion is formed at the position to form a light shielding film of shielding at least part of subject light incident on an adjustment photoelectric conversion element used for an image quality adjustment of an imaged image. In the coating process, inner circumferential surfaces of the trench and the concave portion are coated with an insulating film. In the burying process, a light shielding member is buried inside the trench and the concave portion whose inner circumferential surface are coated with the insulating film.Type: GrantFiled: April 22, 2013Date of Patent: August 18, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Yosuke Kitamura, Hisashi Aikawa, Kazunori Kakehi
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Publication number: 20140183606Abstract: According to an embodiment of the invention, there is provided a method of manufacturing a semiconductor device. The method of manufacturing the semiconductor device includes forming a trench downward from an upper face of a semiconductor layer at a position where an element isolation area is formed in the semiconductor layer, and melting the upper face of the trench-formed semiconductor layer to close an open end of the trench.Type: ApplicationFiled: May 29, 2013Publication date: July 3, 2014Applicant: Kabushiki Kaisha ToshibaInventors: Kazunori KAKEHI, Hisashi Aikawa, Yosuke Kitamura
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Publication number: 20140110809Abstract: According to one embodiment, a method of manufacturing a solid-state imaging device includes a trench forming process, a concave portion forming process, a coating process, and a burying process. In the trench forming process, a trench is formed at the position to isolate a plurality of photoelectric conversion elements. In the concave portion forming process, a concave portion is formed at the position to form a light shielding film of shielding at least part of subject light incident on an adjustment photoelectric conversion element used for an image quality adjustment of an imaged image. In the coating process, inner circumferential surfaces of the trench and the concave portion are coated with an insulating film. In the burying process, a light shielding member is buried inside the trench and the concave portion whose inner circumferential surface are coated with the insulating film.Type: ApplicationFiled: April 22, 2013Publication date: April 24, 2014Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yosuke KITAMURA, Hisashi AIKAWA, Kazunori KAKEHI
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Publication number: 20120202302Abstract: Certain embodiments provide a semiconductor device manufacturing system including processing devices used in processing processes, a wafer transfer device, a processing characteristic measuring unit, a device characteristic measuring unit, data server, and an analysis server. The wafer transfer device conveys the wafer to the processing devices such that a direction of the wafer differs according to each processing process. The data server stores data. The data include processing characteristic data that is the processing characteristic of the wafer for each processing process measured by the processing characteristic measuring unit, the direction of the wafer for each processing process, and device characteristic data that is the device characteristic of the wafer measured by the device characteristic measuring unit.Type: ApplicationFiled: February 6, 2012Publication date: August 9, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Takashi Shimizu, Hisashi Aikawa
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Publication number: 20100148187Abstract: A semiconductor device according to an embodiment includes a transistor including a gate electrode formed on a semiconductor substrate of a predetermined crystal via a gate insulating film and a source-drain region formed in the semiconductor substrate so as to have a convex portion in a direction of a gate width and in which an epitaxial crystal having a lattice constant different from that of the predetermined crystal is embedded, and a contact plug formed on the source-drain region other than the convex portion.Type: ApplicationFiled: December 10, 2009Publication date: June 17, 2010Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Hisashi Aikawa