Patents by Inventor Hisashi Ishikawa

Hisashi Ishikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8995476
    Abstract: A data processing apparatus includes an input unit to input data and processing modules. The processing modules may be connected as part of a ring-shaped data transfer path to transfer data in one direction. Each processing module includes a communication unit configured to implement a first data processing path and a setting path and a processing unit configured to process data received by the communication unit. When using switching data to switch the processing modules performing on the first data processing path to the processing modules performing on the setting path, the switching data is processed on the first data processing path.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: March 31, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Isao Sakamoto, Hisashi Ishikawa
  • Patent number: 8976416
    Abstract: In a case in which image data used to form an image on a recording medium in a plurality of scans performed across a recording area of the recording medium is generated, a coefficient determination unit determines assignments of output density for the scans on the basis of density characteristics corresponding to the type of recording medium indicated by a recording-medium signal. Multipliers and binary conversion units generate image data for the scans from input image data on the basis of the assignments of the output density.
    Type: Grant
    Filed: June 16, 2008
    Date of Patent: March 10, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroyuki Horii, Hisashi Ishikawa, Koji Moriya
  • Patent number: 8972769
    Abstract: A data processing apparatus includes: a plurality of processing units adapted to process data according to input operation clocks; and a control unit adapted to measure response times of the plurality of processing units when the operation clocks of a common frequency are supplied to the plurality of processing units, and to control a frequency of the operation clocks to be supplied to at least one of the plurality of processing units so that a plurality of measured response times become closer to each other.
    Type: Grant
    Filed: January 21, 2011
    Date of Patent: March 3, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Akio Nakagawa, Hisashi Ishikawa
  • Patent number: 8954633
    Abstract: In an information processing apparatus in which data processing is performed in a predetermined sequence by processing modules connected to a ring bus, if an amount of data generated by input data in the ring bus is not considered, the data amount exceeds an amount of data that can be held by the processing modules on the ring bus, and a data collision often occurs, so that processing efficiency of the ring bus deteriorates. An amount of data input into the ring bus is controlled so that the total sum of data amounts output to the ring bus from processing units used for processing does not exceed a maximum amount of data that can be held by the processing modules on the ring bus.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: February 10, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Daiji Kirihata, Hisashi Ishikawa, Hirowo Inoue, Isao Sakamoto
  • Patent number: 8948542
    Abstract: An image processing apparatus for processing image data by a plurality of pipeline-connected processing modules is provided. The apparatus includes a first pipeline processing unit configured to include a plurality of processing modules including a processing module which processes image data for every first size; and a second pipeline processing unit configured to be branched from the first pipeline processing unit and include a plurality of processing modules including a processing module which processes image data for every second size different from the first size. The second pipeline processing unit includes, at a start, a change unit configured to acquire partial image data of the first size from the first pipeline processing unit and change the partial image data of the first size into partial image data of the second size.
    Type: Grant
    Filed: June 3, 2011
    Date of Patent: February 3, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Michiaki Takasaka, Hisashi Ishikawa
  • Patent number: 8947735
    Abstract: When the pixel of interest exists at a pixel position where reference of an error buffer is necessary, a quantization error generated in a region having undergone error diffusion processing is obtained from the error buffer. A quantization error generated in error diffusion processing in a region containing the pixel of interest is obtained from an error memory. Diffusion errors are calculated from the quantization errors using an error diffusion matrix. The value of the pixel of interest and the diffusion errors are added, and the addition value is quantized into the quantization value of the pixel of interest. The difference between the quantization value and the addition value is calculated as a quantization error to be stored in the error memory. When the pixel of interest exists at a pixel position where write in the error buffer is necessary, the quantization error is stored in the error buffer.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: February 3, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shigeo Kodama, Hisashi Ishikawa
  • Patent number: 8941844
    Abstract: The invention provides a technique which allows high-quality printing. An image processing apparatus for forming an image by executing N printing scans for a single region on a printing medium, comprises: a readout unit configured to read out image data of a region corresponding to a k-th printing scan from input image data; a print data generation unit configured to generate print data from the image data by halftone processing; and an obtaining unit configured to obtain position fluctuation information of dots in a preceding printing scan, wherein the readout unit controls a readout position of the region corresponding to the k-th printing scan in accordance with the position fluctuation information at the time of the preceding printing scan obtained by the obtaining unit.
    Type: Grant
    Filed: November 7, 2012
    Date of Patent: January 27, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shigeo Kodama, Hisashi Ishikawa
  • Publication number: 20140376056
    Abstract: Screen processing is performed on input image data. A boundary pixel adjacent to a white pixel in the input image data is detected. Output image data based on either the input image data or the screen-processed image data is selectively output for each pixel in accordance with the detection result of the boundary pixel.
    Type: Application
    Filed: June 5, 2014
    Publication date: December 25, 2014
    Inventors: Akihiro Fujimoto, Hisashi Ishikawa, Yuji Hara
  • Patent number: 8917419
    Abstract: An image processing apparatus that converts input image data into printable image data is provided. The apparatus performs screen processing on the input image data, and determines whether moiré occurs in screen image data generated by the screen processing unit for a target pixel in the input image data. Depending on the determination result made by the determination unit, the apparatus outputs one of a screen pixel value in the screen image data for the target pixel and a value obtained by converting an input pixel value into a printable pixel value based on intermediate data, as a value of the target pixel in the printable image data, the intermediate data being generated by replacing a screen pixel in the screen image data that is determined to have moiré by the determination unit with the input pixel value in the input image data.
    Type: Grant
    Filed: July 5, 2012
    Date of Patent: December 23, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hisashi Ishikawa
  • Publication number: 20140355010
    Abstract: Multi-value image data is sampled for each predetermined pixel range to generate tone information of the pixel range. The generated tone information is stored in a storage unit. Attribute information representing the attribute of a pixel is generated from the multi-value image data, and the generated attribute information is stored in the storage unit. Halftone processing is performed on the multi-value image data based on the tone information and attribute information stored in the storage unit.
    Type: Application
    Filed: May 27, 2014
    Publication date: December 4, 2014
    Inventors: Yuji Hara, Hisashi Ishikawa, Yusuke Yamamoto, Kenta Hosaki
  • Publication number: 20140350806
    Abstract: In order to enable a transmission to reliably perform a switching to a parking range thereof, a vehicle control device includes a shift-by-wire device which switches a shift range of a transmission mounted on a vehicle in accordance with a request by an electric signal, an acceptance unit which accepts a request for switching to a parking range of the transmission, a detection unit which detects that switching to the parking range of the transmission has been settled, and a braking device which generates a braking force when the acceptance unit accepts a request for switching to the parking range of the transmission, from the time of acceptance of the request for switching until the detection unit detects settlement of the switching to the parking range.
    Type: Application
    Filed: May 15, 2014
    Publication date: November 27, 2014
    Applicant: HONDA MOTOR CO., LTD.
    Inventors: Masaki KOIKE, Kohei AKAMINE, Hisashi ISHIKAWA, Shinichiro WATANABE
  • Patent number: 8867864
    Abstract: There are provided a data processing apparatus which makes an I/F for data processing modules (processors) versatile to facilitate addition/modification on a data processing module basis in accordance with processing contents, an image processing apparatus, and a method for the apparatuses. A data processing module (3) includes a read address generator (11), read FIFO (7), write address generator (13), write FIFO (9), and arbiter (10) and is connected to a host arbiter (4) through a 1-channel port. The read address generator (11) and write address generator (13) generate interrupts upon acceptance of final access requests so as to control activation of each data processing module (8-1-8-m) in accordance with the state of each data processing module in interrupt processing. Note that data transfer among the respective data processing modules is performed on a RAM (6).
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: October 21, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hisashi Ishikawa, Ryoko Mise
  • Publication number: 20140285851
    Abstract: An image processing apparatus capable of converting input image data into image data expressing a dot pattern cell by cell includes a detection unit configured to detect a pixel having a specific pixel value in the input image data, and a determination unit configured to determine an output value of a pixel included in each cell by arranging as many print pixels as a number of print pixels according to a total value of pixel values of a pixel group including pixels included in a cell except the pixel detected by the detection unit on any of the pixels in the pixel group cell by cell.
    Type: Application
    Filed: February 21, 2014
    Publication date: September 25, 2014
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Tomoyuki Kawamoto, Hisashi Ishikawa
  • Publication number: 20140254601
    Abstract: A data processing apparatus includes an input unit to input data and processing modules. The processing modules may be connected as part of a ring-shaped data transfer path to transfer data in one direction. Each processing module includes a communication unit configured to implement a first data processing path and a setting path and a processing unit configured to process data received by the communication unit. When using switching data to switch the processing modules performing on the first data processing path to the processing modules performing on the setting path, the switching data is processed on the first data processing path.
    Type: Application
    Filed: May 27, 2014
    Publication date: September 11, 2014
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Isao Sakamoto, Hisashi Ishikawa
  • Publication number: 20140241350
    Abstract: In an information processing system in which a plurality of modules are connected to a ring bus, data transfer efficiency is enhanced by deleting an unnecessary packet from the ring bus. This invention relates to an information processing system in which a plurality of modules that execute data processing are connected to a ring bus. More particularly, this invention relates to a ring bus operation technique that allows efficient data transfer by monitoring a flag of a packet, and removing an unnecessary packet from the ring bus.
    Type: Application
    Filed: May 5, 2014
    Publication date: August 28, 2014
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: MICHIAKI TAKASAKA, HISASHI ISHIKAWA
  • Patent number: 8811418
    Abstract: An information processing apparatus which circulates a packet in one way among a plurality of modules connected in a ring shape, and transmits/receives the packet, each of the plurality of modules comprising a determination unit to determine whether data contained in the packet is processing-data to be processed by a processing-module of the module or configuration data for changing settings of the processing-module by an internally contained command, a discrimination unit to discriminate, when the data is determined to be the configuration data, a command type indicating the type of command contained within the configuration data as a write-mode in which the configuration data is written in the module, a read-mode in which currently set configuration data held in the module is read out, or an exchange-mode in which the currently set configuration data is read out, and then the configuration data is written, a decision unit to decide a packet transmission interval based on the command type.
    Type: Grant
    Filed: July 15, 2011
    Date of Patent: August 19, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hirowo Inoue, Hisashi Ishikawa
  • Publication number: 20140229639
    Abstract: In an apparatus which includes a plurality of processing modules connected via a ring-shape bus, if a plurality pieces of pipeline processing to be processed in a different order is allocated to a plurality of processing modules, the transfer efficiency may decrease when an amount of data transferred from one of the processing modules to a post-stage module exceeds a processing capacity of the post-stage module. Accordingly, a module positioned on the preceding side in the pipeline processing controls a transmission interval of processed data so that the post-stage module can receive the data processed by the preceding module.
    Type: Application
    Filed: April 28, 2014
    Publication date: August 14, 2014
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hiroyasu Watanabe, Hirowo Inoue, Hisashi Ishikawa
  • Patent number: 8799536
    Abstract: An apparatus, in which a plurality of modules is connected with each other and processes a packet having information, includes a storage unit for storing first information indicating an order of processing performed by its own module and second information indicating an order of modules which perform processing, a reception unit for receiving a first packet and transmitting the first packet including information corresponding to the first information, a processing unit for processing data included in the first packet, a generation unit for generating a second packet including the processed data and the second information, and a transmission unit for comparing the information included in the first packet with the second information included in the second packet, and transmitting the packet having a latter processing order.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: August 5, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Isao Sakamoto, Hisashi Ishikawa
  • Patent number: 8782108
    Abstract: A mask circuit (2) masks a bit sequence of K bits by a predetermined bit pattern. An EXOR circuit (3) EXORs the masked bit sequence. An inverter (9) controls inversion/non-inversion of values of bits of a bit sequence which includes a bit value indicating the EXOR result in a result obtained by shifting the bit sequence of K bits held in a shift register (1), in accordance with a designated bit value in a pattern table (14). A bit sequence as the control result is output as a random number expressed by K bits.
    Type: Grant
    Filed: January 25, 2011
    Date of Patent: July 15, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hisashi Ishikawa
  • Patent number: 8774234
    Abstract: A data processing apparatus includes an input unit to input data and processing modules. The processing modules may be connected as part of a ring-shaped data transfer path to transfer data in one direction. Each processing module includes a communication unit configured to implement a first data processing path and a setting path and a processing unit configured to process data received by the communication unit. When using switching data to switch the processing modules performing on the first data processing path to the processing modules performing on the setting path, the switching data is processed on the first data processing path.
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: July 8, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Isao Sakamoto, Hisashi Ishikawa