Patents by Inventor Hisaya Ogasawara

Hisaya Ogasawara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9380006
    Abstract: The packet processing method includes receiving a first packet, selecting a first storage area from a plurality of storage areas included in a buffer as a packet storage area in accordance with first time at which the first packet is received, and storing the first packet into the selected first storage area. The first storage area is selected as the packet storage area for the other packets received when a predetermined time period has passed from the first time.
    Type: Grant
    Filed: July 1, 2014
    Date of Patent: June 28, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Shigeo Konriki, Satoshi Namura, Masatoshi Yamamoto, Hisaya Ogasawara, Atsunori Yamamoto
  • Publication number: 20150049771
    Abstract: The packet processing method includes receiving a first packet, selecting a first storage area from a plurality of storage areas included in a buffer as a packet storage area in accordance with first time at which the first packet is received, and storing the first packet into the selected first storage area. The first storage area is selected as the packet storage area for the other packets received when a predetermined time period has passed from the first time.
    Type: Application
    Filed: July 1, 2014
    Publication date: February 19, 2015
    Applicant: FUJITSU LIMITED
    Inventors: Shigeo Konriki, Satoshi Namura, Masatoshi Yamamoto, Hisaya Ogasawara, Atsunori Yamamoto
  • Patent number: 8149856
    Abstract: Each of the plurality of queues stores packet data of a received packet. The read concession assignor assigns one of the plurality of queues with a read concession for a predefined time period. The overdraft storage stores an overdraft amount in connection with each of the plurality of queues. The read adequacy determiner determines, in accordance with an overdraft amount stored in connection with one queue out of the plurality of queues, whether to read packet data from the one queue. The overdraft updater updates at least one of a first overdraft amount stored in connection with a first queue and a second overdraft amount stored in connection with a second queue different from the first queue upon reading packet data from the first queue during a time period while the second queue is assigned with the read concession.
    Type: Grant
    Filed: September 24, 2009
    Date of Patent: April 3, 2012
    Assignee: Fujitsu Limited
    Inventors: Hiroyuki Kogata, Hisaya Ogasawara, Akio Shinohara
  • Publication number: 20100014539
    Abstract: Each of the plurality of queues stores packet data of a received packet. The read concession assignor assigns one of the plurality of queues with a read concession for a predefined time period. The overdraft storage stores an overdraft amount in connection with each of the plurality of queues. The read adequacy determiner determines, in accordance with an overdraft amount stored in connection with one queue out of the plurality of queues, whether to read packet data from the one queue. The overdraft updater updates at least one of a first overdraft amount stored in connection with a first queue and a second overdraft amount stored in connection with a second queue different from the first queue upon reading packet data from the first queue during a time period while the second queue is assigned with the read concession.
    Type: Application
    Filed: September 24, 2009
    Publication date: January 21, 2010
    Applicant: Fujitsu Limited
    Inventors: Hiroyuki KOGATA, Hisaya OGASAWARA, Akio SHINOHARA
  • Publication number: 20090290592
    Abstract: A buffer operation method, for use with a buffer organized as a plurality of sections, two or more continuous ones of the sections being defined as a monitor block, the method including: receiving a data packet and dividing the same into a plurality of divisions; storing the divisions in a given one of the sections; moving, in the case where the given section is behind the monitor block, the monitor block so that a tail end thereof corresponds to the given section; monitoring whether the plurality of divisions required for reassembly of the packet are stored in the monitor block; and transferring, once all the required plurality of divisions are collected in the monitor block, the same from the buffer for subsequent reassembly of the packet.
    Type: Application
    Filed: January 14, 2009
    Publication date: November 26, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Toshiteru Konishi, Hisaya Ogasawara, Hiroyuki Kitajima
  • Publication number: 20090232140
    Abstract: A packet transmission apparatus includes a transmission unit dividing input data and transferring segments, which are obtained by adding sequence numbers to the respective pieces of the divided data, a switch unit transferring the segments to one of a plurality of reception units, and a reception unit reconstructing an original input packet from the plurality of segments that arrive from the switch units on the basis of the sequence numbers. The reception unit includes a packet buffer storing segments that arrive from the switch units, a determination unit determining, on the basis of the sequence number, whether the segment stored in the packet buffer is to be discarded; and a discard part reading the segment stored in the packet buffer in an order from the segment having an older sequence number and discarding the segment that is determined to be discarded.
    Type: Application
    Filed: March 13, 2009
    Publication date: September 17, 2009
    Inventors: Hiroyuki KITAJIMA, Hisaya Ogasawara, Atsushi Kitada
  • Publication number: 20070297692
    Abstract: An image interpolation device (310) includes a feature quantity calculating unit (313), an image interpolation processing unit (314), a resolution conversion processing unit (315) and a display control processing unit (316). With regards to pixels positioned in an interpolation subject area and peripheral pixels of the pixels, the feature quantity calculating unit (313) calculates feature quantities of the pixels. The image interpolation processing unit (314) extracts a pixel with the largest feature quantity from among the pixels positioned in the interpolation subject area. When the feature quantity of the extracted pixel is equal to a threshold or more, the image interpolation processing unit (314) sets a pixel value of the pixel as a pixel value of interpolation pixels. The resolution conversion processing unit (315) performs a resolution conversion on image data of which the interpolation pixels have been interpolated by the image interpolation processing unit (314).
    Type: Application
    Filed: October 19, 2005
    Publication date: December 27, 2007
    Applicant: FUJITSU TEN LIMITED
    Inventors: Kiyoshi Hamatani, Satoru Uehara, Hisaya Ogasawara
  • Publication number: 20020073222
    Abstract: A packet transfer control method and a system employing the method achieve the search of a high capacity and a plurality of parameters required for hardware routing. The method includes the steps of finding, by means of hardware processing, a first route information which has been address solved by a tree search using a destination address contained in the header information of the IP packet; finding a second route information which has been solved by information, excluding the destination address, that specifies a packet; and combining the first and the second route information to judge the execution of transfer to software.
    Type: Application
    Filed: December 6, 2001
    Publication date: June 13, 2002
    Inventors: Toshi Sonoda, Shigeo Konriki, Hidehiko Ino, Hisaya Ogasawara, Hideki Kawada, Atsunori Yamamoto