Patents by Inventor Hitoshi Haematsu

Hitoshi Haematsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9583412
    Abstract: A semiconductor device includes a substrate having an edge, a semiconductor layer provided on a substrate, an electrode pad provided on the semiconductor layer, an inorganic insulating film having a first opening through which an upper surface of the electrode pad is exposed, and a resin film provided on the inorganic insulating film, the resin film having a second opening and a third opening separated from each other, where the upper surface of the electrode pad is exposed through the second opening, where the third opening is located between the second opening and the edge of the substrate, and where a bottom of the third opening is constituted by the resin film or the inorganic insulating film.
    Type: Grant
    Filed: May 9, 2014
    Date of Patent: February 28, 2017
    Assignee: Sumitomo Electric Device Innovations, Inc.
    Inventor: Hitoshi Haematsu
  • Patent number: 9559033
    Abstract: A semiconductor device includes a substrate having an edge, a semiconductor layer provided on a substrate, an electrode pad provided on the semiconductor layer, an inorganic insulating film having a first opening through which an upper surface of the electrode pad is exposed, and a resin film provided on the inorganic insulating film, the resin film having a second opening and a third opening separated from each other, where the upper surface of the electrode pad is exposed through the second opening, where the third opening is located between the second opening and the edge of the substrate, and where a bottom of the third opening is constituted by the resin film or the inorganic insulating film.
    Type: Grant
    Filed: May 9, 2014
    Date of Patent: January 31, 2017
    Assignee: Sumitomo ELectric Device Innovations, Inc.
    Inventor: Hitoshi Haematsu
  • Publication number: 20140332865
    Abstract: A semiconductor device includes a substrate having an edge, a semiconductor layer provided on a substrate, an electrode pad provided on the semiconductor layer, an inorganic insulating film having a first opening through which an upper surface of the electrode pad is exposed, and a resin film provided on the inorganic insulating film, the resin film having a second opening and a third opening separated from each other, where the upper surface of the electrode pad is exposed through the second opening, where the third opening is located between the second opening and the edge of the substrate, and where a bottom of the third opening is constituted by the resin film or the inorganic insulating film.
    Type: Application
    Filed: May 9, 2014
    Publication date: November 13, 2014
    Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventor: Hitoshi Haematsu
  • Patent number: 7049179
    Abstract: A source electrode, a gate electrode, and a drain electrode formed on a front face active region of a semiconductor substrate in a shape of teeth of a comb are covered with an insulating film such as polyimede etc., as well as all of the upper surface and the side surfaces of the insulating film are covered with a metal protective film. Via hole receiving pads connected to the source electrode, the gate electrode, and the drain electrode are respectively connected to bonding pads on a reveres face of the semiconductor substrate through via holes.
    Type: Grant
    Filed: September 11, 2003
    Date of Patent: May 23, 2006
    Assignee: Fujitsu Quantum Devices Limited
    Inventor: Hitoshi Haematsu
  • Patent number: 6998679
    Abstract: A semiconductor device includes a gate electrode on a semiconductor substrate, a source electrode and a drain electrode that are provided on the semiconductor substrate, the gate electrode being interposed between the source electrode and the drain electrode, an insulating layer covering the gate electrode, and a source wall that extends from the source electrode and passes over the gate electrode, an end surface of the source wall being interposed between the gate electrode and the drain electrode and being located in a position lower than a top surface of the gate electrode.
    Type: Grant
    Filed: January 23, 2003
    Date of Patent: February 14, 2006
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Kazutaka Inoue, Hitoshi Haematsu
  • Publication number: 20040048463
    Abstract: A source electrode, a gate electrode, and a drain electrode formed on a front face active region of a semiconductor substrate in a shape of teeth of a comb are covered with an insulating film such as polyimede etc., as well as all of the upper surface and the side surfaces of the insulating film are covered with a metal protective film. Via hole receiving pads connected to the source electrode, the gate electrode, and the drain electrode are respectively connected to bonding pads on a reveres face of the semiconductor substrate through via holes.
    Type: Application
    Filed: September 11, 2003
    Publication date: March 11, 2004
    Inventor: Hitoshi Haematsu
  • Patent number: 6664624
    Abstract: A source electrode, a gate electrode, and a drain electrode formed on a front face active region of a semiconductor substrate in a shape of teeth of a comb are covered with an insulating film such as polyimede etc., as well as all of the upper surface and the side surfaces of the insulating film are covered with a metal protective film. Via hole receiving pads connected to the source electrode, the gate electrode, and the drain electrode are respectively connected to bonding pads on a reveres face of the semiconductor substrate through via holes.
    Type: Grant
    Filed: May 30, 2002
    Date of Patent: December 16, 2003
    Assignee: Fujitsu-Quantum Devices Limited
    Inventor: Hitoshi Haematsu
  • Publication number: 20030183886
    Abstract: A semiconductor device includes a gate electrode on a semiconductor substrate, a source electrode and a drain electrode that are provided on the semiconductor substrate, the gate electrode being interposed between the source electrode and the drain electrode, an insulating layer covering the gate electrode, and a source wall that extends from the source electrode and passes over the gate electrode, an end surface of the source wall being interposed between the gate electrode and the drain electrode and being located in a position lower than a top surface of the gate electrode.
    Type: Application
    Filed: January 23, 2003
    Publication date: October 2, 2003
    Applicant: FUJITSU QUANTUM DEVICES LIMITED
    Inventors: Kazutaka Inoue, Hitoshi Haematsu
  • Patent number: 6504190
    Abstract: A gate electrode is in Schottky contact with the surface of a semiconductor substrate and extends in a first direction. A drain electrode is disposed on one side of the gate electrode, spaced apart from the gate electrode by some distance, and is in ohmic contact with the semiconductor substrate. A source electrode is constituted of a main part, an overhanging part and a shielding part. The main part is in ohmic contact with the semiconductor substrate in the region across the gate electrode from the drain electrode. The shielding part is disposed between the gate electrode and the drain electrode and extends in the first direction. The overhanging part passes over the gate electrode and connects the shielding part with main part. The size of the overhanging part along the first direction is smaller than the side of the shielding part.
    Type: Grant
    Filed: July 31, 2001
    Date of Patent: January 7, 2003
    Assignee: Fujitsu Quantum Devices Limited
    Inventor: Hitoshi Haematsu
  • Publication number: 20020180005
    Abstract: A source electrode, a gate electrode, and a drain electrode formed on a front face active region of a semiconductor substrate in a shape of teeth of a comb are covered with an insulating film such as polyimede etc., as well as all of the upper surface and the side surfaces of the insulating film are covered with a metal protective film. Via hole receiving pads connected to the source electrode, the gate electrode, and the drain electrode are respectively connected to bonding pads on a reveres face of the semiconductor substrate through via holes.
    Type: Application
    Filed: May 30, 2002
    Publication date: December 5, 2002
    Applicant: Fujitsu Quantum Devices Limited
    Inventor: Hitoshi Haematsu
  • Publication number: 20020038894
    Abstract: A gate electrode is in Schottky contact with the surface of a semiconductor substrate and extends in a first direction. A drain electrode is disposed on one side of the gate electrode, spaced apart from the gate electrode by some distance, and is in ohmic contact with the semiconductor substrate. A source electrode is constituted of a main part, an overhanging part and a shielding part. The main part is in ohmic contact with the semiconductor substrate in the region across the gate electrode from the drain electrode. The shielding part is disposed between the gate electrode and the drain electrode and extends in the first direction. The overhanging part passes over the gate electrode and connects the shielding part with main part. The size of the overhanging part along the first direction is smaller than the side of the shielding part.
    Type: Application
    Filed: July 31, 2001
    Publication date: April 4, 2002
    Applicant: Fujitsu Quantum Devices Limited
    Inventor: Hitoshi Haematsu