Patents by Inventor Hitoshi Hiratsuka

Hitoshi Hiratsuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11803270
    Abstract: A touch panel includes arranged touch electrodes, and a driver IC connected to each of the touch electrodes. The plurality of touch electrodes is grouped into a plurality of groups such that electrodes belonging to different groups are included in a range smaller than an object to be detected, such as a finger. The driver IC alternately or sequentially applies a driving voltage to the touch electrodes of the plurality of groups, detects a capacitance of each of the sensor electrodes, and detects, based on the detected capacitance, whether there is a touch.
    Type: Grant
    Filed: May 6, 2022
    Date of Patent: October 31, 2023
    Assignee: Shanghai Tianma Micro-Electronics Co., Ltd.
    Inventors: Tsuyoshi Ichiraku, Yukihiro Ito, Hitoshi Hiratsuka
  • Publication number: 20220365650
    Abstract: A touch panel includes arranged touch electrodes, and a driver IC connected to each of the touch electrodes. The plurality of touch electrodes is grouped into a plurality of groups such that electrodes belonging to different groups are included in a range smaller than an object to be detected, such as a finger. The driver IC alternately or sequentially applies a driving voltage to the touch electrodes of the plurality of groups, detects a capacitance of each of the sensor electrodes, and detects, based on the detected capacitance, whether there is a touch.
    Type: Application
    Filed: May 6, 2022
    Publication date: November 17, 2022
    Applicant: Shanghai Tianma Micro-Electronics Co., Ltd.
    Inventors: Tsuyoshi ICHIRAKU, Yukihiro ITO, Hitoshi HIRATSUKA
  • Patent number: 10013103
    Abstract: According to one embodiment, a pixel signal from a memory is supplied to an arbitrary pixel. A controller selectively switches a scanning frequency of common electrodes including a touch detection system, between a higher frequency and a lower frequency, and allocates banks in the memory, each bank having a capacity of a fixed number of items of the pixel data. The controller defines one unit including a group of lines of the pixel data, sets a line number of the one unit to the fixed number when the scanning frequency is the higher frequency, and sets the line number of the one unit to another line number which is greater than the fixed number when the scanning frequency is the lower frequency.
    Type: Grant
    Filed: March 23, 2016
    Date of Patent: July 3, 2018
    Assignee: Japan Display Inc.
    Inventors: Hitoshi Hiratsuka, Koji Shigehiro
  • Publication number: 20160283029
    Abstract: According to one embodiment, a pixel signal from a memory is supplied to an arbitrary pixel. A controller selectively switches a scanning frequency of common electrodes including a touch detection system, between a higher frequency and a lower frequency, and allocates banks in the memory, each bank having a capacity of a fixed number of items of the pixel data. The controller defines one unit including a group of lines of the pixel data, sets a line number of the one unit to the fixed number when the scanning frequency is the higher frequency, and sets the line number of the one unit to another line number which is greater than the fixed number when the scanning frequency is the lower frequency.
    Type: Application
    Filed: March 23, 2016
    Publication date: September 29, 2016
    Inventors: Hitoshi Hiratsuka, Koji Shigehiro
  • Patent number: 8319767
    Abstract: A driver includes a plurality of amplifier circuits which outputs a plurality of gradation voltages to a display portion according to a control signal, a control circuit which outputs the control signal, and a delay portion which sequentially supplies the control signal to amplifier circuits in a first amplifier circuit group, and which sequentially supplies a delayed control signal to amplifier circuits in a second amplifier circuit group other than the first amplifier circuit group, the delayed control signals obtained by delaying the control signal by a certain delay time.
    Type: Grant
    Filed: January 7, 2010
    Date of Patent: November 27, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Hitoshi Hiratsuka
  • Patent number: 8310507
    Abstract: Provided is a display device drive circuit capable of setting an optimum drive performance for each output amplifier without increasing the chip size. The display device drive circuit includes: at least two bias lines having different reference potentials; a selector that selects one of the bias lines based on a grayscale signal; and an output amplifier that is supplied with a reference potential of the one of the bias lines selected by the selector, generates a display signal, and supplies the display signal to a data line.
    Type: Grant
    Filed: February 4, 2010
    Date of Patent: November 13, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Hitoshi Hiratsuka
  • Patent number: 8310430
    Abstract: A driver includes a plurality of output portions; and an output switching control portion. The plurality of output portions is synchronized with a shift pulse signal. The shift pulse signal indicates one specification shift pulse signal among a plurality of specification shift pulse signals. The plurality of specification shift pulse signals indicates a plurality of output numbers which are different from each other based on respective specifications of the plurality of specification shift pulse signals. The one specification shift pulse signal indicates a setting output number as one output number among the plurality of output numbers. The output switching control portion selects a group of output portions corresponding to the setting output number among the plurality of output portions based on the one specification shift pulse signal.
    Type: Grant
    Filed: November 13, 2008
    Date of Patent: November 13, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Hitoshi Hiratsuka
  • Publication number: 20110006797
    Abstract: Provided are a probe card including a first area group including a plurality of first areas, each including a plurality of probes for input pad and probes for output pad, the first areas being aligned in L rows by M columns (L, M: natural number); and a second area group including a plurality of second areas, each including a plurality of probes for input pad, the second areas being aligned in (L×N) rows by M columns (N: natural number); and the first area group and the second area group are continuously connected in a column direction according to the chip alignment, such that the first areas and the second areas are aligned in {L+(L×N)} rows by M columns.
    Type: Application
    Filed: June 8, 2010
    Publication date: January 13, 2011
    Applicant: NEC Electronics Corporation
    Inventor: Hitoshi HIRATSUKA
  • Publication number: 20100245399
    Abstract: Provided is a display device drive circuit capable of setting an optimum drive performance for each output amplifier without increasing the chip size. The display device drive circuit includes: at least two bias lines having different reference potentials; a selector that selects one of the bias lines based on a grayscale signal; and an output amplifier that is supplied with a reference potential of the one of the bias lines selected by the selector, generates a display signal, and supplies the display signal to a data line.
    Type: Application
    Filed: February 4, 2010
    Publication date: September 30, 2010
    Applicant: NEC ELECTONICS CORPORATION
    Inventor: Hitoshi Hiratsuka
  • Publication number: 20100194731
    Abstract: A driver includes a plurality of amplifier circuits which outputs a plurality of gradation voltages to a display portion according to a control signal, a control circuit which outputs the control signal, and a delay portion which sequentially supplies the control signal to amplifier circuits in a first amplifier circuit group, and which sequentially supplies a delayed control signal to amplifier circuits in a second amplifier circuit group other than the first amplifier circuit group, the delayed control signals obtained by delaying the control signal by a certain delay time.
    Type: Application
    Filed: January 7, 2010
    Publication date: August 5, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Hitoshi Hiratsuka
  • Publication number: 20090135169
    Abstract: A driver includes a plurality of output portions; and an output switching control portion. The plurality of output portions is synchronized with a shift pulse signal. The shift pulse signal indicates one specification shift pulse signal among a plurality of specification shift pulse signals. The plurality of specification shift pulse signals indicates a plurality of output numbers which are different from each other based on respective specifications of the plurality of specification shift pulse signals. The one specification shift pulse signal indicates a setting output number as one output number among the plurality of output numbers. The output switching control portion selects a group of output portions corresponding to the setting output number among the plurality of output portions based on the one specification shift pulse signal.
    Type: Application
    Filed: November 13, 2008
    Publication date: May 28, 2009
    Applicant: NEC Electronics Corporation
    Inventor: Hitoshi Hiratsuka
  • Publication number: 20080094381
    Abstract: In a case where the data drive circuit is used for a face-up mounting, a reverse switching circuit is controlled so that a reverse switching signal RB can be at an “H” level. Thus, an output terminal S11 is caused to function as an output terminal from which to output a drive signal representing the R color, whereas an output terminal S13 is caused to function as an output terminal from which to output a drive signal representing the B color. In a case where the data drive circuit is used for a face-down mounting, the reverse switching circuit is controlled so that the reverse switching signal RB can be at an “L” level. Thus, the output terminal S11 is caused to function as the from which to output the drive signal representing the B color, whereas the output terminal S13 is caused to function as the output terminal from which to output the drive signal representing the R color.
    Type: Application
    Filed: October 18, 2007
    Publication date: April 24, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Hitoshi Hiratsuka
  • Publication number: 20060028426
    Abstract: A liquid crystal display apparatus is composed of a display panel including first and second regions adjacent to each other; a first source driver providing data signals for data lines within the first region of the display panel; and a second source driver providing data signals for data lines within the second region of the display panel. The first and second source drivers are designed so that a first polarity pattern of the data signals provided by the first source driver is controllable independently of a second polarity pattern of the data signals provided by the second source driver.
    Type: Application
    Filed: August 8, 2005
    Publication date: February 9, 2006
    Inventor: Hitoshi Hiratsuka