Patents by Inventor Ho Jin Cho

Ho Jin Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10521918
    Abstract: Disclosed is a method and device for filtering texture, using a patch shift. A patch-based texture filtering method for removing texture from an image comprises the steps of: distinguishing a structure edge from patches for each pixel of an input image; and performing a patch shift for the patches of each pixel, on the basis of structure edge information of each of the patches to select a representative patch of each pixel. Accordingly, the method can generate a result image in which texture has been automatically and completely removed from a piece of the input image.
    Type: Grant
    Filed: January 13, 2016
    Date of Patent: December 31, 2019
    Assignee: POSTECH ACADEMY-INDUSTRY FOUNDATION
    Inventors: Seung Yong Lee, Hyun Joon Lee, Hyung Woo Kang, Ho Jin Cho
  • Patent number: 10153284
    Abstract: A semiconductor device includes a substrate comprising a trench; a gate dielectric layer formed over a surface of the trench; a gate electrode positioned at a level lower than a top surface of the substrate, and comprising a lower buried portion embedded in a lower portion of the trench over the gate dielectric layer and an upper buried portion positioned over the lower buried portion; and a dielectric work function adjusting liner positioned between the lower buried portion and the gate dielectric layer; and a dipole formed between the dielectric work function adjusting liner and the gate dielectric layer.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: December 11, 2018
    Assignee: SK Hynix Inc.
    Inventors: Dong-Kyun Kang, Ho-Jin Cho
  • Publication number: 20180308850
    Abstract: A semiconductor device includes a substrate comprising a trench; a gate dielectric layer formed over a surface of the trench; a gate electrode positioned at a level lower than a top surface of the substrate, and comprising a lower buried portion embedded in a lower portion of the trench over the gate dielectric layer and an upper buried portion positioned over the lower buried portion; and a dielectric work function adjusting liner positioned between the lower buried portion and the gate dielectric layer; and a dipole formed between the dielectric work function adjusting liner and the gate dielectric layer.
    Type: Application
    Filed: June 28, 2018
    Publication date: October 25, 2018
    Inventors: Dong-Kyun KANG, Ho-Jin CHO
  • Patent number: 10037997
    Abstract: A semiconductor device includes a substrate comprising a trench; a gate dielectric layer formed over a surface of the trench; a gate electrode positioned at a level lower than a top surface of the substrate, and comprising a lower buried portion embedded in a lower portion of the trench over the gate dielectric layer and an upper buried portion positioned over the lower buried portion; and a dielectric work function adjusting liner positioned between the lower buried portion and the gate dielectric layer; and a dipole formed between the dielectric work function adjusting liner and the gate dielectric layer.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: July 31, 2018
    Assignee: SK Hynix Inc.
    Inventors: Dong-Kyun Kang, Ho-Jin Cho
  • Publication number: 20180197866
    Abstract: A semiconductor device includes a substrate comprising a trench; a gate dielectric layer formed over a surface of the trench; a gate electrode positioned at a level lower than a top surface of the substrate, and comprising a lower buried portion embedded in a lower portion of the trench over the gate dielectric layer and an upper buried portion positioned over the lower buried portion; and a dielectric work function adjusting liner positioned between the lower buried portion and the gate dielectric layer; and a dipole formed between the dielectric work function adjusting liner and the gate dielectric layer.
    Type: Application
    Filed: March 7, 2018
    Publication date: July 12, 2018
    Inventors: Dong-Kyun KANG, Ho-Jin CHO
  • Patent number: 9947667
    Abstract: A semiconductor device includes a substrate comprising a trench; a gate dielectric layer formed over a surface of the trench; a gate electrode positioned at a level lower than a top surface of the substrate, and comprising a lower buried portion embedded in a lower portion of the trench over the gate dielectric layer and an upper buried portion positioned over the lower buried portion; and a dielectric work function adjusting liner positioned between the lower buried portion and the gate dielectric layer; and a dipole formed between the dielectric work function adjusting liner and the gate dielectric layer.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: April 17, 2018
    Assignee: SK Hynix Inc.
    Inventors: Dong-Kyun Kang, Ho-Jin Cho
  • Publication number: 20180033156
    Abstract: Disclosed is a method and device for filtering texture, using a patch shift. A patch-based texture filtering method for removing texture from an image comprises the steps of: distinguishing a structure edge from patches for each pixel of an input image; and performing a patch shift for the patches of each pixel, on the basis of structure edge information of each of the patches to select a representative patch of each pixel. Accordingly, the method can generate a result image in which texture has been automatically and completely removed from a piece of the input image.
    Type: Application
    Filed: January 13, 2016
    Publication date: February 1, 2018
    Inventors: Seung Yong LEE, Hyun Joon LEE, Hyung Woo KANG, Ho Jin CHO
  • Patent number: 9740958
    Abstract: Method and apparatuses for correcting vignetting effects of an image are disclosed. A method for vignetting correction of an image according to an exemplary embodiment of the present disclosure may comprise receiving a two-dimensional image; calculating a radial bright channel representing intensity of the two-dimensional image; estimating a vignetting function of the two-dimensional image having similarity to the calculated radial bright channel; and correcting the vignetting effects of the two-dimensional image by using the estimated vignetting function. The vignetting correction methods and apparatuses according to the present disclosure can rapidly correct vignetting effects of an image by using a smaller memory, and correct vignetting effects of an arbitrary single image without being affected by a camera setting and camera lenses used for the image.
    Type: Grant
    Filed: December 23, 2015
    Date of Patent: August 22, 2017
    Assignee: POSTECH ACADEMY-INDUSTRY FOUNDATION
    Inventors: Seung Yong Lee, Ho Jin Cho, Hyun Joon Lee
  • Publication number: 20170186753
    Abstract: A semiconductor device includes a substrate comprising a trench; a gate dielectric layer formed over a surface of the trench; a gate electrode positioned at a level lower than a top surface of the substrate, and comprising a lower buried portion embedded in a lower portion of the trench over the gate dielectric layer and an upper buried portion positioned over the lower buried portion; and a dielectric work function adjusting liner positioned between the lower buried portion and the gate dielectric layer; and a dipole formed between the dielectric work function adjusting liner and the gate dielectric layer.
    Type: Application
    Filed: March 10, 2017
    Publication date: June 29, 2017
    Inventors: Dong-Kyun KANG, Ho-Jin CHO
  • Patent number: 9634011
    Abstract: A semiconductor device includes a substrate comprising a trench; a gate dielectric layer formed over a surface of the trench; a gate electrode positioned at a level lower than a top surface of the substrate, and comprising a lower buried portion embedded in a lower portion of the trench over the gate dielectric layer and an upper buried portion positioned over the lower buried portion; and a dielectric work function adjusting liner positioned between the lower buried portion and the gate dielectric layer; and a dipole formed between the dielectric work function adjusting liner and the gate dielectric layer.
    Type: Grant
    Filed: November 10, 2015
    Date of Patent: April 25, 2017
    Assignee: SK Hynix Inc.
    Inventors: Dong-Kyun Kang, Ho-Jin Cho
  • Publication number: 20160315088
    Abstract: A semiconductor device includes a substrate comprising a trench; a gate dielectric layer formed over a surface of the trench; a gate electrode positioned at a level lower than a top surface of the substrate, and comprising a lower buried portion embedded in a lower portion of the trench over the gate dielectric layer and an upper buried portion positioned over the lower buried portion; and a dielectric work function adjusting liner positioned between the lower buried portion and the gate dielectric layer; and a dipole formed between the dielectric work function adjusting liner and the gate dielectric layer.
    Type: Application
    Filed: November 10, 2015
    Publication date: October 27, 2016
    Inventors: Dong-Kyun KANG, Ho-Jin CHO
  • Publication number: 20160189353
    Abstract: Method and apparatuses for correcting vignetting effects of an image are disclosed. A method for vignetting correction of an image according to an exemplary embodiment of the present disclosure may comprise receiving a two-dimensional image; calculating a radial bright channel representing intensity of the two-dimensional image; estimating a vignetting function of the two-dimensional image having similarity to the calculated radial bright channel; and correcting the vignetting effects of the two-dimensional image by using the estimated vignetting function. The vignetting correction methods and apparatuses according to the present disclosure can rapidly correct vignetting effects of an image by using a smaller memory, and correct vignetting effects of an arbitrary single image without being affected by a camera setting and camera lenses used for the image.
    Type: Application
    Filed: December 23, 2015
    Publication date: June 30, 2016
    Inventors: Seung Yong Lee, Ho Jin Cho, Hyun Joon Lee
  • Patent number: 9189835
    Abstract: A method and apparatus for robust estimation of a non-uniform motion blur that may reduce an amount of the non-uniform motion blur information, that is, a number of homographies by estimating non-uniform motion blur information about a blur in a predetermined area, thereby reducing an amount of time needed to remove the non-uniform motion blur, and may improve accuracy and stability of the non-uniform motion blur information by estimating homographies for an input image while increasing a number of the homographies, iteratively.
    Type: Grant
    Filed: November 6, 2012
    Date of Patent: November 17, 2015
    Assignees: SAMSUNG ELECTRONICS CO., LTD., POSTECH ACADEMY-INDUSTRY FOUNDATION POHANG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Jung Uk Cho, Seung Yong Lee, Young Su Moon, Shi Hwa Lee, Chi Young Lee, Sung Hyun Cho, Ho Jin Cho
  • Patent number: 9042673
    Abstract: Provided is a method and apparatus for deblurring a non-uniform motion blur in an input image, that may restore a clearer image by dividing a large scale input image into tiles corresponding to partial areas, selecting, among the divided tiles, an optimal tile for a partial area most suitable for estimating non-uniform motion blur information, and effectively removing an artifact in an outer portion of a tile through padding of each tile.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: May 26, 2015
    Assignees: SAMSUNG ELECTRONICS CO., LTD., POSTECH ACADEMY-INDUSTRY FOUNDATION POHANG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Jung Uk Cho, Seung Yong Lee, Young Su Moon, Shi Hwa Lee, Chi Young Lee, Sung Hyun Cho, Ho Jin Cho
  • Patent number: 8995781
    Abstract: A method and apparatus for deblurring a non-uniform motion blur using a multi-frame including a blurred image and a noise image is provided. The apparatus may provide a clearer image by estimating non-uniform motion blur information of the blurred image using the multi-frame, and performing estimation of the non-uniform motion blur information and obtaining of a latent image iteratively, thereby improving accuracy for estimating the non-uniform motion blur information, and reducing a processing time.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: March 31, 2015
    Assignees: Samsung Electronics Co., Ltd., Postech Academy-Industry Foundation
    Inventors: Jung Uk Cho, Seung Yong Lee, Young Su Moon, Shi Hwa Lee, Chi Young Lee, Sung Hyun Cho, Ho Jin Cho
  • Publication number: 20130243319
    Abstract: Provided is a method and apparatus for deblurring a non-uniform motion blur in an input image, that may restore a clearer image by dividing a large scale input image into tiles corresponding to partial areas, selecting, among the divided tiles, an optimal tile for a partial area most suitable for estimating non-uniform motion blur information, and effectively removing an artifact in an outer portion of a tile through padding of each tile.
    Type: Application
    Filed: March 11, 2013
    Publication date: September 19, 2013
    Applicants: POSTECH ACADEMY-INDUSTRY FOUNDATION, SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung Uk Cho, Seung Yong Lee, Young Su Moon, Shi Hwa Lee, Chi Young Lee, Sung Hyun Cho, Ho Jin Cho
  • Publication number: 20130243346
    Abstract: A method and apparatus for deblurring a non-uniform motion blur using a multi-frame including a blurred image and a noise image is provided. The apparatus may provide a clearer image by estimating non-uniform motion blur information of the blurred image using the multi-frame, and performing estimation of the non-uniform motion blur information and obtaining of a latent image iteratively, thereby improving accuracy for estimating the non-uniform motion blur information, and reducing a processing time.
    Type: Application
    Filed: November 12, 2012
    Publication date: September 19, 2013
    Applicants: Postech Academy-Industry Foundation, Samsung Electronics Co., Ltd.
    Inventors: Jung Uk Cho, Seung Yong Lee, Young Su Moon, Shi Hwa Lee, Chi Young Lee, Sung Hyun Cho, Ho Jin Cho
  • Publication number: 20130236114
    Abstract: A method and apparatus for robust estimation of a non-uniform motion blur that may reduce an amount of the non-uniform motion blur information, that is, a number of homographies by estimating non-uniform motion blur information about a blur in a predetermined area, thereby reducing an amount of time needed to remove the non-uniform motion blur, and may improve accuracy and stability of the non-uniform motion blur information by estimating homographies for an input image while increasing a number of the homographies, iteratively.
    Type: Application
    Filed: November 6, 2012
    Publication date: September 12, 2013
    Applicants: Postech Academy-Industry Foundation, Samsung Electronics Co., Ltd.
    Inventors: Jung Uk CHO, Seung Yong Lee, Young Su Moon, Shi Hwa Lee, Chi Young Lee, Sung Hyun Cho, Ho Jin Cho
  • Patent number: 8476688
    Abstract: A semiconductor device that prevents the leaning of storage node when forming a capacitor having high capacitance includes a plurality of cylinder-shaped storage nodes formed over a semiconductor substrate; and support patterns formed to fix the storage nodes in the form of an ‘L’ or a ‘+’ when viewed from the top. This semiconductor device having support patterns in the form of an ‘L’ or a ‘+’ reduces stress on the storage nodes when subsequently forming a dielectric layer and plate nodes that prevents the capacitors from leaking.
    Type: Grant
    Filed: October 2, 2008
    Date of Patent: July 2, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventors: Ho Jin Cho, Cheol Hwan Park, Jae Wook Seo, Jong Kuk Kim
  • Patent number: 8470668
    Abstract: An embodiment of the invention includes a pillar type capacitor where a pillar is formed over an upper portion of a storage node contact. A bottom electrode is formed over sidewalls of the pillar, and a dielectric film is formed over pillar and the bottom electrode. A top electrode is then formed over the upper portion of the dielectric film.
    Type: Grant
    Filed: December 28, 2010
    Date of Patent: June 25, 2013
    Assignee: SK Hynix Inc.
    Inventors: Ho Jin Cho, Cheol Hwan Park, Dong Kyun Lee