Patents by Inventor Hock Heng Chong

Hock Heng Chong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10777536
    Abstract: Embodiments of chip-package and corresponding methods of manufacture are provided. In an embodiment of a chip-package, the chip-package includes: a carrier having a first side and a second side opposing the first side; a first chip coupled to the first side of the carrier; a second chip coupled to the second side of the carrier; an encapsulation with a first portion, which at least partially encloses the first chip on the first side of the carrier, and a second portion, which at least partially encloses the second chip on the second side of the carrier; a via extending through the first portion of the encapsulation, the carrier and the second portion of the encapsulation; and an electrically conductive material at least partly covering a sidewall of the via in the first portion or the second portion of the encapsulation, to electrically contact the carrier at either side.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: September 15, 2020
    Assignee: Infineon Technologies AG
    Inventors: Chau Fatt Chiang, April Coleen Tuazon Bernardez, Junny Abdul Wahid, Roslie Saini bin Bakar, Kon Hoe Chin, Hock Heng Chong, Kok Yau Chua, Hsieh Ting Kuek, Chee Hong Lee, Soon Lee Liew, Nurfarena Othman, Pei Luan Pok, Werner Reiss, Stefan Schmalzl
  • Publication number: 20200006267
    Abstract: A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads embedded in the mold compound are electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.
    Type: Application
    Filed: September 10, 2019
    Publication date: January 2, 2020
    Inventors: Swee Kah Lee, Hock Heng Chong, Mei Chin Ng, Aileen Manantan Soriano, Fong Mei Lum, Muhammad Muhammat Sanusi, Soon Lock Goh
  • Patent number: 10490470
    Abstract: A method of fabricating a semiconductor package comprises providing a carrier, fabricating an opening in the carrier, attaching a semiconductor chip to the carrier and fabricating an encapsulation body covering the semiconductor chip.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: November 26, 2019
    Assignee: Infineon Technologies AG
    Inventors: Hock Heng Chong, Sook Woon Chan, Chau Fatt Chiang, Khar Foong Chung, Chee Hong Fang, Muhammat Sanusi Muhammad, Mei Chin Ng, Yean Seng Ng, Pei Luan Pok, Choon Huey Wang
  • Patent number: 10431560
    Abstract: A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads embedded in the mold compound are electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.
    Type: Grant
    Filed: October 11, 2017
    Date of Patent: October 1, 2019
    Assignee: Infineon Technologies AG
    Inventors: Swee Kah Lee, Hock Heng Chong, Mei Chin Ng, Aileen Manantan Soriano, Fong Mei Lum, Muhammad Muhammat Sanusi, Soon Lock Goh
  • Publication number: 20190181120
    Abstract: Embodiments of chip-package and corresponding methods of manufacture are provided. In an embodiment of a chip-package, the chip-package includes: a carrier having a first side and a second side opposing the first side; a first chip coupled to the first side of the carrier; a second chip coupled to the second side of the carrier; an encapsulation with a first portion, which at least partially encloses the first chip on the first side of the carrier, and a second portion, which at least partially encloses the second chip on the second side of the carrier; a via extending through the first portion of the encapsulation, the carrier and the second portion of the encapsulation; and an electrically conductive material at least partly covering a sidewall of the via in the first portion or the second portion of the encapsulation, to electrically contact the carrier at either side.
    Type: Application
    Filed: December 7, 2018
    Publication date: June 13, 2019
    Inventors: Chau Fatt Chiang, April Coleen Tuazon Bernardez, Junny Abdul Wahid, Roslie Saini bin Bakar, Kon Hoe Chin, Hock Heng Chong, Kok Yau Chua, Hsieh Ting Kuek, Chee Hong Lee, Soon Lee Liew, Nurfarena Othman, Pei Luan Pok, Werner Reiss, Stefan Schmalzl
  • Publication number: 20180174935
    Abstract: A method of fabricating a semiconductor package comprises providing a carrier, fabricating an opening in the carrier, attaching a semiconductor chip to the carrier and fabricating an encapsulation body covering the semiconductor chip.
    Type: Application
    Filed: December 12, 2017
    Publication date: June 21, 2018
    Inventors: Hock Heng CHONG, Sook Woon CHAN, Chau Fatt CHIANG, Khar Foong CHUNG, Chee Hong FANG, Muhammat Sanusi MUHAMMAD, Mei Chin NG, Yean Seng NG, Pei Luan POK, Choon Huey WANG
  • Publication number: 20180033752
    Abstract: A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads embedded in the mold compound are electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.
    Type: Application
    Filed: October 11, 2017
    Publication date: February 1, 2018
    Inventors: Swee Kah Lee, Hock Heng Chong, Mei Chin Ng, Aileen Manantan Soriano, Fong Mei Lum, Muhammad Muhammat Sanusi, Soon Lock Goh
  • Patent number: 9806043
    Abstract: A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads are also embedded in the mold compound and electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.
    Type: Grant
    Filed: March 3, 2016
    Date of Patent: October 31, 2017
    Assignee: Infineon Technologies AG
    Inventors: Swee Kah Lee, Hock Heng Chong, Mei Chin Ng, Aileen Manantan Soriano, Fong Mei Lum, Muhammad Muhammat Sanusi, Soon Lock Goh
  • Publication number: 20170256509
    Abstract: A molded semiconductor package includes a mold compound having opposing first and second main surfaces and an edge extending between the first and second main surfaces. A semiconductor die is embedded in the mold compound. A plurality of metal pads are also embedded in the mold compound and electrically connected to the semiconductor die. The metal pads have a bottom face which is uncovered by the mold compound at the second main surface of the mold compound. The metal pads disposed around a periphery of the molded package have a side face which is uncovered by the mold compound at the edge of the mold compound. The faces of the metal pads uncovered by the mold compound are plated. The side face of each metal pad disposed around the periphery of the molded package is recessed inward from the edge of the mold compound. A corresponding manufacturing method is also described.
    Type: Application
    Filed: March 3, 2016
    Publication date: September 7, 2017
    Inventors: Swee Kah Lee, Hock Heng Chong, Mei Chin Ng, Aileen Manantan Soriano, Fong Mei Lum, Muhammad Muhammat Sanusi, Soon Lock Goh