Patents by Inventor Hong Gun Kim

Hong Gun Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11753722
    Abstract: Provided is a method of preparing a nanocomposite material plated with a network-type metal layer through silica self-cracks and a wearable electronics carbon fiber prepared therefrom. The present disclosure provides a nanocomposite material having excellent electrical conductivity and bending resistance by plating a network-type metal layer on a substrate having a flat surface and/or a curved surface through a method of preparing the nanocomposite material in which the network-type metal layer is plated on silica self-cracks by applying a silica coating solution on the substrate having a flat or curved surface, performing drying after the applying of the silica coating solution to form the silica self-cracks having random crack directions and sizes, and performing electroless metal plating on the surface of the substrate. Further, the present disclosure provides a wearable electronics carbon fiber having excellent electrical conductivity and bending resistance.
    Type: Grant
    Filed: February 11, 2021
    Date of Patent: September 12, 2023
    Assignees: JEONJU UNIVERSITY OFFICE OF INDUSTRY-UNIVERSITY COOPERATION
    Inventors: Hong-gun Kim, Hun Jeong, Leeku Kwac, Seonghun Back, Bobby Singh Soram
  • Patent number: 11626476
    Abstract: A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: April 11, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ha-young Yi, Youn-seok Choi, Young-min Ko, Mun-jun Kim, Hong-gun Kim, Seung-Heon Lee
  • Publication number: 20210254243
    Abstract: The present disclosure relates to a metal nanoparticles impregnated activated carbon fiber for removing harmful substances, and a method of manufacturing the same. A method of manufacturing a metal nanoparticles impregnated activated carbon fiber for removing harmful substances according to the present disclosure includes an activation step of manufacturing an activated carbon fiber by heat-treating a precursor including a waste carbon fiber under a mixed atmosphere of activation gases including water vapor, carbon monoxide, nitrogen, argon, helium, or combinations thereof, and a metal containing step of containing metal in the activated carbon fiber. According to the present disclosure, a carbonization process is unnecessary since a precursor including the waste carbon fiber is used, and the metal nanoparticles impregnated activated carbon fiber may have remarkably improved adsorptive power compared to an activated carbon fiber with the same specific surface area by controlling the micropore distribution.
    Type: Application
    Filed: February 19, 2021
    Publication date: August 19, 2021
    Applicant: JEONJU UNIVERSITY OFFICE OF INDUSTRY-UNIVERSITY COOPERATION
    Inventors: Seung Kon RYU, Hong Gun KIM
  • Publication number: 20210246558
    Abstract: Provided is a method of preparing a nanocomposite material plated with a network-type metal layer through silica self-cracks and a wearable electronics carbon fiber prepared therefrom. The present disclosure provides a nanocomposite material having excellent electrical conductivity and bending resistance by plating a network-type metal layer on a substrate having a flat surface and/or a curved surface through a method of preparing the nanocomposite material in which the network-type metal layer is plated on silica self-cracks by applying a silica coating solution on the substrate having a flat or curved surface, performing drying after the applying of the silica coating solution to form the silica self-cracks having random crack directions and sizes, and performing electroless metal plating on the surface of the substrate. Further, the present disclosure provides a wearable electronics carbon fiber having excellent electrical conductivity and bending resistance.
    Type: Application
    Filed: February 11, 2021
    Publication date: August 12, 2021
    Inventors: Hong-gun KIM, Hun JEONG, Leeku KWAC, Seonghun BACK, Bobby Singh SORAM
  • Publication number: 20210057518
    Abstract: A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.
    Type: Application
    Filed: November 10, 2020
    Publication date: February 25, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ha-young YI, Youn-seok CHOI, Young-min KO, Mun-jun KIM, Hong-gun KIM, Seung-Heon LEE
  • Patent number: 10879345
    Abstract: A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: December 29, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ha-young Yi, Youn-seok Choi, Young-min Ko, Mun-jun Kim, Hong-gun Kim, Seung-heon Lee
  • Publication number: 20200083319
    Abstract: A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.
    Type: Application
    Filed: November 11, 2019
    Publication date: March 12, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ha-young YI, Youn-seok Choi, Young-min Ko, Mun-jun Kim, Hong-gun Kim, Seung-heon Lee
  • Patent number: 10490623
    Abstract: A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: November 26, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ha-young Yi, Youn-seok Choi, Young-min Ko, Mun-jun Kim, Hong-gun Kim, Seung-heon Lee
  • Publication number: 20190131386
    Abstract: A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.
    Type: Application
    Filed: December 21, 2018
    Publication date: May 2, 2019
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ha-young YI, Youn-seok CHOI, Young-min KO, Mun-jun KIM, Hong-gun KIM, Seung-heon LEE
  • Patent number: 10170541
    Abstract: A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: January 1, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ha-young Yi, Youn-seok Choi, Young-min Ko, Mun-jun Kim, Hong-gun Kim, Seung-heon Lee
  • Publication number: 20170345886
    Abstract: A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.
    Type: Application
    Filed: May 22, 2017
    Publication date: November 30, 2017
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ha-young YI, Youn-seok CHOI, Young-min KO, Mun-jun KIM, Hong-gun KIM, Seung-heon LEE
  • Patent number: 9627469
    Abstract: A doped mold film is formed with a dopant concentration gradient in the doped mold film that continuously varies in a thickness direction and a portion of the doped mold film is etched in the thickness direction to form a hole so that an electrode can be formed along an inner wall of the hole. The electrode thus formed includes a first outer wall surface, a second outer wall surface, and a third outer wall surface wherein the first outer wall surface is in contact with a sidewall of an insulating pattern formed on a substrate within a through hole formed in the insulating pattern; the second outer wall surface is in contact with a top surface of the insulating pattern and extends in a lateral direction; the third outer wall surface is spaced apart from the first outer wall surface with the second outer wall surface therebetween; and the third outer wall surface extends on the insulating pattern in a direction away from the substrate.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: April 18, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ha-young Yi, Jun-won Lee, Byoung-deog Choi, Jong-myeong Lee, Mun-jun Kim, Hong-gun Kim
  • Publication number: 20160343799
    Abstract: A doped mold film is formed with a dopant concentration gradient in the doped mold film that continuously varies in a thickness direction and a portion of the doped mold film is etched in the thickness direction to form a hole so that an electrode can be formed along an inner wall of the hole. The electrode thus formed includes a first outer wall surface, a second outer wall surface, and a third outer wall surface wherein the first outer wall surface is in contact with a sidewall of an insulating pattern formed on a substrate within a through hole formed in the insulating pattern; the second outer wall surface is in contact with a top surface of the insulating pattern and extends in a lateral direction; the third outer wall surface is spaced apart from the first outer wall surface with the second outer wall surface therebetween; and the third outer wall surface extends on the insulating pattern in a direction away from the substrate.
    Type: Application
    Filed: December 17, 2015
    Publication date: November 24, 2016
    Inventors: Ha-young Yi, Jun-won Lee, Byoung-deog Choi, Jong-myeong Lee, Mun-jun Kim, Hong-gun Kim
  • Patent number: 9263536
    Abstract: Methods include sequentially forming a first mold film, a first support film, a second mold film, and a second support film on a substrate, forming a contact hole through the second support film, the second mold film, the first support film and the first mold film, forming an electrode in the contact hole, and removing portions of the second support film, the second mold film and the first mold film to leave a portion of the first support film as a first support pattern surrounding the electrode and to leave a portion of the second support film as a second support pattern surrounding the electrode.
    Type: Grant
    Filed: October 24, 2013
    Date of Patent: February 16, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hong-Gun Kim, Young-Min Ko, Kwang-Tae Hwang
  • Patent number: 9142610
    Abstract: A semiconductor device and a method of fabricating the same, the device including a substrate having a transistor formed thereon; a plurality of lower electrodes formed on the substrate; a first supporter and a second supporter on the plurality of lower electrodes; a dielectric film formed on the lower electrode, the first supporter, and the second supporter; and an upper electrode formed on the dielectric film, wherein the first and second supporters are positioned between the lower electrodes, and the first and second supporters include a first material and a second material.
    Type: Grant
    Filed: November 8, 2013
    Date of Patent: September 22, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hong-Gun Kim, Kwang-Tae Hwang, Young-Min Ko
  • Publication number: 20140145303
    Abstract: A semiconductor device and a method of fabricating the same, the device including a substrate having a transistor formed thereon; a plurality of lower electrodes formed on the substrate; a first supporter and a second supporter on the plurality of lower electrodes; a dielectric film formed on the lower electrode, the first supporter, and the second supporter; and an upper electrode formed on the dielectric film, wherein the first and second supporters are positioned between the lower electrodes, and the first and second supporters include a first material and a second material.
    Type: Application
    Filed: November 8, 2013
    Publication date: May 29, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hong-Gun KIM, Kwang-Tae HWANG, Young-Min KO
  • Publication number: 20140134839
    Abstract: Methods include sequentially forming a first mold film, a first support film, a second mold film, and a second support film on a substrate, forming a contact hole through the second support film, the second mold film, the first support film and the first mold film, forming an electrode in the contact hole, and removing portions of the second support film, the second mold film and the first mold film to leave a portion of the first support film as a first support pattern surrounding the electrode and to leave a portion of the second support film as a second support pattern surrounding the electrode.
    Type: Application
    Filed: October 24, 2013
    Publication date: May 15, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hong-Gun Kim, Young-Min Ko, Kwang-Tae Hwang
  • Patent number: 8530329
    Abstract: A method of fabricating a semiconductor device includes forming a first trench and a second trench in a semiconductor substrate, forming a first insulator to completely fill the first trench, the first insulator covering a bottom surface and lower sidewalls of the second trench and exposing upper sidewalls of the second trench, and forming a second insulator on the first insulator in the second trench.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: September 10, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Soon Choi, Jun-Won Lee, Gil-Heyun Choi, Eun-Kee Hong, Hong-Gun Kim, Ha-Young Yi
  • Publication number: 20120034757
    Abstract: A method of fabricating a semiconductor device includes forming a first trench and a second trench in a semiconductor substrate, forming a first insulator to completely fill the first trench, the first insulator covering a bottom surface and lower sidewalls of the second trench and exposing upper sidewalls of the second trench, and forming a second insulator on the first insulator in the second trench.
    Type: Application
    Filed: June 16, 2011
    Publication date: February 9, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yong-Soon Choi, Jun-Won Lee, Gil-Heyun Choi, Eunkee Hong, Hong-Gun Kim, Ha-Young Yi
  • Publication number: 20110207334
    Abstract: A method of manufacturing a semiconductor device includes an improved technique of filling a trench to provide the resulting semiconductor device with better characteristics and higher reliability. The method includes forming a trench in a semiconductor layer, forming a first layer on the semiconductor layer using a silicon source and a nitrogen source to fill the trench, curing the first layer using an oxygen source, and annealing the second layer. The method may also be used to form other types of insulating layers such as an interlayer insulating layer.
    Type: Application
    Filed: October 12, 2010
    Publication date: August 25, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yong-soon CHOI, Hong-gun KIM, Ha-young YI, Gil-heyun CHOI, Eun-kee Hong