Patents by Inventor Hong-Mook Choi

Hong-Mook Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220283731
    Abstract: The present disclosure describes a storage device. The storage device includes a nonvolatile memory device and a memory controller controlling the nonvolatile memory device. The memory controller includes a plurality of encryption and decryption cores, the plurality of encryption and decryption cores perform initialization at the same time and generate a plurality of initial tweak values, respectively, sequentially select the plurality of initial tweak values to perform encryption or decryption, and perform the encryption or the decryption together by using an initial tweak value selected from the plurality of initial tweak values.
    Type: Application
    Filed: October 18, 2021
    Publication date: September 8, 2022
    Inventors: KWANGHO YOO, HOYOU JUN, JAEJOON CHOI, HONG-MOOK CHOI, JUHYUNG HONG
  • Patent number: 11392725
    Abstract: Provided are a security processor for performing a remainder operation by using a random number and an operating method of the security processor. The security processor includes a random number generator configured to generate a first random number; a modular calculator configured to generate a first random operand based on first data and the first random number and generate output data through a remainder operation on the first random operand, wherein a result value of the remainder operation on the first input data is identical to a result value of the remainder operation on the first random operand.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: July 19, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-hyeok Kim, Jong-hoon Shin, Ji-su Kang, Hyun-il Kim, Hye-soo Lee, Hong-mook Choi
  • Patent number: 11354453
    Abstract: An encryption device includes a counter, an encryption/decryption unit, and a timer. The counter is configured to generate a first timestamp for a first time. The encryption/decryption unit is configured to concatenate security data and the first timestamp, encrypt the concatenated data into encryption data, transmit the encryption data to a memory device, and decrypt read data transmitted from the memory device into decryption data. The timer is configured to inform the counter and the encryption/decryption unit that a time elapses from the first time to a second time such that the counter generates a second timestamp for the second time and the encryption/decryption unit decrypts the read data into the decryption data. Checking logic implemented by the encryption device is configured to check whether a decryption timestamp of the decryption data is identical to the first timestamp.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: June 7, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ingoo Heo, Jaechul Park, Youngjin Chung, Hong-Mook Choi
  • Patent number: 11328097
    Abstract: An encryption circuit includes a pipelined encryption core having a plurality of round cores therein. The pipelined encryption core is configured to perform a real round operation on each of a plurality of pieces of input data received therein and generate encryption data from the input data using an encryption operation comprising the real round operation. An encryption controller is provided, which is coupled to the pipelined encryption core. The encryption controller is configured to control the pipelined encryption core so that at least one of the plurality of round cores performs a virtual round operation as part of the encryption operation. The pipelined encryption core is configured to perform a virtual encryption operation using at least one of: (i) dummy data, and (ii) a dummy encryption key.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: May 10, 2022
    Inventors: Hong-mook Choi, Jae-hyeok Kim, Ji-su Kang, Hyun-il Kim, Jong-hoon Shin, Hye-soo Lee
  • Patent number: 11309048
    Abstract: A method of testing using a memory test apparatus connected to a memory device includes receiving a test command. When the test command is a finite state machine (FSM) operation command, the memory device is tested in accordance with the FSM operation command, and an operation is performed to output a result depending on a pass/fail result. But, when the test command is a direct access command, an auto-operation test of input data is performed in a test region according to received address information, and a test result is output, which may include output data with fail information or the auto-operation.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: April 19, 2022
    Inventors: Hong-Mook Choi, Hye Soo Lee, Ji-Su Kang, Hyun Il Kim
  • Patent number: 11228438
    Abstract: A security device providing a security function for an image, a camera device including the same, and a system on chip (SOC) for controlling the camera device are provided. An image transmitting device may include an image processor configured to process an image to be transmitted to an external device, and a security circuit including a key shared with the external device. The security circuit may be configured to generate a tag used for image authentication by using data of a partial region of the image and the key based on region information for selecting the partial region of the image. The image transmitting device may be configured to transmit the tag, generated to correspond to the image, to the external device with data of the image.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: January 18, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong-hoon Shin, Ki-seok Bae, Hong-mook Choi, Ji-su Kang, Jae-hyeok Kim, Hye-soo Lee, Hyo-sun Hwang
  • Publication number: 20210284703
    Abstract: An encryption device for performing virtual and real operations and a method of operating the encryption device. The method includes performing a virtual operation; when a real operation request signal is received, determining whether the virtual operation being performed is completed; and in response to the virtual operation being completed, performing a real operation in response to the real operation request signal.
    Type: Application
    Filed: April 30, 2021
    Publication date: September 16, 2021
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-hyeok KIM, Hong-mook CHOI, Ji-su KANG, Hyun-il KIM, Jong-hoon SHIN, Hye-soo LEE
  • Publication number: 20210249096
    Abstract: A method of testing using a memory test apparatus connected to a memory device includes receiving a test command. When the test command is a finite state machine (FSM) operation command, the memory device is tested in accordance with the FSM operation command, and an operation is performed to output a result depending on a pass/fail result. But, when the test command is a direct access command, an auto-operation test of input data is performed in a test region according to received address information, and a test result is output, which may include output data with fail information or the auto-operation.
    Type: Application
    Filed: September 21, 2020
    Publication date: August 12, 2021
    Inventors: HONG-MOOK CHOI, HYE SOO LEE, JI-SU KANG, HYUN IL KIM
  • Patent number: 10949546
    Abstract: A security device includes a secure processor, a mail box, a cryptographic intellectual property (IP), a secure direct memory access (DMA) circuit, and an internal memory. The secure processor provides an isolated execution environment. The mail box transfers a request from a CPU to the secure processor. The cryptographic IP performs one or more secure operations, including a signature certification operation, an encryption/decryption operation, and an integrity verification operation, on secure data within the isolated execution environment and without intervention of the CPU. The secure DMA circuit controls the one or more secure operations within the isolated execution environment, wherein only the secure processor is configured to control the secure DMA circuit. The internal memory stores the secure data on which the one or more secure operations are performed. The cryptographic IP includes a DMA circuit configured to control data access to an external storage.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: March 16, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Jin Chung, Jae-Chul Park, Ki-Seok Bae, Jong-Hoon Shin, Yun-Ho Youm, Hye-Soo Lee, Hong-Mook Choi, Jin-Su Hyun
  • Patent number: 10891396
    Abstract: An electronic circuit includes an operator including logic gates configured to perform either one or both of encryption and decryption operations. The electronic circuit further includes a controller configured to control the operator to operate in a first mode in which each of the logic gates outputs a first logic value during a first time period of a clock signal, and operate in a second mode in which a number of first logic gates, each of which outputs the first logic value, among the logic gates, and a number of second logic gates, each of which outputs a second logic value, among the logic gates, are maintained constant during a second time period of the clock signal, in response to a control value indicating that either one or both of the encryption and decryption operations are performed.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: January 12, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hong-Mook Choi, Yun-Ho Youm, Sang-Hyun Park, Hyesoo Lee
  • Patent number: 10749672
    Abstract: A path for transmitting encrypted data is completely separated from a path for transmitting unencrypted data. To this end, a virtual secure memory is created on an address space. If a central processing unit (CPU) writes data in the virtual secure memory, hardware stores the data in a specific area of a dynamic random access memory (DRAM) after automatically encrypting the data. In the case where the CPU intents to read data, the hardware sends the data to the CPU after automatically decrypting the data read from a specific area of the DRAM.
    Type: Grant
    Filed: May 3, 2017
    Date of Patent: August 18, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Heonsoo Lee, Jaechul Park, Jonghoon Shin, Youngjin Chung, Hong-Mook Choi
  • Publication number: 20200226294
    Abstract: Provided are a security processor for performing a remainder operation by using a random number and an operating method of the security processor. The security processor includes a random number generator configured to generate a first random number; a modular calculator configured to generate a first random operand based on first data and the first random number and generate output data through a remainder operation on the first random operand, wherein a result value of the remainder operation on the first input data is identical to a result value of the remainder operation on the first random operand.
    Type: Application
    Filed: August 9, 2019
    Publication date: July 16, 2020
    Inventors: JAE-HYEOK KIM, Jong-hoon Shin, Jl-su Kang, Hyun-Il Kim, Hye-soo Lee, Hong-mook Choi
  • Publication number: 20200110906
    Abstract: An encryption circuit includes a pipelined encryption core having a plurality of round cores therein. The pipelined encryption core is configured to perform a real round operation on each of a plurality of pieces of input data received therein and generate encryption data from the input data using an encryption operation comprising the real round operation. An encryption controller is provided, which is coupled to the pipelined encryption core. The encryption controller is configured to control the pipelined encryption core so that at least one of the plurality of round cores performs a virtual round operation as part of the encryption operation. The pipelined encryption core is configured to perform a virtual encryption operation using at least one of: (i) dummy data, and (ii) a dummy encryption key.
    Type: Application
    Filed: July 25, 2019
    Publication date: April 9, 2020
    Inventors: Hong-mook Choi, Jae-hyeok Kim, Ji-su Kang, Hyun-il Kim, Jong-hoon Shin, Hye-soo Lee
  • Patent number: 10396978
    Abstract: A method for encryption, decryption, or encryption and decryption of data in a crypto device having at least one crypto core may include: generating a tweak value corresponding to block data, which is placed at a random position from which the encryption, decryption, or encryption and decryption starts, from among sequential block data; and/or performing the encryption, decryption, or encryption and decryption from the block data using the tweak value. A method for encryption, decryption, or encryption and decryption of block data may include: generating a tweak value corresponding to the block data at a random position; and/or performing the encryption, decryption, or encryption and decryption of the block data using the tweak value.
    Type: Grant
    Filed: August 3, 2016
    Date of Patent: August 27, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hong-Mook Choi, Heonsoo Lee, Sang-Hyun Park
  • Publication number: 20190156069
    Abstract: An encryption device includes a counter, an encryption/decryption unit, and a timer. The counter is configured to generate a first timestamp for a first time. The encryption/decryption unit is configured to concatenate security data and the first timestamp, encrypt the concatenated data into encryption data, transmit the encryption data to a memory device, and decrypt read data transmitted from the memory device into decryption data. The timer is configured to inform the counter and the encryption/decryption unit that a time elapses from the first time to a second time such that the counter generates a second timestamp for the second time and the encryption/decryption unit decrypts the read data into the decryption data. Checking logic implemented by the encryption device is configured to check whether a decryption timestamp of the decryption data is identical to the first timestamp.
    Type: Application
    Filed: June 21, 2018
    Publication date: May 23, 2019
    Inventors: INGOO HEO, JAECHUL PARK, YOUNGJIN CHUNG, HONG-MOOK CHOI
  • Patent number: 10291390
    Abstract: An endecryptor and a control device are provided. The endecryptor includes a first SBOX configured to replace first input data with first substitution data, a transformation unit configured to replace the first input data with second substitution data and an output terminal configured to output encrypted or decrypted output data based on the first and second substitution data.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: May 14, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hong-Mook Choi, Yun-Ho Youm, Yong-Ki Lee, Jin-Su Hyun
  • Publication number: 20190116022
    Abstract: An encryption device for performing virtual and real operations and a method of operating the encryption device. The method includes performing a virtual operation; when a real operation request signal is received, determining whether the virtual operation being performed is completed; and in response to the virtual operation being completed, performing a real operation in response to the real operation request signal.
    Type: Application
    Filed: October 11, 2018
    Publication date: April 18, 2019
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-hyeok KIM, Hong-mook CHOI, Ji-su KANG, Hyun-il KIM, Jong-hoon SHIN, Hye-soo LEE
  • Publication number: 20190097805
    Abstract: A security device providing a security function for an image, a camera device including the same, and a system on chip (SOC) for controlling the camera device are provided. An image transmitting device may include an image processor configured to process an image to be transmitted to an external device, and a security circuit including a key shared with the external device. The security circuit may be configured to generate a tag used for image authentication by using data of a partial region of the image and the key based on region information for selecting the partial region of the image. The image transmitting device may be configured to transmit the tag, generated to correspond to the image, to the external device with data of the image.
    Type: Application
    Filed: September 28, 2018
    Publication date: March 28, 2019
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong-hoon SHIN, Ki-seok BAE, Hong-mook CHOI, Ji-su KANG, Jae-hyeok KIM, Hye-soo LEE, Hyo-sun HWANG
  • Publication number: 20190042765
    Abstract: A security device includes a secure processor, a mail box, a cryptographic intellectual property (IP), a secure direct memory access (DMA) circuit, and an internal memory. The secure processor provides an isolated execution environment. The mail box transfers a request from a CPU to the secure processor. The cryptographic IP performs one or more secure operations, including a signature certification operation, an encryption/decryption operation, and an integrity verification operation, on secure data within the isolated execution environment and without intervention of the CPU. The secure DMA circuit controls the one or more secure operations within the isolated execution environment, wherein only the secure processor is configured to control the secure DMA circuit. The internal memory stores the secure data on which the one or more secure operations are performed. The cryptographic IP includes a DMA circuit configured to control data access to an external storage.
    Type: Application
    Filed: June 29, 2018
    Publication date: February 7, 2019
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Young-Jin CHUNG, Jae-Chul PARK, Ki-Seok BAE, Jong-Hoon SHIN, Yun-Ho YOUM, Hye-Soo LEE, Hong-Mook CHOI, Jin-Su HYUN
  • Patent number: 10177913
    Abstract: A semiconductor device may include: a bus; first and second function modules configured to communicate via the bus; a first encryption module configured to encrypt first data output from the first function module using a first encryption key to generate first encrypted data; and/or a second encryption module configured to decrypt the first encrypted data using the first encryption key, to output the decrypted first data to the second function module, and to encrypt second data output from the second function module using a second encryption key to generate second encrypted data. A semiconductor device may include: a bus; first and second modules configured to communicate via the bus; and/or an encryption module configured to use different encryption policies for first data, which is output from the first module and stored in a memory, and second data, which is output from the second module and stored in the memory.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: January 8, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Heon Soo Lee, Yong Ki Lee, Sang Hyun Park, Mi Jung Noh, Hong Mook Choi, Dong Jin Park, Woo Hyung Chun