Patents by Inventor Hong-rae Kim

Hong-rae Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10141200
    Abstract: In a method of manufacturing a semiconductor memory device, a plurality of first conductive structures including a first conductive pattern and a hard mask are sequentially stacked on a substrate. A plurality of preliminary spacer structures including first spacers, sacrificial spacers and second spacers are sequentially stacked on sidewalls of the conductive structures. A plurality of pad structures are formed on the substrate between the preliminary spacer structures, and define openings exposing an upper portion of the sacrificial spacers. A first mask pattern is formed to cover surfaces of the pad structures, and expose the upper portion of the sacrificial spacers. The sacrificial spacers are removed to form first spacer structures having respective air spacers, and the first spacer structures include the first spacers, the air spacers and the second spacers sequentially stacked on the sidewalls of the conductive structures.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: November 27, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyung-Mun Byun, Badro Im, Hong-Rae Kim, Sin-Hae Do, Gyeong-Deok Park
  • Patent number: 10014181
    Abstract: Methods of forming patterns for semiconductor devices are provided. A method may include preparing a substrate including an etch target layer on a surface of the substrate; forming a mask pattern that includes a lower masking layer having a first density and an upper masking layer having a second density that is less than the first density, on the etch target layer; forming spacers that cover sidewalls of the lower masking layer and the upper masking layer; removing the mask pattern; and etching the etch target layer by using the spacers as an etching mask.
    Type: Grant
    Filed: July 20, 2016
    Date of Patent: July 3, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-soo Lee, Hong-rae Kim, Jeon-il Lee
  • Patent number: 9973458
    Abstract: Provided is a mobile chatting system for allowing cartoon story-type chatting between chatting users of a mobile terminal on which a cartoon-type chatting application is installed and a mobile terminal on which the cartoon-type chatting application is not installed, which includes: a first mobile terminal on which a cartoon-type chatting application is installed; a second mobile terminal for allowing chatting in a cartoon story form through a web page; a chatting server for relaying chatting between the first and second mobile terminals; and a chatting web server for, when a chatting message is input from the second mobile terminal, displaying the message and the user of the second mobile terminal with a cartoon character on the chatting web page.
    Type: Grant
    Filed: April 5, 2013
    Date of Patent: May 15, 2018
    Assignee: I-ON COMMUNICATIONS CO., LTD.
    Inventor: Hong Rae Kim
  • Patent number: 9953928
    Abstract: Semiconductor devices including empty spaces and methods of forming the semiconductor devices are provided. The semiconductor devices may include first and second line structures extending in a direction on a substrate, an insulating isolation pattern between the first and second line structures and a conductive structure between the first and second line structures and next to the insulating isolation pattern along the direction. The semiconductor devices may also include an empty space including a first portion between the first line structure and the conductive structure and a second portion between the first line structure and the insulating isolation pattern. The first portion of the empty space may have a height different from a height of the second portion of the empty space.
    Type: Grant
    Filed: June 17, 2016
    Date of Patent: April 24, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hong-Rae Kim, Byoung-Deog Choi, Hee-Young Park, Sang-Ho Roh, Jin-Hyung Park, Kyung-Mun Byun
  • Publication number: 20180012775
    Abstract: In a method of manufacturing a semiconductor memory device, a plurality of first conductive structures including a first conductive pattern and a hard mask are sequentially stacked on a substrate. A plurality of preliminary spacer structures including first spacers, sacrificial spacers and second spacers are sequentially stacked on sidewalls of the conductive structures. A plurality of pad structures are formed on the substrate between the preliminary spacer structures, and define openings exposing an upper portion of the sacrificial spacers. A first mask pattern is formed to cover surfaces of the pad structures, and expose the upper portion of the sacrificial spacers. The sacrificial spacers are removed to form first spacer structures having respective air spacers, and the first spacer structures include the first spacers, the air spacers and the second spacers sequentially stacked on the sidewalls of the conductive structures.
    Type: Application
    Filed: June 5, 2017
    Publication date: January 11, 2018
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Kyung-Mun BYUN, Badro IM, Hong-Rae KIM, Sin-Hae DO, Gyeong-Deok PARK
  • Publication number: 20170125256
    Abstract: Methods of forming patterns for semiconductor devices are provided. A method may include preparing a substrate including an etch target layer on a surface of the substrate; forming a mask pattern that includes a lower masking layer having a first density and an upper masking layer having a second density that is less than the first density, on the etch target layer; forming spacers that cover sidewalls of the lower masking layer and the upper masking layer; removing the mask pattern; and etching the etch target layer by using the spacers as an etching mask.
    Type: Application
    Filed: July 20, 2016
    Publication date: May 4, 2017
    Inventors: Jun-soo LEE, Hong-rae KIM, Jeon-il LEE
  • Publication number: 20160300795
    Abstract: Semiconductor devices including empty spaces and methods of forming the semiconductor devices are provided. The semiconductor devices may include first and second line structures extending in a direction on a substrate, an insulating isolation pattern between the first and second line structures and a conductive structure between the first and second line structures and next to the insulating isolation pattern along the direction. The semiconductor devices may also include an empty space including a first portion between the first line structure and the conductive structure and a second portion between the first line structure and the insulating isolation pattern. The first portion of the empty space may have a height different from a height of the second portion of the empty space.
    Type: Application
    Filed: June 17, 2016
    Publication date: October 13, 2016
    Inventors: Hong-Rae Kim, BYOUNG-DEOG CHOI, HEE-YOUNG PARK, SANG-HO ROH, JIN-HYUNG PARK, KYUNG-MUN BYUN
  • Patent number: 9391138
    Abstract: Semiconductor devices including empty spaces and methods of forming the semiconductor devices are provided. The semiconductor devices may include first and second line structures extending in a direction on a substrate, an insulating isolation pattern between the first and second line structures and a conductive structure between the first and second line structures and next to the insulating isolation pattern along the direction. The semiconductor devices may also include an empty space including a first portion between the first line structure and the conductive structure and a second portion between the first line structure and the insulating isolation pattern. The first portion of the empty space may have a height different from a height of the second portion of the empty space.
    Type: Grant
    Filed: May 9, 2014
    Date of Patent: July 12, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hong-Rae Kim, Byoung-Deog Choi, Hee-Young Park, Sang-Ho Roh, Jin-Hyung Park, Kyung-Mun Byun
  • Publication number: 20150121256
    Abstract: Provided is a mobile chatting system for allowing cartoon story-type chatting between chatting users of a mobile terminal on which a cartoon-type chatting application is installed and a mobile terminal on which the cartoon-type chatting application is not installed, which includes: a first mobile terminal on which a cartoon-type chatting application is installed; a second mobile terminal for allowing chatting in a cartoon story form through a web page; a chatting server for relaying chatting between the first and second mobile terminals; and a chatting web server for, when a chatting message is input from the second mobile terminal, displaying the message and the user of the second mobile terminal with a cartoon character on the chatting web page.
    Type: Application
    Filed: April 5, 2013
    Publication date: April 30, 2015
    Applicant: I-ON COMMUNICATIONS CO., LTD.
    Inventor: Hong Rae Kim
  • Publication number: 20140367825
    Abstract: Semiconductor devices including empty spaces and methods of forming the semiconductor devices are provided. The semiconductor devices may include first and second line structures extending in a direction on a substrate, an insulating isolation pattern between the first and second line structures and a conductive structure between the first and second line structures and next to the insulating isolation pattern along the direction. The semiconductor devices may also include an empty space including a first portion between the first line structure and the conductive structure and a second portion between the first line structure and the insulating isolation pattern. The first portion of the empty space may have a height different from a height of the second portion of the empty space.
    Type: Application
    Filed: May 9, 2014
    Publication date: December 18, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hong-Rae KIM, Byoung-Deog CHOI, Hee-Young PARK, Sang-Ho ROH, Jin-Hyung PARK, Kyung-Mun BYUN
  • Patent number: 8624354
    Abstract: A semiconductor device may include a semiconductor substrate and a plurality of three-dimensional capacitors on the semiconductor substrate. Each of the plurality of three-dimensional capacitors may include a first three-dimensional electrode, a capacitor dielectric layer, and a second three-dimensional electrode with the first three-dimensional electrode between the capacitor dielectric layer and the semiconductor substrate and with the capacitor dielectric layer between the first and second three-dimensional electrodes. A plurality of capacitor support pads may be provided with each capacitor support pad being arranged between adjacent first three-dimensional electrodes of adjacent three-dimensional capacitors with portions of the capacitor dielectric layers between the capacitor support pads and the semiconductor substrate. Related methods and apparatuses are also discussed.
    Type: Grant
    Filed: July 2, 2010
    Date of Patent: January 7, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Shin-hye Kim, Kyung-mun Byun, Hong-rae Kim, Gil-heyun Choi, Eun-kee Hong
  • Publication number: 20110115051
    Abstract: A semiconductor device may include a semiconductor substrate and a plurality of three-dimensional capacitors on the semiconductor substrate. Each of the plurality of three-dimensional capacitors may include a first three-dimensional electrode, a capacitor dielectric layer, and a second three-dimensional electrode with the first three-dimensional electrode between the capacitor dielectric layer and the semiconductor substrate and with the capacitor dielectric layer between the first and second three-dimensional electrodes. A plurality of capacitor support pads may be provided with each capacitor support pad being arranged between adjacent first three-dimensional electrodes of adjacent three-dimensional capacitors with portions of the capacitor dielectric layers between the capacitor support pads and the semiconductor substrate. Related methods and apparatuses are also discussed.
    Type: Application
    Filed: July 2, 2010
    Publication date: May 19, 2011
    Inventors: Shin-hye Kim, Kyung-mun Byun, Hong-rae Kim, Gil-heyun Choi, Eun-kee Hong
  • Publication number: 20100059376
    Abstract: Disclosed is a method of analyzing a protein, comprising the steps of: (A) labeling small amounts of protein samples with CyDyes having different fluorescent properties, respectively; (B) mixing 50-100 ?g of each of the protein samples, labeled in step (A), with 1-5 mg of each of one or more of the unlabeled protein samples, and subjecting the mixture to electrophoresis; (C) subjecting the electrophoresed gel to fluorescence analysis to detect a difference in protein distribution between the protein samples; and (D) excising spot(s), showing the difference in protein distribution, from the gel, and isolating and identifying from the spots a protein, which is different in protein distribution between the protein samples. According to the present invention, a protein from a gel can be identified by MALDI-TOF, while simultaneously analyzing the gel qualitatively and quantitatively using a difference in the fluorescence of CyDyes with very high sensitivity.
    Type: Application
    Filed: November 17, 2009
    Publication date: March 11, 2010
    Applicant: The Industry & Academic Corporation in Chungnam National University
    Inventors: Dong Il Jin, Jae Young Lee, Hong Rae Kim, Chang-Sik Park
  • Patent number: 7033909
    Abstract: Methods of forming trench isolations are provided. A method includes providing a semiconductor substrate having a cell array region and a peripheral region. At least one cell trench in the cell array region and at least one peripheral trench wider than the cell trench in the peripheral region of the substrate are formed. The cell and the peripheral trenches have sidewalls. A first dielectric layer that partially fills the cell and peripheral trenches is formed over the substrate. At least one photoresist pattern that exposes at least the cell trench partially filled with the first dielectric layer is formed over the substrate. The first dielectric layer formed on the sidewalls of the exposed cell trench is etched by using the photoresist pattern as a etch mask. Subsequently, the photoresist pattern is removed. A second dielectric layer filling the cell and peripheral trenches is formed over the substrate where the photoresist pattern is removed.
    Type: Grant
    Filed: April 12, 2004
    Date of Patent: April 25, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hong-Rae Kim, Ju-Bum Lee, Min Kim
  • Publication number: 20050009293
    Abstract: Methods of forming trench isolations are provided. A method includes providing a semiconductor substrate having a cell array region and a peripheral region. At least one cell trench in the cell array region and at least one peripheral trench wider than the cell trench in the peripheral region of the substrate are formed. The cell and the peripheral trenches have sidewalls. A first dielectric layer that partially fills the cell and peripheral trenches is formed over the substrate. At least one photoresist pattern that exposes at least the cell trench partially filled with the first dielectric layer is formed over the substrate. The first dielectric layer formed on the sidewalls of the exposed cell trench is etched by using the photoresist pattern as a etch mask. Subsequently, the photoresist pattern is removed. A second dielectric layer filling the cell and peripheral trenches is formed over the substrate where the photoresist pattern is removed.
    Type: Application
    Filed: April 12, 2004
    Publication date: January 13, 2005
    Inventors: Hong-Rae Kim, Ju-Bum Lee, Min Kim
  • Patent number: 6374492
    Abstract: An assembly system and method thereof for manufacturing an outdoor unit of a dual-unit type air conditioner employs an assembly system in which the outdoor unit is assembled, a refrigerant charging section in which the assembled outdoor unit is charged with a refrigerant, a testing section in which the outdoor unit charged with the refrigerant is tested, and a packaging section in which the outdoor unit after passing the test in the testing section is packaged and forwarded. The outdoor unit is carried on a mobile cart through the assembly section, the refrigerant charging section, and the testing section.
    Type: Grant
    Filed: September 4, 2001
    Date of Patent: April 23, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Doo-nam Myung, Hong-rae Kim
  • Patent number: 6374483
    Abstract: A production line of an air conditioner mounted with a work bench for mass-producing indoor units and outdoor units, the work bench including a pallet supply section; an outdoor unit work part mounted at one side of the pallet supply section with a parts assembly section, refrigerant tube vacuum forming and refrigerant infusion section, refrigerant infusion tube removal section, control unit assembly section, refrigerant leakage inspection section, cabinet assembly section, packing section, forwarding and loading section in that order; an indoor unit work part mounted at the other side of the pallet supply section with first pallet feeding section, parts assembly section, noise inspection section, second pallet feeding section, packing section and forwarding and loading section in that order, and integrally installed from parts assembly section of the outdoor unit work part to cabinet assembly section; performance inspection section mounted between the cabinet assembly section and packing section of the outdo
    Type: Grant
    Filed: June 20, 2000
    Date of Patent: April 23, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Yeol Lee, Hong-Rae Kim, Jong-Gweon Kim
  • Publication number: 20020029475
    Abstract: An assembly system and method thereof for manufacturing an outdoor unit of a dual-unit type air conditioner employs an assembly system in which the outdoor unit is assembled, a refrigerant charging section in which the assembled outdoor unit is charged with a refrigerant, a testing section in which the outdoor unit charged with the refrigerant is tested, and a packaging section in which the outdoor unit after passing the test in the testing section is packaged and forwarded. The outdoor unit is carried on a mobile cart through the assembly section, the refrigerant charging section, and the testing section.
    Type: Application
    Filed: September 4, 2001
    Publication date: March 14, 2002
    Inventors: Doo-nam Myung, Hong-rae Kim
  • Patent number: 6301776
    Abstract: An assembly system and method thereof for manufacturing an outdoor unit of a dual-unit type air conditioner employs an assembly system in which the outdoor unit is assembled, a refrigerant charging section in which the assembled outdoor unit is charged with a refrigerant, a testing section in which the outdoor unit charged with the refrigerant is tested, and a packaging section in which the outdoor unit after passing the test in the testing section is packaged and forwarded. The outdoor unit is carried on a mobile cart through the assembly section, the refrigerant charging section, and the testing section.
    Type: Grant
    Filed: March 3, 1999
    Date of Patent: October 16, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Doo-nam Myung, Hong-rae Kim