Patents by Inventor Honglin Guo
Honglin Guo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180102216Abstract: A heated capacitor runs current through either a lower metal plate, an upper metal plate, a lower metal trace that lies adjacent to a lower metal plate, an upper metal trace that lies adjacent to an upper metal plate, or both a lower metal trace that lies adjacent to a lower metal plate and an upper metal trace that lies adjacent to an upper metal plate to generate heat from the resistance to remove moisture from a moisture-sensitive insulating layer.Type: ApplicationFiled: December 8, 2017Publication date: April 12, 2018Inventors: Honglin Guo, Byron Lovell Williams
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Patent number: 9875846Abstract: A heated capacitor runs current through either a lower metal plate, an upper metal plate, a lower metal trace that lies adjacent to a lower metal plate, an upper metal trace that lies adjacent to an upper metal plate, or both a lower metal trace that lies adjacent to a lower metal plate and an upper metal trace that lies adjacent to an upper metal plate to generate heat from the resistance to remove moisture from a moisture-sensitive insulating layer.Type: GrantFiled: February 12, 2016Date of Patent: January 23, 2018Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Honglin Guo, Byron Lovell Williams
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Patent number: 9793106Abstract: It has been discovered that poor TDDB reliability of microelectronic device capacitors with organic polymer material in the capacitor dielectric is due to water molecules infiltrating the organic polymer material when the microelectronic device is exposed to water vapor in the operating ambient. Water molecule infiltration from water vapor in the ambient is effectively reduced by a moisture barrier comprising a layer of aluminum oxide formed by an atomic layer deposition (ALD) process. A microelectronic device includes a capacitor with organic polymer material in the capacitor dielectric and a moisture barrier with a layer of aluminum oxide formed by an ALD process.Type: GrantFiled: November 3, 2015Date of Patent: October 17, 2017Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Honglin Guo, Tim A. Taylor, Jeff A. West, Ricky A. Jackson, Byron Williams
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Publication number: 20160163452Abstract: A heated capacitor runs current through either a lower metal plate, an upper metal plate, a lower metal trace that lies adjacent to a lower metal plate, an upper metal trace that lies adjacent to an upper metal plate, or both a lower metal trace that lies adjacent to a lower metal plate and an upper metal trace that lies adjacent to an upper metal plate to generate heat from the resistance to remove moisture from a moisture-sensitive insulating layer.Type: ApplicationFiled: February 12, 2016Publication date: June 9, 2016Inventors: Honglin Guo, Byron Lovell Williams
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Publication number: 20160133689Abstract: It has been discovered that poor TDDB reliability of microelectronic device capacitors with organic polymer material in the capacitor dielectric is due to water molecules infiltrating the organic polymer material when the microelectronic device is exposed to water vapor in the operating ambient. Water molecule infiltration from water vapor in the ambient is effectively reduced by a moisture barrier comprising a layer of aluminum oxide formed by an atomic layer deposition (ALD) process. A microelectronic device includes a capacitor with organic polymer material in the capacitor dielectric and a moisture barrier with a layer of aluminum oxide formed by an ALD process.Type: ApplicationFiled: November 3, 2015Publication date: May 12, 2016Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Honglin Guo, Tim A. Taylor, Jeff A. West, Ricky A. Jackson, Byron Williams
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Publication number: 20160133580Abstract: A semiconductor die includes a plurality of layers, the plurality of layers having a top surface. A scribe seal is located in the plurality of layers and includes a first metal stack having a first metal layer located proximate the top surface. A trench is located in at least one layer of the plurality of layers. The trench extends from the top surface of the plurality of layers and is located a distance from the first metal stack. An electrical insulating layer is located on the top surface. The electrical insulating layer covers at least a portion of the top surface adjacent the first metal layer and extends a distance from the top surface of the first metal layer.Type: ApplicationFiled: September 15, 2015Publication date: May 12, 2016Inventors: Thomas D. Bonifield, Jeffrey A. West, Byron Williams, Honglin Guo
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Patent number: 9293254Abstract: A heated capacitor runs current through either a lower metal plate, an upper metal plate, a lower metal trace that lies adjacent to a lower metal plate, an upper metal trace that lies adjacent to an upper metal plate, or both a lower metal trace that lies adjacent to a lower metal plate and an upper metal trace that lies adjacent to an upper metal plate to generate heat from the resistance to remove moisture from a moisture-sensitive insulating layer.Type: GrantFiled: May 28, 2014Date of Patent: March 22, 2016Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Honglin Guo, Byron Lovell Williams
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Publication number: 20150348708Abstract: A heated capacitor runs current through either a lower metal plate, an upper metal plate, a lower metal trace that lies adjacent to a lower metal plate, an upper metal trace that lies adjacent to an upper metal plate, or both a lower metal trace that lies adjacent to a lower metal plate and an upper metal trace that lies adjacent to an upper metal plate to generate heat from the resistance to remove moisture from a moisture-sensitive insulating layer.Type: ApplicationFiled: May 28, 2014Publication date: December 3, 2015Applicant: Texas Instrument IncorporatedInventors: Honglin Guo, Byron Lovell Williams
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Patent number: 7888776Abstract: One embodiment of the present invention relates to a scribe seal integrity detector. In this embodiment a scribe seal integrity detector is formed in an integrated circuit chip die. The scribe seal integrity comprises a scribe seal structure that extends along at least a portion of the periphery of the integrated chip die and a detector test structure. The detector test structure and the scribe seal form an electrical system configured to be accessed for a monitoring of one or more electrical parameters to determine and characterize scribe seal integrity of the integrated circuit chip die. The results of the electric measurements are analyzed for statistically relevant reliability characterization. Other methods and circuits are also disclosed.Type: GrantFiled: June 30, 2008Date of Patent: February 15, 2011Assignee: Texas Instruments IncorporatedInventors: Ennis T. Ogawa, Honglin Guo, Joe W. McPherson
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Publication number: 20100276039Abstract: Copper alloys, methods for producing copper alloys, and copper tubes are provided. The copper alloys include an alpha solid solution formed from phosphorous deoxidized copper and at least one trace element comprising tin. The content of tin ranges from about 0.1% to about 2.0% by weight of the copper alloy. The trace element can further include zinc in an amount from about 0.05% to about 1.0% by weight of the copper alloy. The copper alloys have an increased tensile strength due to the strengthening effect by the alpha solid solution formed by phosphorous deoxidized copper and tin as the trace element, and accordingly a copper tube made from the copper alloy has a significantly improved pressure resistance.Type: ApplicationFiled: April 28, 2010Publication date: November 4, 2010Applicant: Golden Dragon Precise Copper Tube Group Inc.Inventors: Honglin Guo, Zhenguo Feng, Jinhao Zhao, Daixing Liu, Guowei Liu, Junqi Li
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Publication number: 20090321734Abstract: One embodiment of the present invention relates to a scribe seal integrity detector. In this embodiment a scribe seal integrity detector is formed in an integrated circuit chip die. The scribe seal integrity comprises a scribe seal structure that extends along at least a portion of the periphery of the integrated chip die and a detector test structure. The detector test structure and the scribe seal form an electrical system configured to be accessed for a monitoring of one or more electrical parameters to determine and characterize scribe seal integrity of the integrated circuit chip die. The results of the electric measurements are analyzed for statistically relevant reliability characterization. Other methods and circuits are also disclosed.Type: ApplicationFiled: June 30, 2008Publication date: December 31, 2009Applicant: Texas Instruments IncorporatedInventors: Ennis T. Ogawa, Honglin Guo, Joe W. McPherson
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Patent number: 7612454Abstract: One aspect of the invention provides an integrated circuit(IC) [400b]. The IC comprises transistors [410b] and contact fuses [422b]. The contact fuses each comprise a conducting layer [424b], a frustum-shaped contact [426b] has a narrower end that contacts the conducting layer and a first metal layer [427b] that is located over the conducting layer. A wider end of the frustum-shaped contact contacts the first metal layer. The frustum-shaped contact has a ratio of an opening of the wider end to the narrower end that is at least about 1.2. The contact fuses each further include a heat sink [432b] that is located over and contacts the first metal layer.Type: GrantFiled: July 14, 2008Date of Patent: November 3, 2009Assignee: Texas Instruments IncorporatedInventors: Honglin Guo, Dongmei Lei, Brian Goodlin, Joe McPherson
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Publication number: 20080265366Abstract: One aspect of the invention provides an integrated circuit(IC) [400b]. The IC comprises transistors [410b] and contact fuses [422b]. The contact fuses each comprise a conducting layer [424b], a frustum-shaped contact [426b] has a narrower end that contacts the conducting layer and a first metal layer [427b] that is located over the conducting layer. A wider end of the frustum-shaped contact contacts the first metal layer. The frustum-shaped contact has a ratio of an opening of the wider end to the narrower end that is at least about 1.2. The contact fuses each further include a heat sink [432b] that is located over and contacts the first metal layer.Type: ApplicationFiled: July 14, 2008Publication date: October 30, 2008Applicant: Texas Instruments IncorporatedInventors: Honglin Guo, Dongmei Lei, Brian Goodlin, Joe McPherson
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Patent number: 7413980Abstract: One aspect of the invention provides an integrated circuit (IC). The IC comprises transistors and contact fuses. The contact fuses each comprise a conducting layer, a frustum-shaped contact has a narrower end that contacts the conducting layer and a first metal layer that is located over the conducting layer. A wider end of the frustum-shaped contact contacts the first metal layer. The frustum-shaped contact has a ratio of an opening of the wider end to the narrower end that is at least about 1.2. The contact fuses each further include a heat sink that is located over and contacts the first metal layer.Type: GrantFiled: April 25, 2006Date of Patent: August 19, 2008Assignee: Texas Instruments IncorporatedInventors: Honglin Guo, Dongmei Lei, Brian Goodlin, Joe McPherson
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Publication number: 20070246796Abstract: One aspect of the invention provides an integrated circuit (IC). The IC comprises transistors and contact fuses. The contact fuses each comprise a conducting layer, a frustum-shaped contact has a narrower end that contacts the conducting layer and a first metal layer that is located over the conducting layer. A wider end of the frustum-shaped contact contacts the first metal layer. The frustum-shaped contact has a ratio of an opening of the wider end to the narrower end that is at least about 1.2. The contact fuses each further include a heat sink that is located over and contacts the first metal layer.Type: ApplicationFiled: April 25, 2006Publication date: October 25, 2007Applicant: Texas Instruments IncorporatedInventors: Honglin Guo, Dongmei Li, Brian Goodlin, Joe McPherson
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Patent number: 6965136Abstract: An embodiment of the invention is a method to reduce light induced corrosion and re-deposition of a metal, 8, (such as copper) that is used to make the interconnect wiring during the semiconductor manufacturing process. The light induced corrosion and re-deposition is caused by the exposure of a P-N junction to light, causing a photovoltaic effect. A photon-blocking layer, 13, is used in the invention to reduce the amount of exposure of the P-N junction to light. The photon blocking layer, 13, of the invention may be a direct band-gap material with a band-gap energy that is less than the lower edge of the energy spectrum of a typical light source used in the semiconductor manufacturing facility (typically less than 1.7 eV).Type: GrantFiled: October 14, 2003Date of Patent: November 15, 2005Assignee: Texas Instruments IncorporatedInventors: Yaojian Leng, Honglin Guo, Joe W. McPherson
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Publication number: 20050159004Abstract: The present invention defines a system for impeding corrosive egress from a metallic trench structure (206) during the production of a semiconductor device segment (200). The system of the present invention provides a first non-metallic structure (212) and a second non-metallic structure (214). The metallic trench structure is interposed between the first and second non-metallic structures. The device segment is cleaned, after which an upper exposed surface (220) of the metallic structure is recessed (226) from an upper exposed surface (216) of the first or second non-metallic structure by a desired amount.Type: ApplicationFiled: January 20, 2004Publication date: July 21, 2005Inventors: Honglin Guo, Joe McPherson
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Patent number: 6919219Abstract: An embodiment of the invention is a method to reduce light induced corrosion and re-deposition of a metal, 8, (such as copper) that is used to make the interconnect wiring during the semiconductor manufacturing process. The light induced corrosion and re-deposition is caused by the exposure of a P-N junction to light, causing a photovoltaic effect. A photon-blocking layer, 13, is used in the invention to reduce the amount of exposure of the P-N junction to light. The photon blocking layer, 13, of the invention may be a direct band-gap material with a band-gap energy that is less than the lower edge of the energy spectrum of a typical light source used in the semiconductor manufacturing facility (typically less than 1.7 eV).Type: GrantFiled: December 13, 2002Date of Patent: July 19, 2005Assignee: Texas Instruments IncorporatedInventors: Yaojian Leng, Honglin Guo, Joe W. McPherson
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Publication number: 20040102000Abstract: An embodiment of the invention is a method to reduce light induced corrosion and re-deposition of a metal, 8, (such as copper) that is used to make the interconnect wiring during the semiconductor manufacturing process. The light induced corrosion and re-deposition is caused by the exposure of a P-N junction to light, causing a photovoltaic effect. A photon-blocking layer, 13, is used in the invention to reduce the amount of exposure of the P-N junction to light. The photon blocking layer, 13, of the invention may be a direct band-gap material with a band-gap energy that is less than the lower edge of the energy spectrum of a typical light source used in the semiconductor manufacturing facility (typically less than 1.7 eV).Type: ApplicationFiled: October 14, 2003Publication date: May 27, 2004Inventors: Yaojian Leng, Honglin Guo, Joe W. McPherson
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Publication number: 20040099867Abstract: An embodiment of the invention is a method to reduce light induced corrosion and re-deposition of a metal, 8, (such as copper) that is used to make the interconnect wiring during the semiconductor manufacturing process. The light induced corrosion and re-deposition is caused by the exposure of a P-N junction to light, causing a photovoltaic effect. A photon-blocking layer, 13, is used in the invention to reduce the amount of exposure of the P-N junction to light. The photon blocking layer, 13, of the invention may be a direct band-gap material with a band-gap energy that is less than the lower edge of the energy spectrum of a typical light source used in the semiconductor manufacturing facility (typically less than 1.7 eV).Type: ApplicationFiled: December 13, 2002Publication date: May 27, 2004Inventors: Yaojian Leng, Honglin Guo, Joe W. McPherson