Patents by Inventor Hongyong Zhang

Hongyong Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5942768
    Abstract: TFTs of peripheral logic circuits and TFTs of an active matrix circuit (pixel circuit) are formed on a single substrate by using a crystalline silicon film. The crystalline silicon film is obtained by introducing a catalyst element, such as nickel, for accelerating crystallization into an amorphous silicon film and heating it. In doing so, the catalyst element is introduced into regions for the peripheral logic circuits in a non-selective manner, and is selectively introduced into regions for the active matrix circuit. As a result, vertical crystal growth and lateral crystal growth are effected in the former regions and the latter regions, respectively. Particularly in the latter regions, the off-current and its variation can be reduced.
    Type: Grant
    Filed: February 18, 1997
    Date of Patent: August 24, 1999
    Assignee: Semionductor Energy Laboratory Co., Ltd.
    Inventor: Hongyong Zhang
  • Patent number: 5938839
    Abstract: A method for forming a semiconductor device is disclosed. The method comprises the step of irradiating a laser light to a surface of a semiconductor through a mask provided on said surface in an atmosphere comprising an impurity of one conductivity type to diffuse said impurity into a region of said semiconductor.
    Type: Grant
    Filed: September 6, 1994
    Date of Patent: August 17, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hongyong Zhang
  • Patent number: 5940732
    Abstract: Method of fabricating thin-film transistors in which contact with connecting electrodes becomes reliable. When contact holes are formed, the bottom insulating layer is subjected to a wet etching process, thus producing undercuttings inside the contact holes. In order to remove the undercuttings, a light etching process is carried out to widen the contact holes. Thus, tapering section are obtained, and the covering of connection wiring is improved.
    Type: Grant
    Filed: November 25, 1996
    Date of Patent: August 17, 1999
    Assignee: Semiconductor Energy Laboratory Co.,
    Inventor: Hongyong Zhang
  • Patent number: 5929948
    Abstract: An active matrix liquid crystal display comprising a common electrode (#217), connected to a conductive black matrix (#302 and #303) through a coupling electrode (#227), which allows the black matrix to be set at the common potential. The common electrode is formed on the same layer as that of the source lines and data lines. The pixel electrode (#228) and the coupling electrode (#227) are comprised of the same transparent electrically conductive material.
    Type: Grant
    Filed: February 19, 1997
    Date of Patent: July 27, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuya Ohori, Michiko Takei, Hongyong Zhang, Hideomi Suzawa, Naoaki Yamaguchi
  • Patent number: 5923961
    Abstract: There is provided an active matrix type display in which thin film transistors having required characteristics are provided selectively in a pixel matrix portion and a peripheral driving circuit portion. In a structure having the pixel matrix portion and the peripheral driving circuit portion on the same substrate, N-channel type thin film transistors having source and drain regions formed through a non-self-alignment process and low concentrate impurity regions formed through a self-alignment process are formed in the pixel matrix portion and in an N-channel driver portion of the peripheral driving circuit portion. A P-channel type thin film transistor in which no low concentrate impurity region is formed and source and drain regions are formed only through the self-alignment process is formed in a P-channel driver portion of the peripheral driving circuit portion.
    Type: Grant
    Filed: November 12, 1997
    Date of Patent: July 13, 1999
    Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki Kaisha
    Inventors: Tsukasa Shibuya, Atsushi Yoshinouchi, Hongyong Zhang, Akira Takenouchi
  • Patent number: 5923962
    Abstract: A process for fabricating a highly stable and reliable semiconductor, comprising: coating the surface of an amorphous silicon film with a solution containing a catalyst element capable of accelerating the crystallization of the amorphous silicon film, and heat treating the amorphous silicon film thereafter to crystallize the film.
    Type: Grant
    Filed: April 28, 1995
    Date of Patent: July 13, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisashi Ohtani, Akiharu Miyanaga, Takeshi Fukunaga, Hongyong Zhang
  • Patent number: 5922125
    Abstract: In order to obtain a thin-film transistor having high characteristics using a metal element for accelerating the crystallization of silicon, a nickel element is selectively added to the surface of an amorphous silicon film (103) in regions (101) and (102) and regions (108) to (110), and a heat treatment is carried out to grow crystals (horizontal growth) in directions parallel to the substrate as indicated by arrows (104) to (107). At this point, the regions (108) to (110) having a width of 5 .mu.m or less serve as stopper regions so that horizontal growth starting from the regions (101) and (102) stops there. In this way, the horizontal growth regions can be formed with high controllability. Then a circuit such as a shift register can be constructed with a region having the same crystal growth form.
    Type: Grant
    Filed: December 10, 1996
    Date of Patent: July 13, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hongyong Zhang
  • Patent number: 5917225
    Abstract: In a thin-film insulated gate type field effect transistor having a metal gate in which the surface of the gate electrode is subjected to anodic oxidation, a silicon nitride film is provided so as to be interposed between the gate electrode and the gate insulating film to prevent invasion of movable ions into a channel, and also to prevent the breakdown of the gate insulating film due to a potential difference between the gate electrode and the channel region. By coating a specific portion of the gate electrode with metal material such as chrome or the like for the anodic oxidation, and then removing only the metal material such as chrome or the like together with the anodic oxide of the metal material such as chrome or the like, an exposed portion of metal gate (e.g. aluminum) is formed, and an upper wiring is connected to the exposed portion.
    Type: Grant
    Filed: September 26, 1996
    Date of Patent: June 29, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hongyong Zhang, Yasuhiko Takemura
  • Patent number: 5913112
    Abstract: An LDD structure is manufactured to have a desired aspect ratio of the height to the width of a gate electrode. The gate electrode is first deposited on a semiconductor substrate followed by ion implantation with the gate electrode as a mask to form a pair of impurity regions. The gate electrode is then anodic oxidized to form an oxide film enclosing the electrode. With the oxide film as a mask, highly doped regions are formed by ion implantation in order to define lightly doped regions between the highly doped regions and the channel region located therebetween.
    Type: Grant
    Filed: March 11, 1994
    Date of Patent: June 15, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuhiko Takemura, Hongyong Zhang
  • Patent number: 5904509
    Abstract: In a source/drain doping step in manufacturing a field effect transistor, particularly a thin-film transistor (TFT), high-speed boron ions are implanted in a state that an active layer in which to form the source and drain is covered with an insulating film, whereas phosphorus ions are implanted in a state that the surface of the active layer is exposed.
    Type: Grant
    Filed: December 30, 1994
    Date of Patent: May 18, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Hideto Ohnuma, Yasuhiko Takemura
  • Patent number: 5899709
    Abstract: An improved method for manufacturing an insulated gate field effect transistor is described. The method comprises the steps of forming a semiconductor film on an insulating substrate, forming a gate insulating film on said semiconductor film, forming a gate electrode on said gate insulating film with said gate insulating film inbetween, anoding said gate electrode in order to coat an external surface of said gate electrode with an oxide film thereof and applying a negative or positive voltage to said gate electrode with respect to said semiconductor film. Lattice defects and interfacial states caused by the application of a positive voltage during the anoding are effectively eliminated by the negative voltage application.
    Type: Grant
    Filed: April 3, 1996
    Date of Patent: May 4, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hongyong Zhang, Hideki Uochi, Hiroki Adachi, Yasuhiko Takemura
  • Patent number: 5897347
    Abstract: Method of fabricating semiconductor devices such as thin-film transistors by annealing a substantially amorphous silicon film at a temperature either lower than normal crystallization temperature of amorphous silicon or lower than the glass transition point of the substrate so as to crystallize the silicon film. Islands, stripes, lines, or dots of nickel, iron cobalt, or platinum, silicide, acetate, or nitrate of nickel, iron, cobalt, or platinum, film containing various salts, particles, or clusters containing at least one of nickel, iron, cobalt, and platinum are used as starting materials for crystallization. These materials are formed on or under the amorphous silicon film.
    Type: Grant
    Filed: September 24, 1996
    Date of Patent: April 27, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuhiko Takemura, Hongyong Zhang, Toru Takayama, Hideki Uochi
  • Patent number: 5897799
    Abstract: A laser processing apparatus including a laser device for emitting a first laser beam having a first cross section having a length and a width and an optical system for modifying the first laser beam to produce a second laser beam having a virtual focus. The second laser beam has a second cross section of which length is larger than the length of the first cross section and is constant with propagation of the second laser beam. The apparatus further includes a condenser located after the virtual focus for focusing the second laser beam on a specimen to be treated, wherein said second laser beam is condensed in only a widthwise direction of the cross section, and device for moving the specimen along the widthwise direction. Specifically, laser processing apparatus may include a laser device, a vertical fly-eye lens for homogenizing an intensity along a lengthwise direction of the first cross section, a mirror for directing the laser beam and cylindrical convex lens.
    Type: Grant
    Filed: June 11, 1996
    Date of Patent: April 27, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hongyong Zhang, Hiroaki Ishihara
  • Patent number: 5897346
    Abstract: In producing a semiconductor device such as a thin film transistor (TFT), a silicon semiconductor film is formed on a substrate having an insulating surface, such as a glass substrate, and then a silicon nitride film is formed on the silicon semiconductor film. After that, a hydrogen ion, fluorine ion, or chlorine ion is introduced into the silicon semiconductor film through the silicon nitride film, and then the silicon semiconductor film into which an ion is introduced is heated in an atmosphere containing hydrogen, fluorine, chlorine or these mixture, to neutralize dangling bonds in the silicon semiconductor film and reduce levels in the silicon semiconductor film.
    Type: Grant
    Filed: November 27, 1996
    Date of Patent: April 27, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Naoaki Yamaguchi, Hongyong Zhang, Satoshi Teramoto, Hideto Ohnuma
  • Patent number: 5897344
    Abstract: Method of improving making contact with the source/drain regions of thin-film transistors. A substantially triangular insulator determines contacts with the source/drain regions by a self-aligning process. The width of this insulator can be determined without performing mask alignment. Furthermore, the width can be reduced. Therefore, the sheet resistance of the source/drain regions presents no serious problems.
    Type: Grant
    Filed: January 6, 1997
    Date of Patent: April 27, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Teramoto, Hongyong Zhang, Yasuhiko Takemura
  • Patent number: 5895935
    Abstract: A display device having high definition and high reliability, and technology for manufacturing the same. In an active matrix type display device of integrated peripheral driving circuit type, pixel TFTs of an active matrix circuit 100 are not provided with LDD regions. Also, among circuits constituting peripheral driving circuits 101, 102, buffer circuits, of which a high withstand voltage and high-speed operation are required, are made with thin film transistors having floating island regions and base regions between source and drain regions of their active layers.
    Type: Grant
    Filed: April 24, 1997
    Date of Patent: April 20, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hongyong Zhang
  • Patent number: 5895933
    Abstract: A semiconductor device is disclosed. The semiconductor device has a crystalline silicon film as an active layer region. The crystalline silicon film has needle-like or columnar crystals oriented parallel to the substrate and having a crystal growth direction of (111) axis. A method for preparing the semiconductor device comprises steps of adding a catalytic element to an amorphous silicon film; and heating the amorphous silicon film containing the catalytic element at a low temperature to crystallize the silicon film.
    Type: Grant
    Filed: June 3, 1997
    Date of Patent: April 20, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Yasuhiko Takemura, Toru Takayama, Akiharu Miyanaga, Hisashi Ohtani, Junichi Takeyama
  • Patent number: 5894151
    Abstract: An insulated gate semiconductor device comprising an insulator substrate having provided thereon a source and a drain region; a channel region being incorporated between said source and said drain regions, said channel region comprising a polycrystalline, a single crystal, or semi-amorphous semiconductor material; and a region provided under said channel region, said region comprising an amorphous material containing the same material as that of the channel region as the principal component, or said region comprising a material having a band gap larger than said channel region. A process for fabricating the device is also disclosed.
    Type: Grant
    Filed: February 19, 1993
    Date of Patent: April 13, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuhiko Takemura, Hongyong Zhang
  • Patent number: 5888857
    Abstract: A method for manufacturing a semiconductor device such as a thin film transistor using a crystal silicon film is provided. The crystal silicon film is obtained by selectively forming films, particles or clusters containing nickel, iron, cobalt, ruthenium, rhodium, paradium, osmium, iridium, platinum, scandium, titanium, vanadium, chrome, manganese, copper, zinc, gold, silver or silicide thereof in a form of island, line, stripe, dot or film on or under an amorphous silicon film and using them as a starting point, by advancing its crystallization by annealing at a temperature lower than a normal crystallization temperature of an amorphous silicon. A transistor whose leak current is low and a transistor in which a mobility is high are obtained in the same time in structuring a dynamic circuit having a thin film transistor by selectively forming a cover film on a semiconductor layer which is to become an active layer of the transistor and by thermally crystallizing it thereafter.
    Type: Grant
    Filed: June 10, 1996
    Date of Patent: March 30, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Hideki Uochi, Toru Takayama, Takeshi Fukunaga, Yasuhiko Takemura
  • Patent number: 5886364
    Abstract: An electro-optical device such as a liquid crystal device comprises a transparent substrate and a plurality of thin film transistors for driving pixel electrodes. In order to prevent an undesirable influence of light incident on the thin film transistors, a light shielding layer is interposed between the thin film transistors and the transparent substrate. Another portion of the light-shielding layer which corresponds to the pixel electrodes, has been changed to transparent by selectively oxidizing or nitriding the layer.
    Type: Grant
    Filed: July 3, 1997
    Date of Patent: March 23, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hongyong Zhang