Patents by Inventor Hsi-Kuei Cheng

Hsi-Kuei Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240355795
    Abstract: A package on package structure includes a first package, a plurality of conductive bumps, a second package and an underfill. The conductive bumps are disposed on a second surface of the first package and electrically connected to the first package. The second package is disposed on the second surface of the first package through the conductive bumps, and includes a semiconductor device and an encapsulating material encapsulating the semiconductor device. A shortest distance from an upper surface of the encapsulating material to an upper surface of the semiconductor device is greater than or substantially equal to twice a thickness of the semiconductor device. The underfill is filled between the first package and the second package.
    Type: Application
    Filed: May 9, 2024
    Publication date: October 24, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Dong-Han Shen, Chen-Shien Chen, Kuo-Chio Liu, Hsi-Kuei Cheng, Yi-Jen Lai
  • Publication number: 20240266336
    Abstract: An embodiment is a structure including a first package including a first die, and a molding compound at least laterally encapsulating the first die, a second package bonded to the first package with a first set of conductive connectors, the second package comprising a second die, and an underfill between the first package and the second package and surrounding the first set of conductive connectors, the underfill having a first portion extending up along a sidewall of the second package, the first portion having a first sidewall, the first sidewall having a curved portion and a planar portion.
    Type: Application
    Filed: April 17, 2024
    Publication date: August 8, 2024
    Inventors: Hsi-Kuei Cheng, Ching Fu Chang, Chih-Kang Han, Hsin-Chieh Huang
  • Patent number: 12051634
    Abstract: A package includes a die, first conductive structures, second conductive structures, and an encapsulant. The die has a rear surface. The first conductive structures and the second conductive structures surround the die. The first conductive structures include cylindrical columns and the second conductive structures include elliptical columns. At least one of the second conductive structures is closer to the die than the first conductive structures. The encapsulant encapsulates the die, the first conductive structures, and the second conductive structures.
    Type: Grant
    Filed: July 21, 2023
    Date of Patent: July 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Huan Chiu, Chun-Jen Chen, Chen-Shien Chen, Kuo-Chio Liu, Kuo-Hui Chang, Chung-Yi Lin, Hsi-Kuei Cheng, Yi-Jen Lai
  • Patent number: 12046588
    Abstract: A package on package structure includes a first package, a plurality of conductive bumps, a second package and an underfill. The conductive bumps are disposed on a second surface of the first package and electrically connected to the first package. The second package is disposed on the second surface of the first package through the conductive bumps, and includes a semiconductor device and an encapsulating material encapsulating the semiconductor device. A shortest distance from an upper surface of the encapsulating material to an upper surface of the semiconductor device is greater than or substantially equal to twice a thickness of the semiconductor device. The underfill is filled between the first package and the second package.
    Type: Grant
    Filed: February 16, 2022
    Date of Patent: July 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Dong-Han Shen, Chen-Shien Chen, Kuo-Chio Liu, Hsi-Kuei Cheng, Yi-Jen Lai
  • Publication number: 20240222352
    Abstract: A method includes forming a release film over a carrier, forming a polymer buffer layer over the release film, forming a metal post on the polymer buffer layer, encapsulating the metal post in an encapsulating material, performing a planarization on the encapsulating material to expose the metal post, forming a redistribution structure over the encapsulating material and the metal post, and decomposing a first portion of the release film. A second portion of the release film remains after the decomposing. An opening is formed in the polymer buffer layer to expose the metal post.
    Type: Application
    Filed: January 29, 2024
    Publication date: July 4, 2024
    Inventors: Yi-Jen Lai, Chung-Yi Lin, Hsi-Kuei Cheng, Chen-Shien Chen, Kuo-Chio Liu
  • Patent number: 11990454
    Abstract: An embodiment is a structure including a first package including a first die, and a molding compound at least laterally encapsulating the first die, a second package bonded to the first package with a first set of conductive connectors, the second package comprising a second die, and an underfill between the first package and the second package and surrounding the first set of conductive connectors, the underfill having a first portion extending up along a sidewall of the second package, the first portion having a first sidewall, the first sidewall having a curved portion and a planar portion.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: May 21, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsi-Kuei Cheng, Ching Fu Chang, Chih-Kang Han, Hsin-Chieh Huang
  • Patent number: 11984342
    Abstract: A method includes forming a first polymer layer to cover a metal pad of a wafer, and patterning the first polymer layer to form a first opening. A first sidewall of the first polymer layer exposed to the first opening has a first tilt angle where the first sidewall is in contact with the metal pad. The method further includes forming a metal pillar in the first opening, sawing the wafer to generate a device die, encapsulating the device die in an encapsulating material, performing a planarization to reveal the metal pillar, forming a second polymer layer over the encapsulating material and the device die, and patterning the second polymer layer to form a second opening. The metal pillar is exposed through the second opening. A second sidewall of the second polymer layer exposed to the second opening has a second tilt angle greater than the first tilt angle.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsi-Kuei Cheng, Ching Fu Chang, Chih-Kang Han, Hsin-Chieh Huang
  • Patent number: 11948881
    Abstract: A semiconductor structure includes a die, a molding surrounding the die, a first dielectric layer disposed over the die and the molding, and a second dielectric layer disposed between the first dielectric layer and the die, and between the first dielectric layer and the molding. A material content ratio in the first dielectric layer is substantially greater than that in the second dielectric layer. In some embodiments, the material content ratio substantially inversely affects a mechanical strength of the first dielectric layer and the second dielectric layer.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Hsi-Kuei Cheng, Chih-Kang Han, Ching-Fu Chang, Hsin-Chieh Huang
  • Patent number: 11923353
    Abstract: A method includes forming a release film over a carrier, forming a polymer buffer layer over the release film, forming a metal post on the polymer buffer layer, encapsulating the metal post in an encapsulating material, performing a planarization on the encapsulating material to expose the metal post, forming a redistribution structure over the encapsulating material and the metal post, and decomposing a first portion of the release film. A second portion of the release film remains after the decomposing. An opening is formed in the polymer buffer layer to expose the metal post.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Jen Lai, Chung-Yi Lin, Hsi-Kuei Cheng, Chen-Shien Chen, Kuo-Chio Liu
  • Publication number: 20230369152
    Abstract: A package includes a die, first conductive structures, second conductive structures, and an encapsulant. The die has a rear surface. The first conductive structures and the second conductive structures surround the die. The first conductive structures include cylindrical columns and the second conductive structures include elliptical columns. At least one of the second conductive structures is closer to the die than the first conductive structures. The encapsulant encapsulates the die, the first conductive structures, and the second conductive structures.
    Type: Application
    Filed: July 21, 2023
    Publication date: November 16, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Huan Chiu, Chun-Jen Chen, Chen-Shien Chen, Kuo-Chio Liu, Kuo-Hui Chang, Chung-Yi Lin, Hsi-Kuei Cheng, Yi-Jen Lai
  • Publication number: 20230335426
    Abstract: A method includes forming a first polymer layer to cover a metal pad of a wafer, and patterning the first polymer layer to form a first opening. A first sidewall of the first polymer layer exposed to the first opening has a first tilt angle where the first sidewall is in contact with the metal pad. The method further includes forming a metal pillar in the first opening, sawing the wafer to generate a device die, encapsulating the device die in an encapsulating material, performing a planarization to reveal the metal pillar, forming a second polymer layer over the encapsulating material and the device die, and patterning the second polymer layer to form a second opening. The metal pillar is exposed through the second opening. A second sidewall of the second polymer layer exposed to the second opening has a second tilt angle greater than the first tilt angle.
    Type: Application
    Filed: June 16, 2023
    Publication date: October 19, 2023
    Inventors: Hsi-Kuei Cheng, Ching Fu Chang, Chih-Kang Han, Hsin-Chieh Huang
  • Patent number: 11756849
    Abstract: A package includes a die, first conductive structures, second conductive structures, an encapsulant, and a redistribution structure. The die has an active surface and a rear surface opposite to the active surface. The first conductive structures and the second conductive structures surround the die. A shape of the first conductive structures is different a shape of the second conductive structures. The second conductive structures include elliptical columns having straight sidewalls. A distance between the first conductive structure that is closest to the die and the die is greater than a distance between the second conductive structure that is closest to the die and the die. The encapsulant encapsulates the die, the first conductive structures, and the second conductive structures. The redistribution structure is over the die and the encapsulant. The redistribution structure is electrically connected to the die, the first conductive structures, and the second conductive structures.
    Type: Grant
    Filed: June 8, 2022
    Date of Patent: September 12, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Huan Chiu, Chun-Jen Chen, Chen-Shien Chen, Kuo-Chio Liu, Kuo-Hui Chang, Chung-Yi Lin, Hsi-Kuei Cheng, Yi-Jen Lai
  • Publication number: 20220399325
    Abstract: A method includes forming a release film over a carrier, forming a polymer buffer layer over the release film, forming a metal post on the polymer buffer layer, encapsulating the metal post in an encapsulating material, performing a planarization on the encapsulating material to expose the metal post, forming a redistribution structure over the encapsulating material and the metal post, and decomposing a first portion of the release film. A second portion of the release film remains after the decomposing. An opening is formed in the polymer buffer layer to expose the metal post.
    Type: Application
    Filed: July 27, 2022
    Publication date: December 15, 2022
    Inventors: Yi-Jen Lai, Chung-Yi Lin, Hsi-Kuei Cheng, Chen-Shien Chen, Kuo-Chio Liu
  • Publication number: 20220301964
    Abstract: A package includes a die, first conductive structures, second conductive structures, an encapsulant, and a redistribution structure. The die has an active surface and a rear surface opposite to the active surface. The first conductive structures and the second conductive structures surround the die. A shape of the first conductive structures is different a shape of the second conductive structures. The second conductive structures include elliptical columns having straight sidewalls. A distance between the first conductive structure that is closest to the die and the die is greater than a distance between the second conductive structure that is closest to the die and the die. The encapsulant encapsulates the die, the first conductive structures, and the second conductive structures. The redistribution structure is over the die and the encapsulant. The redistribution structure is electrically connected to the die, the first conductive structures, and the second conductive structures.
    Type: Application
    Filed: June 8, 2022
    Publication date: September 22, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Huan Chiu, Chun-Jen Chen, Chen-Shien Chen, Kuo-Chio Liu, Kuo-Hui Chang, Chung-Yi Lin, Hsi-Kuei Cheng, Yi-Jen Lai
  • Patent number: 11437361
    Abstract: A method includes forming a release film over a carrier, forming a polymer buffer layer over the release film, forming a metal post on the polymer buffer layer, encapsulating the metal post in an encapsulating material, performing a planarization on the encapsulating material to expose the metal post, forming a redistribution structure over the encapsulating material and the metal post, and decomposing a first portion of the release film. A second portion of the release film remains after the decomposing. An opening is formed in the polymer buffer layer to expose the metal post.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: September 6, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Jen Lai, Lin Chung-Yi, Hsi-Kuei Cheng, Chen-Shien Chen, Kuo-Chio Liu
  • Patent number: 11404341
    Abstract: A package includes a die, a plurality of conductive structures, an encapsulant, and a redistribution structure. The die has an active surface and a rear surface opposite to the active surface. The conductive structures surround the die. The conductive structures include elliptical columns. The encapsulant encapsulates the die and the conductive structures. The redistribution structure is over the active surface of the die and the encapsulant. The redistribution structure is electrically connected to the die and the conductive structures.
    Type: Grant
    Filed: February 24, 2020
    Date of Patent: August 2, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Huan Chiu, Chun-Jen Chen, Chen-Shien Chen, Kuo-Chio Liu, Kuo-Hui Chang, Chung-Yi Lin, Hsi-Kuei Cheng, Yi-Jen Lai
  • Publication number: 20220173083
    Abstract: A package on package structure includes a first package, a plurality of conductive bumps, a second package and an underfill. The conductive bumps are disposed on a second surface of the first package and electrically connected to the first package. The second package is disposed on the second surface of the first package through the conductive bumps, and includes a semiconductor device and an encapsulating material encapsulating the semiconductor device. A shortest distance from an upper surface of the encapsulating material to an upper surface of the semiconductor device is greater than or substantially equal to twice a thickness of the semiconductor device. The underfill is filled between the first package and the second package.
    Type: Application
    Filed: February 16, 2022
    Publication date: June 2, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Dong-Han Shen, Chen-Shien Chen, Kuo-Chio Liu, Hsi-Kuei Cheng, Yi-Jen Lai
  • Patent number: 11257797
    Abstract: A package on package structure includes a first package, a plurality of conductive bumps, a second package and an underfill. The conductive bumps are disposed on a second surface of the first package and electrically connected to the first package. The second package is disposed on the second surface of the first package through the conductive bumps, and includes a semiconductor device and an encapsulating material encapsulating the semiconductor device. A shortest distance from an upper surface of the encapsulating material to an upper surface of the semiconductor device is greater than or substantially equal to twice a thickness of the semiconductor device. The underfill is filled between the first package and the second package.
    Type: Grant
    Filed: November 20, 2019
    Date of Patent: February 22, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Dong-Han Shen, Chen-Shien Chen, Kuo-Chio Liu, Hsi-Kuei Cheng, Yi-Jen Lai
  • Patent number: 11217548
    Abstract: A semiconductor device structure and a manufacturing method are provided. The semiconductor device structure includes a semiconductor substrate and a dielectric layer over the semiconductor substrate. The semiconductor device structure also includes a conductive trace over the dielectric layer. The semiconductor device structure further includes a conductive feature over the conductive trace, and a width of the conductive feature is substantially equal to or larger than a maximum width of the conductive trace. In addition, the semiconductor device structure includes a conductive bump over the conductive feature.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: January 4, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Li-Guo Lee, Yung-Sheng Liu, Yi-Chen Liu, Yi-Jen Lai, Chun-Jen Chen, Hsi-Kuei Cheng
  • Publication number: 20210335708
    Abstract: A semiconductor structure includes a die, a molding surrounding the die, a first dielectric layer disposed over the die and the molding, and a second dielectric layer disposed between the first dielectric layer and the die, and between the first dielectric layer and the molding. A material content ratio in the first dielectric layer is substantially greater than that in the second dielectric layer. In some embodiments, the material content ratio substantially inversely affects a mechanical strength of the first dielectric layer and the second dielectric layer.
    Type: Application
    Filed: July 8, 2021
    Publication date: October 28, 2021
    Inventors: HSI-KUEI CHENG, CHIH-KANG HAN, CHING-FU CHANG, HSIN-CHIEH HUANG