Patents by Inventor Hsien-Min Chang

Hsien-Min Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9230895
    Abstract: A package substrate includes: a dielectric layer having two opposite surfaces; a wiring layer embedded in the dielectric layer and exposed from the two opposite surfaces of the dielectric layer, wherein the wiring layer has solder pads, conductive pads and circuit wires electrically connecting the solder pads and the conductive pads; and a first insulating protection layer disposed on one of the two opposite surfaces of the dielectric layer to cover the dielectric layer and the wiring layer and having a plurality of openings for exposing the conductive pads, respectively. The package substrate, by directly using the dielectric layer as a base, provides a package substrate having reduced thickness and lower fabrication costs compared to the prior art.
    Type: Grant
    Filed: July 27, 2011
    Date of Patent: January 5, 2016
    Assignee: Unimicron Technology Corporation
    Inventors: Pao-Hung Chou, Hsien-Min Chang
  • Publication number: 20120097430
    Abstract: A packaging substrate and a method of fabricating the packaging substrate. The packaging substrate includes: a dielectric layer that has an external contact surface and an opposing chip mounting surface; a circuit layer that is embedded in the dielectric layer and exposed from the external contact surface and the chip mounting surface, the circuit layer having wire-bonding pads, conductive pads, and a circuit that electrically connects the wire-bonding pads and the conductive pads, wherein the widths of the wire-bonding pads, conductive pads, and the circuit narrow gradually from chip mounting surface to the external contact surface; and a first insulating protective layer disposed on the external contact surface of the dielectric layer and covering the dielectric layer and the circuit layer, a plurality of conductive pad openings being formed in the first insulating protective layer for exposing the conductive pads.
    Type: Application
    Filed: September 23, 2011
    Publication date: April 26, 2012
    Applicant: UNIMICRON TECHNOLOGY CORPORATION
    Inventors: Pao-Hung Chou, Hsien-Min Chang
  • Publication number: 20120097429
    Abstract: A package substrate includes: a dielectric layer having two opposite surfaces; a wiring layer embedded in the dielectric layer and exposed from the two opposite surfaces of the dielectric layer, wherein the wiring layer has solder pads, conductive pads and circuit wires electrically connecting the solder pads and the conductive pads; and a first insulating protection layer disposed on one of the two opposite surfaces of the dielectric layer to cover the dielectric layer and the wiring layer and having a plurality of openings for exposing the conductive pads, respectively. The package substrate, by directly using the dielectric layer as a base, provides a package substrate having reduced thickness and lower fabrication costs compared to the prior art.
    Type: Application
    Filed: July 27, 2011
    Publication date: April 26, 2012
    Applicant: UNIMICRON TECHNOLOGY CORPORATION
    Inventors: Pao-Hung Chou, Hsien-Min Chang