Patents by Inventor Hsin-Che Huang

Hsin-Che Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11459354
    Abstract: The present invention provides improved processes for purifying liraglutide. Liraglutide is purified via two sequential RP-HPLC purifications followed by a salt-exchange step, where a pH is kept constant in the first and second purification steps. In particular, the processes utilize a halogenated solvent in a sample preparation step, which provides better solubility and an environment suitable for decarboxylation for crude liraglutide prior to a RP-HPLC purification.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: October 4, 2022
    Assignee: ScinoPharm Taiwan, Ltd.
    Inventors: Ming-Chih Wu, Hsin-Che Huang, Tsung-Yu Hsiao
  • Publication number: 20200308218
    Abstract: The present invention provides improved processes for purifying liraglutide. Liraglutide is purified via two sequential RP-HPLC purifications followed by a salt-exchange step, where a pH is kept constant in the first and second purification steps. In particular, the processes utilize a halogenated solvent in a sample preparation step, which provides better solubility and an environment suitable for decarboxylation for crude liraglutide prior to a RP-HPLC purification.
    Type: Application
    Filed: March 25, 2020
    Publication date: October 1, 2020
    Inventors: Ming-Chih WU, Hsin-Che HUANG, Tsung-Yu HSIAO
  • Patent number: 10475925
    Abstract: A method for forming a complementary metal oxide semiconductor device is disclosed. First, a substrate having a first device region and a second device region is provided. A first trench is formed in the first device region and filled with a first material. A second trench is formed in the second device region and filled with a second material. The first material and the second material comprise different stresses. After that, a first gate structure and a second gate structure are formed on the first material and the second material and completely covering the first trench and the second trench, respectively.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: November 12, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wei-Lun Hsu, Hsin-Che Huang, Shyan-Liang Chou, Hung-Lin Shih
  • Publication number: 20180277679
    Abstract: A method for forming a complementary metal oxide semiconductor device is disclosed. First, a substrate having a first device region and a second device region is provided. A first trench is formed in the first device region and filled with a first material. A second trench is formed in the second device region and filled with a second material. The first material and the second material comprise different stresses. After that, a first gate structure and a second gate structure are formed on the first material and the second material and completely covering the first trench and the second trench, respectively.
    Type: Application
    Filed: May 21, 2018
    Publication date: September 27, 2018
    Inventors: Wei-Lun Hsu, Hsin-Che Huang, Shyan-Liang Chou, Hung-Lin Shih
  • Publication number: 20180183014
    Abstract: A mask is designed for patterning organic light emitting material on a surface. The mask includes a substrate having a first surface and a second surface opposite to the first surface. The mask further includes a plurality of holes extended though the substrate with a pitch not greater than 150 um, and each hole having a first exit at the first surface and a second surface at the second surface. At least one of the plurality of holes has a smallest dimension being not greater than about 15 um.
    Type: Application
    Filed: September 14, 2017
    Publication date: June 28, 2018
    Inventors: PING-I SHIH, YU-HUNG CHEN, HSIN-CHE HUANG, CHIEN-YU CHEN
  • Patent number: 10008599
    Abstract: A complementary metal oxide semiconductor (CMOS) device is disclosed. The CMOS device includes a substrate with a first device region and a second device region formed thereon. A first isolation structure is formed in the first device region, and includes a first trench filled with a first material. A second isolation structure is formed in the second device region and includes a second trench filled with a second material. The first material and the second material have different stresses. A first gate structure is disposed atop the first material and completely covering the first trench. A second gate structure is disposed atop the second material and completely covering the second trench.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: June 26, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wei-Lun Hsu, Hsin-Che Huang, Shyan-Liang Chou, Hung-Lin Shih