Patents by Inventor Hsin-Chih Chen

Hsin-Chih Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210281164
    Abstract: A method for operating a power factor correction (PFC) circuit of an uninterruptible power supply (UPS) apparatus is provided. The PFC circuit includes two T-type converters, and each of the T-type converters includes four switching tubes. The method includes: converting AC input voltage into a positive bus voltage across a first capacitor and a negative bus voltage across a second capacitor that is connected in series with the first capacitor when the UPS apparatus is operated under a normal supply mode; and controlling conduction states of the switching tubes of the T-type converters to balance the positive bus voltage and the negative bus voltage when the UPS apparatus is operated under a battery supply mode.
    Type: Application
    Filed: December 23, 2020
    Publication date: September 9, 2021
    Inventors: Yuan-Fang LAI, Hung-Chieh LIN, Chao-Li KAO, Chao-Lung KUO, Hsin-Chih CHEN, Yi-Ping HSIEH
  • Publication number: 20210257497
    Abstract: A semiconductor device includes a semiconductor substrate, at least one semiconductor fin and a gate stack. The semiconductor fin is disposed on the semiconductor substrate. The semiconductor fin includes a first portion, a second portion and a first neck portion between the first portion and the second portion. A width of the first portion decreases as the first portion becomes closer to the first neck portion, and a width of the second portion increases as the second portion becomes closer to a bottom surface of the semiconductor substrate. The gate stack partially covers the semiconductor fin.
    Type: Application
    Filed: September 14, 2020
    Publication date: August 19, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiun-Ming Kuo, Hsin-Chih Chen, Che-Yuan Hsu, Kuo-Chin Liu, Han-Yu Tsai, You-Ting Lin, Jen-Hong Chang
  • Publication number: 20210166947
    Abstract: A method of manufacturing a semiconductor device includes depositing a first material on a substrate, depositing on the substrate a second material that has an etch selectivity different from an etch selectively of the first material, depositing a spacer material on the first and second material, and etching the substrate using the spacer material as an etch mask to form a fin under the first material and a fin under the second material.
    Type: Application
    Filed: February 9, 2021
    Publication date: June 3, 2021
    Inventors: Lei-Chun Chou, Chih-Liang Chen, Chih-Ming Lai, Charles Chew-Yuen Young, Chin-Yuan Tseng, Hsin-Chih Chen, Shi Ning Ju, Jiann-Tyng Tzeng, Kam-Tou Sio, Ru-Gun Liu, Wei-Cheng Lin, Wei-Liang Lin
  • Patent number: 10957551
    Abstract: Methods are disclosed herein for patterning integrated circuit devices, such as fin-like field effect transistor devices. An exemplary method includes forming a material layer that includes an array of fin features, and performing a fin cut process to remove a subset of the fin features. The fin cut process includes exposing the subset of fin features using a cut pattern and removing the exposed subset of the fin features. The cut pattern partially exposes at least one fin feature of the subset of fin features. In implementations where the fin cut process is a fin cut first process, the material layer is a mandrel layer and the fin features are mandrels. In implementations where the fin cut process is a fin cut last process, the material layer is a substrate (or material layer thereof), and the fin features are fins defined in the substrate (or material layer thereof).
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: March 23, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chin-Yuan Tseng, Wei-Liang Lin, Hsin-Chih Chen, Shi Ning Ju, Ken-Hsien Hsieh, Yung-Sung Yen, Ru-Gun Liu
  • Patent number: 10950456
    Abstract: A method of manufacturing a semiconductor device includes depositing a first material on a substrate, depositing on the substrate a second material that has an etch selectivity different from an etch selectively of the first material, depositing a spacer material on the first and second material, and etching the substrate using the spacer material as an etch mask to form a fin under the first material and a fin under the second material.
    Type: Grant
    Filed: October 14, 2019
    Date of Patent: March 16, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Lei-Chun Chou, Chih-Liang Chen, Chih-Ming Lai, Charles Chew-Yuen Young, Chin-Yuan Tseng, Hsin-Chih Chen, Shi Ning Ju, Jiann-Tyng Tzeng, Kam-Tou Sio, Ru-Gun Liu, Wei-Cheng Lin, Wei-Liang Lin
  • Patent number: 10931063
    Abstract: A high-speed connector assembly, a socket connector and a grounding plate are disclosed in the present invention. The grounding plate disposes multiple grounding arms and multiple shielding pieces, which are arranged in a serpentine pattern for surrounding front mating portions of each pair of differential signal socket terminals to be in a U-shaped state, thereby providing electromagnetic shielding. The grounding plate further disposes multiple spring fingers, which can be used to connect adjacent grounding plates for forming a common grounding path, and further reducing signal crosstalk of adjacent differential pairs. The grounding plate of the present invention can further contact with a corresponding shielding shell of a plug connector to form a complete grounding path, and ensure more stable and reliable signal transmission quality.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: February 23, 2021
    Assignee: OUPIIN ELECTRONIC (KUNSHAN) CO., LTD.
    Inventor: Hsin-Chih Chen
  • Patent number: 10932359
    Abstract: A circuit board and an electrical connector with the same are disclosed in the present invention. The circuit board includes a first line layer, a first insulating layer, a second line layer, an insulating substrate, a third line layer, a second insulating layer and a fourth line layer, which are stacked from top to bottom. A first metal line and a second metal line are formed on the first line layer and the second line layer, respectively, and together constitute a first differential line pair. A third metal line and a fourth metal line are formed on the third line layer and the fourth line layer, respectively, and together constitute a second differential line pair. Two metal lines constituting each differential line pair are arranged up and down and have different widths, thereby reducing signal crosstalk between adjacent differential line pairs.
    Type: Grant
    Filed: October 13, 2019
    Date of Patent: February 23, 2021
    Assignee: OUPIIN ELECTRONIC (KUNSHAN) CO., LTD.
    Inventor: Hsin Chih Chen
  • Patent number: 10790606
    Abstract: A plug connector for easy locking and unlocking is disclosed, including a base, a signal transmission module, a lock head, a cover and a pull strip. The plug connector of the present invention employs a holding-down structure of the pull strip, which can drive an edge block of the lock head to go down and further force the lock head to go down by pulling the pull strip backward. When releasing the pull strip, the lock head can automatically go up. Therefore, in the present invention, the pull strip can control the lock head, thereby completing the locking and unlocking work. The locking and unlocking way of the present invention is safe, effective and convenient.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: September 29, 2020
    Assignee: OUPIIN ELECTRONIC (KUNSHAN) CO., LTD.
    Inventor: Hsin Chih Chen
  • Publication number: 20200212217
    Abstract: A semiconductor structure includes an isolation feature formed in the semiconductor substrate and a first fin-type active region. The first fin-type active region extends in a first direction. A dummy gate stack is disposed on an end region of the first fin-type active region. The dummy gate stack may overlie an isolation structure. In an embodiment, any recess such as formed for a source/drain region in the first fin-type active region will be displaced from the isolation region by the distance the dummy gate stack overlaps the first fin-type active region.
    Type: Application
    Filed: December 24, 2019
    Publication date: July 2, 2020
    Inventors: Shao-Ming YU, Chang-Yun CHANG, Chih-Hao CHANG, Hsin-Chih CHEN, Kai-Tai CHANG, Ming-Feng SHIEH, Kuei-Liang LU, Yi-Tang LIN
  • Patent number: 10700474
    Abstract: A plug connector having unlocking function is disclosed in the present invention. The plug connector includes a base, a signal transmission module, a lock head, a cover and an unlocking device. The lock head has two symmetrical edge protrusions, each of which has an upward inclined surface. The unlocking device includes a sliding member being slidably mounted on the cover and being connected with the lock head, and a pull strip being connected with the sliding member. A connection mouth of the sliding member has two downward inclined surfaces. A free end of the lock head is embedded into the connection mouth, and the upward inclined surface is pressed against the corresponding downward inclined surface. When pulling the pull strip backward, the sliding member moves backward, and the downward inclined surface can push the edge protrusion to move downward and drive the lock head to go down for unlocking.
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: June 30, 2020
    Assignee: OUPIIN ELECTRONIC (KUNSHAN) CO., LTD.
    Inventor: Hsin Chih Chen
  • Publication number: 20200194941
    Abstract: A high-speed connector assembly, a socket connector and a grounding plate are disclosed in the present invention. The grounding plate disposes multiple grounding arms and multiple shielding pieces, which are arranged in a serpentine pattern for surrounding front mating portions of each pair of differential signal socket terminals to be in a U-shaped state, thereby providing electromagnetic shielding. The grounding plate further disposes multiple spring fingers, which can be used to connect adjacent grounding plates for forming a common grounding path, and further reducing signal crosstalk of adjacent differential pairs. The grounding plate of the present invention can further contact with a corresponding shielding shell of a plug connector to form a complete grounding path, and ensure more stable and reliable signal transmission quality.
    Type: Application
    Filed: December 11, 2019
    Publication date: June 18, 2020
    Inventor: HSIN-CHIH CHEN
  • Publication number: 20200176915
    Abstract: A plug connector for easy locking and unlocking is disclosed, including a base, a signal transmission module, a lock head, a cover and a pull strip. The plug connector of the present invention employs a holding-down structure of the pull strip, which can drive an edge block of the lock head to go down and further force the lock head to go down by pulling the pull strip backward. When releasing the pull strip, the lock head can automatically go up. Therefore, in the present invention, the pull strip can control the lock head, thereby completing the locking and unlocking work. The locking and unlocking way of the present invention is safe, effective and convenient.
    Type: Application
    Filed: December 2, 2019
    Publication date: June 4, 2020
    Inventor: HSIN CHIH CHEN
  • Publication number: 20200128660
    Abstract: A circuit board and an electrical connector with the same are disclosed in the present invention. The circuit board includes a first line layer, a first insulating layer, a second line layer, an insulating substrate, a third line layer, a second insulating layer and a fourth line layer, which are stacked from top to bottom. A first metal line and a second metal line are formed on the first line layer and the second line layer, respectively, and together constitute a first differential line pair. A third metal line and a fourth metal line are formed on the third line layer and the fourth line layer, respectively, and together constitute a second differential line pair. Two metal lines constituting each differential line pair are arranged up and down and have different widths, thereby reducing signal crosstalk between adjacent differential line pairs.
    Type: Application
    Filed: October 13, 2019
    Publication date: April 23, 2020
    Inventor: HSIN CHIH CHEN
  • Patent number: 10573751
    Abstract: A semiconductor structure includes an isolation feature formed in the semiconductor substrate and a first fin-type active region. The first fin-type active region extends in a first direction. A dummy gate stack is disposed on an end region of the first fin-type active region. The dummy gate stack may overlie an isolation structure. In an embodiment, any recess such as formed for a source/drain region in the first fin-type active region will be displaced from the isolation region by the distance the dummy gate stack overlaps the first fin-type active region.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: February 25, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shao-Ming Yu, Chang-Yun Chang, Chih-Hao Chang, Hsin-Chih Chen, Kai-Tai Chang, Ming-Feng Shieh, Kuei-Liang Lu, Yi-Tang Lin
  • Publication number: 20200059042
    Abstract: A plug connector having unlocking function is disclosed in the present invention. The plug connector includes a base, a signal transmission module, a lock head, a cover and an unlocking device. The lock head has two symmetrical edge protrusions, each of which has an upward inclined surface. The unlocking device includes a sliding member being slidably mounted on the cover and being connected with the lock head, and a pull strip being connected with the sliding member. A connection mouth of the sliding member has two downward inclined surfaces. A free end of the lock head is embedded into the connection mouth, and the upward inclined surface is pressed against the corresponding downward inclined surface. When pulling the pull strip backward, the sliding member moves backward, and the downward inclined surface can push the edge protrusion to move downward and drive the lock head to go down for unlocking.
    Type: Application
    Filed: August 14, 2019
    Publication date: February 20, 2020
    Inventor: HSIN CHIH CHEN
  • Publication number: 20200043741
    Abstract: A method of manufacturing a semiconductor device includes depositing a first material on a substrate, depositing on the substrate a second material that has an etch selectivity different from an etch selectively of the first material, depositing a spacer material on the first and second material, and etching the substrate using the spacer material as an etch mask to form a fin under the first material and a fin under the second material.
    Type: Application
    Filed: October 14, 2019
    Publication date: February 6, 2020
    Inventors: Lei-Chun Chou, Chih-Liang Chen, Chih-Ming Lai, Charles Chew-Yuen Young, Chin-Yuan Tseng, Hsin-Chih Chen, Shi Ning Ju, Jiann-Tyng Tzeng, Kam-Tou Sio, Ru-Gun Liu, Wei-Cheng Lin, Wei-Liang Lin
  • Patent number: D875688
    Type: Grant
    Filed: December 31, 2018
    Date of Patent: February 18, 2020
    Assignee: OUPIIN ELECTRONIC (KUNSHAN) CO., LTD.
    Inventor: Hsin Chih Chen
  • Patent number: D883936
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: May 12, 2020
    Assignee: OUPIIN ELECTRONIC (KUNSHAN) CO., LTD
    Inventor: Hsin Chih Chen
  • Patent number: D887999
    Type: Grant
    Filed: April 11, 2019
    Date of Patent: June 23, 2020
    Assignee: OUPIIN ELECTRONIC (KUNSHAN) CO., LTD
    Inventor: Hsin Chih Chen
  • Patent number: D888674
    Type: Grant
    Filed: April 11, 2019
    Date of Patent: June 30, 2020
    Assignee: OUPIIN ELECTRONIC (KUNSHAN) CO., LTD.
    Inventor: Hsin Chih Chen