Abstract: A connection module capable of integrating electronic control contains: a male connection assembly, a female connection assembly, and a controlling portion. The male connection assembly includes a coupling section, at least one current transmission set, at least one signal transmission set, and at least one engagement portion. The female connection assembly includes a coupling section, at least one current transmission set, at least one signal transmission set, and at least one engagement portion. The controlling portion is connected with the drive mechanism of the male connection assembly to actuate, control and detect the drive mechanism. The male connection assembly is located below the female connection assembly, and the coupling section of the female connection assembly is covered in the coupling section of the male connection assembly. The signal transmission set of the male connection assembly contacts with the signal transmission set of the female connection assembly.

Abstract: An optical system is provided and includes a first optical element driving mechanism, which includes a first fixed assembly, a first movable assembly, and a first driving assembly. The first movable assembly is configured to be connected to a first optical element, and the first movable assembly is movable relative to the first fixed assembly. The first movable assembly includes a first movable element and a second movable element. The first driving assembly is configured to drive the first movable assembly to move relative to the first fixed assembly. The first fixed assembly and the first movable assembly are arranged along a main axis, and the first driving assembly is configured to drive the second movable element to move along a first axis, thereby driving the first movable element to move around the main axis.

Abstract: A resin composition is provided. The resin composition comprises: (A) a compound having a structure of formula (I); and (B) a component having ethylenically unsaturated double bond(s), which is selected from the group consisting of a compound having a structure of formula (II), a compound having a structure of formula (III), and combinations thereof, wherein Z, A, R, X, Y, m, and n are as defined in the specification.

Abstract: A non-volatile memory device includes at least one memory cell, and the memory cell includes a substrate, a select gate, a control gate, an erase gate, and a floating gate. The select gate is disposed on the substrate. The control gate is disposed on the substrate and laterally spaced apart from the select gate. The erase gate is disposed on the substrate and laterally spaced apart from the control gate, and the erase gate includes a concave corner. The floating gate is covered with the control gate and the erase gate. The floating gate includes a convex corner which faces the concave corner of the erase gate, and the vertex of the floating gate is lower than a top surface of the select gate.

Abstract: A non-volatile memory device includes at least one memory cell, and the memory cell includes a substrate, a trench, an erase gate, a control gate, and a floating gate. The trench is disposed in the substrate. The erase gate is disposed in the trench and includes a concave corner. The control gate is disposed on the substrate, and a bottom surface of the control gate is higher than a bottom surface of the erase gate. The floating gate is disposed on the substrate, and the floating gate includes a lower tip pointing toward the concave corner of the erase gate and extending beyond a sidewall of the trench.

Abstract: A method of manufacturing a non-volatile memory includes the following steps. A stacked structure is formed on a substrate and includes a gate dielectric layer, an assist gate, an insulation layer, and a sacrificial layer stacked in order. A tunneling dielectric layer is formed at one side of the stacked structure. A floating gate is formed on the tunneling dielectric layer. The stacked structure is etched until an uppermost edge of the floating gate is higher than a top surface of the insulation layer. A dielectric material layer is formed to cover sidewalls of the floating gate. The dielectric material layer is etched to form an etched dielectric material layer and expose the uppermost edge of the floating gate. An upper gate structure is formed on the etched dielectric material layer, where a portion of the etched dielectric material layer is disposed between the upper gate structure and the substrate.

Abstract: A non-volatile memory device includes at least one memory cell, and the at least one memory cell includes a substrate, a stacked structure, a tunneling dielectric layer, a floating gate, a control gate structure, and an erase gate structure. The stacked structure is disposed on the substrate, and includes a gate dielectric layer, an assist gate, and an insulation layer stacked in order. The tunneling dielectric layer is disposed on the substrate at one side of the stacked structure. The floating gate is disposed on the tunneling dielectric layer and includes an uppermost edge and a curved sidewall. The control gate structure covers the curved sidewall of the floating gate. The erase gate structure covers the floating gate and the control gate structure, and the uppermost edge of the floating gate is embedded in the erase gate structure.

Abstract: An electrically controlled panel including a first electrically controlled device including first and second alignment layers and a first liquid-crystal layer disposed therebetween, a first polarizing layer, and a first compensation film disposed at a side of the first polarizing layer provided with the first electrically controlled device is provided. The first and second alignment layers have first and second alignment directions respectively. An included angle between the first and second alignment directions is between 75 degrees and 105 degrees. A phase retardation of the first liquid-crystal layer is between 400 nm and 600 nm or between 800 nm and 1200 nm. The first polarizing layer is disposed at a side of the first alignment layer away from the first liquid-crystal layer, and has a first absorption axis parallel to or perpendicular to the first alignment direction. A display apparatus adopting the electrically controlled panel is also provided.

Abstract: A fan noise control method includes being activated by a power-on signal to perform: controlling a rotation speed of a fan not to be greater than a first predetermined rotation speed, obtaining a power consumption of a computing device, obtaining a first temperature, wherein the first temperature is a temperature of the computing device, obtaining a second temperature, wherein the second temperature is not the temperature of the computing device, and switching from controlling the rotation speed of the fan not to be greater than the first predetermined rotation speed to controlling the rotation speed of the fan according to the first temperature when the power consumption of the computing device is greater than a first predetermined power consumption, or the second temperature is greater than a predetermined temperature.

Abstract: A head mounted display is provided. The head mounted display includes a first display module, a second display module, an adjustment mechanism, a first frame temple and a second frame temple. The adjustment mechanism is connected to the first display module and the second display module, wherein the adjustment mechanism is adapted to move the first display module and the second display module. The first frame temple is connected to the adjustment mechanism, wherein the first frame temple is adapted to move the adjustment mechanism. The second frame temple is connected to the adjustment mechanism, wherein the second frame temple is adapted to move the adjustment mechanism, the first frame temple and the second frame temple are adapted to rotate between a first posture and a second posture.

Abstract: A non-volatile memory device includes at least one memory cell, and the at least one memory cell includes a substrate, a stacked structure, a tunneling dielectric layer, a floating gate, a control gate structure, and an erase gate structure. The stacked structure is disposed on the substrate, and includes a gate dielectric layer, an assist gate, and an insulation layer stacked in order. The tunneling dielectric layer is disposed on the substrate at one side of the stacked structure. The floating gate is disposed on the tunneling dielectric layer and includes an uppermost edge and a curved sidewall. The control gate structure covers the curved sidewall of the floating gate. The erase gate structure covers the floating gate and the control gate structure, and the uppermost edge of the floating gate is embedded in the erase gate structure.

Abstract: A charging system includes a primary power source, a power source controller coupled to the primary power source, a first switch, a third switch, and a first port. The power source controller includes an auxiliary power source, a first auxiliary power terminal coupled to the auxiliary power source for providing a first detection current, and a load detection circuit. The power source controller initially sets the first switch to be off, the third switch to be on, and the first auxiliary power terminal to provide the first detection current to the first port through the third switch. When the first detection current is less than a threshold value, the power source controller maintains the first switch to be off, the third switch to be on, and the first auxiliary power terminal to provide the first detection current through the third switch.

Abstract: A common cathode electrode structure for vertical LED pixel package, includes a package carrier, vertical LED chips, a conductive column, an insulating isolation support, and a common cathode metal thin film layer. The vertical LED chips are arranged above package carrier, the package carrier includes anodes and a common cathode penetrating therethrough to be external connection point. The anodes are respectively corresponded and electrically connected to P electrodes of the vertical LED chips, and the conductive column is electrically connected to common cathode and N electrodes of vertical LED chips. The common cathode metal thin-film layer is formed on vertical LED chips, conductive column and insulating isolation support to electrically conduct the conductive column and the N electrodes. The anodes and common cathode are in the same plane, which can meet the requirements for embodying SMT for small-spacing LED display module.

Abstract: An LED package structure includes three LED dies and a black sealant layer. Each of the LED dies is provided with a bottom surface, a top surface, and a peripheral wall. The bottom surface and the top surface are opposite to each other, and the peripheral wall is connected to the top surface and the bottom surface. The black sealant layer is coated among the three LED dies and coats the peripheral wall of each of the LED dies. The black sealant layer is provided with a joint surface. The joint surface is coplanar with the bottom surface of each of the LED dies. The black sealant layer does not cover the top surface of each of the LED dies. Also provided is an LED display apparatus which has a better visual taste.

Abstract: A light emitting panel includes a circuit substrate, a plurality of first light emitting components, a plurality of second light emitting components, and a plurality of third light emitting components. The circuit substrate has a plurality of main pixel areas. Each main pixel area is divided into a first subpixel area, a second subpixel area, and a third subpixel area. The first light emitting components, the second light emitting components and the third light emitting components are located in the first subpixel areas, the second subpixel areas and the third subpixel areas respectively. The first light emitting components in two adjacent first subpixel areas are electrically connected in series. The size of each of the first light emitting components is larger than the size of each of the second light emitting components and the third light emitting components.

Abstract: An optical driving mechanism is provided, including a movable portion, a fixed portion, a driving component and a first stopper component. The movable portion is configured to connect an optical element. The movable portion is movable relative to the fixed portion. The driving component is configured to drive the movable portion to move relative to the fixed portion. The first stopper component is configured to limit the range of movement of the movable portion relative to the fixed portion.

Abstract: Methods, systems and devices for PFAS destruction including oxidatively pretreating an aqueous foam fractionate solution including PFAS to form a pretreated solution by mixing the aqueous foam fractionate solution with a persulfate and an acid or a base to increase or decrease the pH and oxidizing the aqueous foam fractionate solution and then subjecting the pretreated solution to UV photolysis, such as by directing UV light onto the pretreated aqueous foam fractionate solution at 222 nm, 254 nm and/or 185 nm. Oxidizing the foam fraction may include subjecting the aqueous foam fractionate solution to an increased temperature and pressure for a period of time sufficient for thermal oxidation or subjecting the aqueous foam fractionate solution to ozone oxidation.

Abstract: Disclosed is a viewing angle control film including a transparent substrate and a plurality of first optical microstructures. The first optical microstructures are disposed on a surface of the transparent substrate, and a disposed range thereof has a geometric center. Each of the first optical microstructures has a first refracting surface away from the geometric center. First refracting angles included between the respective first refracting surfaces of the first optical microstructures and the surface of the transparent substrate are asymmetrically distributed with respect to the geometric center. A display apparatus adopting the viewing angle control film is also provided.

Abstract: An image capturing device includes an optical zoom lens module, a processing module, and a motion sensing module. The optical zoom lens module captures an image corresponding to a first field of view according to a preset parameter. An auto-framing unit of the processing module defines a second field of view according to the position of a main object in the image corresponding to the first field of view, and the second field of view is smaller than the first field of view. The processing module controls the optical zoom lens module to capture images corresponding to the second field of view. When the motion sensing module detects that a suspected object enters the first field of view, it transmits a switching signal to the processing module, which controls the optical zoom lens module to capture the image corresponding to the first field of view.

Abstract: Disclosed is a small-size vertical-type light emitting diode chip with high luminous in a central region. A PN junction structure is arranged on a light emitting region base of an interface structure, the interface structure is provided with a P-type Ohmic contact area at the light emitting region base, a central area of the PN junction structure is above the P-type Ohmic contact area, an insulating layer is formed on an extending platform adjacent to the light emitting region base and extends to cover an N-type semiconductor of the PN junction structure to form a border covering region surrounding the N-type semiconductor, an N-type Ohmic contact electrode covers the border covering region, and an N-type electrode pad is arranged on the insulating layer and electrically connected with the N-type Ohmic contact electrode via a bridging connected metal layer.