Patents by Inventor Hsin-Hung Liao

Hsin-Hung Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170110403
    Abstract: A package structure includes a spiral coil, a redistribution layer (RDL) and a molding material. The molding material fills gaps of the spiral coil. The spiral coil is connected to the RDL. A fan-out package structure includes a spiral coil, an RDL and a die. The spiral coil has a depth-to-width ratio greater than about 2. The RDL is connected to the spiral coil. The die is coupled to the spiral coil through the RDL. A semiconductor packaging method includes: providing a carrier; adhering a spiral coil on the carrier; adhering a die on the carrier; dispensing a molding material on the carrier to fill gaps between the spiral coil and the die; and disposing a redistribution layer (RDL) over the carrier so as to connect the spiral coil with the die.
    Type: Application
    Filed: October 14, 2015
    Publication date: April 20, 2017
    Inventors: CHIEN LING HWANG, HSIN-HUNG LIAO, YU-TING CHIU
  • Publication number: 20170032980
    Abstract: A method includes placing a plurality of dummy dies over a carrier, placing a plurality of device dies over the carrier, molding the plurality of dummy dies and the plurality of device dies in a molding compound, forming redistribution line over and electrically coupled to the device dies, and performing a die-saw to separate the device dies and the molding compound into a plurality of packages.
    Type: Application
    Filed: October 11, 2016
    Publication date: February 2, 2017
    Inventors: Chien Ling Hwang, Bor-Ping Jang, Hsin-Hung Liao, Yeong-Jyh Lin, Hsiao-Chung Liang, Chung-Shi Liu
  • Patent number: 9498851
    Abstract: An apparatus used for forming stud bumps may be formed by providing a first clamp plate comprising a clamping surface, forming a notcher on the clamping surface, and forming a contact stopper on the clamping surface. The apparatus may include a clamp that includes at least two opposing plates, and at least one of the opposing plates includes a protruding feature that intersects the wire when the wire is clamped forming a first notch in the wire. The method for forming stud bumps includes bonding wire to a bonding surface, releasing the wire from the clamp, passing the wire a notch pitch distance through the clamp, clamping the wire with the clamp forming a second notch in the wire, and breaking the wire leaving a bonded portion of the wire on the bonding surface.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: November 22, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yeong-Jyh Lin, Hsin-Hung Liao, Chien Ling Hwang, Yi-Li Hsiao, Chung-Shi Liu, Mirng-Ji Lii, Chen-Hua Yu
  • Patent number: 9484226
    Abstract: A method includes placing a plurality of dummy dies over a carrier, placing a plurality of device dies over the carrier, molding the plurality of dummy dies and the plurality of device dies in a molding compound, forming redistribution line over and electrically coupled to the device dies, and performing a die-saw to separate the device dies and the molding compound into a plurality of packages.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: November 1, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien Ling Hwang, Bor-Ping Jang, Hsin-Hung Liao, Yeong-Jyh Lin, Hsiao-Chung Liang, Chung-Shi Liu
  • Publication number: 20160254239
    Abstract: A method of manufacturing micro pins includes forming a release layer over a substrate. A pattern layer is formed over the release layer, in which the pattern layer has a plurality of openings spaced apart to each other and through the pattern layer. A plurality of micro pins are respectively formed in the openings. The pattern layer and the release layer are removed to obtain the micro pins. An isolated conductive micro pin for connecting one or more components is also provided.
    Type: Application
    Filed: February 26, 2015
    Publication date: September 1, 2016
    Inventors: Ying-Jui HUANG, Chung-Shi LIU, Hsin-Hung LIAO, Chien-Ling HWANG
  • Publication number: 20160240451
    Abstract: A semiconductor package includes a carrier, at least and adhesive portion, a plurality of micro pins and a die. The carrier has a first surface and second surface opposite to the first surface. The adhesive portion is disposed on the first surface, and the plurality of the micro pins is disposed in the adhesive portions. The die is disposed on the remaining adhesive portion free of the micro pins.
    Type: Application
    Filed: February 13, 2015
    Publication date: August 18, 2016
    Inventors: Chien-Ling HWANG, Bor-Ping JANG, Chung-Shi LIU, Hsin-Hung LIAO, Ying-Jui HUANG
  • Publication number: 20160099165
    Abstract: A method of manufacturing a semiconductor device comprises providing a carrier, disposing a plurality of dies over the carrier along a first direction and a second direction orthogonal to the first direction to arrange the plurality of dies in a plurality of rows, and shifting one of the plurality of rows along the first direction or the second direction in a predetermined distance.
    Type: Application
    Filed: December 14, 2015
    Publication date: April 7, 2016
    Inventors: BOR-PING JANG, CHIEN LING HWANG, HSIN-HUNG LIAO, YEONG-JYH LIN
  • Patent number: 9236351
    Abstract: A semiconductor device includes a carrier, several dies disposed on a surface of the carrier and several scribing lines defined on the surface of the carrier. The scribing lines include several continuous lines along a first direction and several discontinuous lines along a second direction. Further, a method of dies singulation includes providing a carrier, disposing several dies on a surface of the carrier according to several scribing lines including several continuous lines along a first direction and several discontinuous lines along a second direction, cutting the carrier according to the continuous lines along the first direction, and cutting the carrier according to the discontinuous lines along the second direction.
    Type: Grant
    Filed: October 9, 2013
    Date of Patent: January 12, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Bor-Ping Jang, Chien Ling Hwang, Hsin-Hung Liao, Yeong-Jyh Lin
  • Publication number: 20150371860
    Abstract: A method for thinning a wafer is provided. The method includes placing a wafer on a support assembly and securing an etching mask to a backside of the wafer. The etching mask covers a peripheral portion of the wafer. The method further includes performing a wet etching process on the backside of the wafer to form a thinned wafer, and the thinned wafer includes peripheral portions having a first thickness and a central portion having a second thickness smaller than the first thickness. A system for forming the thinned wafer is also provided.
    Type: Application
    Filed: September 1, 2015
    Publication date: December 24, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chien Ling HWANG, Bor-Ping JANG, Hsin-Hung LIAO, Chung-Shi LIU
  • Publication number: 20150262845
    Abstract: A method includes placing a plurality of dummy dies over a carrier, placing a plurality of device dies over the carrier, molding the plurality of dummy dies and the plurality of device dies in a molding compound, forming redistribution line over and electrically coupled to the device dies, and performing a die-saw to separate the device dies and the molding compound into a plurality of packages.
    Type: Application
    Filed: May 29, 2015
    Publication date: September 17, 2015
    Inventors: Chien Ling Hwang, Bor-Ping Jang, Hsin-Hung Liao, Yeong-Jyh Lin, Hsiao-Chung Liang, Chung-Shi Liu
  • Patent number: 9129899
    Abstract: Embodiments of a method for thinning a wafer are provided. The method includes placing a wafer on a support assembly and securing an etching mask to a backside of the wafer. The etching mask covers a peripheral portion of the wafer. The method further includes performing a wet etching process on the backside of the wafer to form a thinned wafer, and the thinned wafer includes peripheral portions having a first thickness and a central portion having a second thickness smaller than the first thickness. Embodiments of system for forming the thinned wafer are also provided.
    Type: Grant
    Filed: July 17, 2013
    Date of Patent: September 8, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chien-Ling Hwang, Bor-Ping Jang, Hsin-Hung Liao, Chung-Shi Liu
  • Patent number: 9093337
    Abstract: A method includes placing a plurality of dummy dies over a carrier, placing a plurality of device dies over the carrier, molding the plurality of dummy dies and the plurality of device dies in a molding compound, forming redistribution line over and electrically coupled to the device dies, and performing a die-saw to separate the device dies and the molding compound into a plurality of packages.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: July 28, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien Ling Hwang, Bor-Ping Jang, Hsin-Hung Liao, Yeong-Jyh Lin, Hsiao-Chung Liang, Chung-Shi Liu
  • Patent number: 9085049
    Abstract: A method for manufacturing a semiconductor device is provided. The method contains steps of providing the semiconductor device including a working area; directing a medium flow onto the working area; configuring a lens in contact with the medium flow; and directing a laser beam to the working area through the lens and the medium flow. A laser processing for manufacturing a semiconductor device is also provided.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: July 21, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Ling Hwang, Bor-Ping Jang, Yi-Li Hsiao, Hsin-Hung Liao, Chung-Shi Liu
  • Publication number: 20150102091
    Abstract: An apparatus used for forming stud bumps may be formed by providing a first clamp plate comprising a clamping surface, forming a notcher on the clamping surface, and forming a contact stopper on the clamping surface. The apparatus may include a clamp that includes at least two opposing plates, and at least one of the opposing plates includes a protruding feature that intersects the wire when the wire is clamped forming a first notch in the wire. The method for forming stud bumps includes bonding wire to a bonding surface, releasing the wire from the clamp, passing the wire a notch pitch distance through the clamp, clamping the wire with the clamp forming a second notch in the wire, and breaking the wire leaving a bonded portion of the wire on the bonding surface.
    Type: Application
    Filed: December 18, 2014
    Publication date: April 16, 2015
    Inventors: Yeong-Jyh Lin, Hsin-Hung Liao, Chien Ling Hwang, Yi-Li Hsiao, Chung-Shi Liu, Mirng-Ji Lii, Chen-Hua Yu
  • Publication number: 20150097272
    Abstract: A semiconductor device includes a carrier, several dies disposed on a surface of the carrier and several scribing lines defined on the surface of the carrier. The scribing lines include several continuous lines along a first direction and several discontinuous lines along a second direction. Further, a method of dies singulation includes providing a carrier, disposing several dies on a surface of the carrier according to several scribing lines including several continuous lines along a first direction and several discontinuous lines along a second direction, cutting the carrier according to the continuous lines along the first direction, and cutting the carrier according to the discontinuous lines along the second direction.
    Type: Application
    Filed: October 9, 2013
    Publication date: April 9, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: BOR-PING JANG, CHIEN LING HWANG, HSIN-HUNG LIAO, YEONG-JYH LIN
  • Publication number: 20150093858
    Abstract: A method includes placing a plurality of dummy dies over a carrier, placing a plurality of device dies over the carrier, molding the plurality of dummy dies and the plurality of device dies in a molding compound, forming redistribution line over and electrically coupled to the device dies, and performing a die-saw to separate the device dies and the molding compound into a plurality of packages.
    Type: Application
    Filed: September 27, 2013
    Publication date: April 2, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien Ling Hwang, Bor-Ping Jang, Hsin-Hung Liao, Yeong-Jyh Lin, Hsiao-Chung Liang, Chung-Shi Liu
  • Publication number: 20150021760
    Abstract: Embodiments of mechanisms for forming a package are provided. The package includes a substrate and a contact pad formed on the substrate. The package also includes a conductive pillar bonded to the contact pad through solder formed between the conductive pillar and the contact pad. The solder is in direct contact with the conductive pillar.
    Type: Application
    Filed: July 17, 2013
    Publication date: January 22, 2015
    Inventors: Yeong-Jyh LIN, Hsin-Hung LIAO, Chien Ling HWANG, Bor-Ping JANG, Hsiao-Chung LIANG, Chung-Shi LIU
  • Publication number: 20150024606
    Abstract: Embodiments of a method for thinning a wafer are provided. The method includes placing a wafer on a support assembly and securing an etching mask to a backside of the wafer. The etching mask covers a peripheral portion of the wafer. The method further includes performing a wet etching process on the backside of the wafer to form a thinned wafer, and the thinned wafer includes peripheral portions having a first thickness and a central portion having a second thickness smaller than the first thickness. Embodiments of system for forming the thinned wafer are also provided.
    Type: Application
    Filed: July 17, 2013
    Publication date: January 22, 2015
    Inventors: Chien-Ling HWANG, Bor-Ping JANG, Hsin-Hung LIAO, Chung-Shi LIU
  • Patent number: 8936730
    Abstract: An apparatus used for forming stud bumps may be formed by providing a first clamp plate comprising a clamping surface, forming a notcher on the clamping surface, and forming a contact stopper on the clamping surface. The apparatus may include a clamp that includes at least two opposing plates, and at least one of the opposing plates includes a protruding feature that intersects the wire when the wire is clamped forming a first notch in the wire. The method for forming stud bumps includes bonding wire to a bonding surface, releasing the wire from the clamp, passing the wire a notch pitch distance through the clamp, clamping the wire with the clamp forming a second notch in the wire, and breaking the wire leaving a bonded portion of the wire on the bonding surface.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: January 20, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yeong-Jyh Lin, Hsin-Hung Liao, Chien Ling Hwang, Chung-Shi Liu, Mirng-Ji Lii, Chen-Hua Yu, Yi-Li Hsiao
  • Publication number: 20140154871
    Abstract: A method for manufacturing a semiconductor device is provided. The method contains steps of providing the semiconductor device including a working area; directing a medium flow onto the working area; configuring a lens in contact with the medium flow; and directing a laser beam to the working area through the lens and the medium flow. A laser processing for manufacturing a semiconductor device is also provided.
    Type: Application
    Filed: November 30, 2012
    Publication date: June 5, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Ling Hwang, Bor-Ping Jang, Yi-Li Hsiao, Hsin-Hung Liao, Chung-Shi Liu