Patents by Inventor Hsin-Mao Liu
Hsin-Mao Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230420484Abstract: A light-emitting module including a first optoelectronic unit having a first electrode pad and a second electrode pad, a second optoelectronic unit having a third electrode pad and a fourth electrode pad, a first supporting structure enclosing the first optoelectronic unit and the second optoelectronic unit, a first pin overlapping and confronted with both of the first electrode pad and the third electrode pad, a second pin overlapping the second electrode pad and the first supporting structure, and a third pin overlapping the fourth electrode pad and physically separated from the second pin.Type: ApplicationFiled: September 12, 2023Publication date: December 28, 2023Inventors: Min Hsun HSIEH, Hsin-Mao LIU
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Publication number: 20230395562Abstract: Disclosed is a die-bonding method which provides a target substrate having a circuit structure with multiple electrical contacts and multiple semiconductor elements each semiconductor element having a pair of electrodes, arranges the multiple semiconductor elements on the target substrate with the pair of electrodes of each semiconductor element aligned with two corresponding electrical contacts of the target substrate, and applies at least one energy beam to join and electrically connect the at least one pair of electrodes of every at least one of the multiple semiconductor elements and the corresponding electrical contacts aligned therewith in a heating cycle by heat carried by the at least one energy beam in the heating cycle. The die-bonding method delivers scattering heated dots over the target substrate to avoid warpage of PCB and ensures high bonding strength between the semiconductor elements and the circuit structure of the target substrate.Type: ApplicationFiled: August 15, 2023Publication date: December 7, 2023Applicant: EPISTAR CORPORATIONInventors: Min-Hsun HSIEH, Shih-An LIAO, Ying-Yang SU, Hsin-Mao LIU, Tzu-Hsiang WANG, Chi-Chih PU
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Publication number: 20230335695Abstract: A light-emitting device includes a light-emitting element having a first-type semiconductor layer, a second-type semiconductor layer, an active stack between the first-type semiconductor layer and the second-type semiconductor layer, a bottom surface, and a top surface. A first electrode is disposed on the bottom surface and electrically connected to the first-type semiconductor layer. A second electrode is disposed on the bottom surface and electrically connected to the second-type semiconductor layer. A supporting structure is disposed on the top surface. The supporting structure has a thickness and a maximum width. A ratio of the maximum width to the thickness is of 2-150.Type: ApplicationFiled: June 21, 2023Publication date: October 19, 2023Inventors: Min-Hsun HSIEH, Hsin-Mao LIU, Ying-Yang SU
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Patent number: 11791370Abstract: This disclosure discloses a light-emitting display module display. The light-emitting display module comprises: a board; and a plurality of light-emitting diode modules arranged in an array configuration on the board; wherein one of the light-emitting diode modules comprises a plurality of encapsulated light-emitting units spaced apart from each other; and one of the encapsulated light-emitting units comprises a plurality of optoelectronic units, a first supporting, and a fence; and wherein the plurality of optoelectronic units are covered by the first supporting structure, and the fence surrounds the first supporting structure and the plurality of optoelectronic units.Type: GrantFiled: April 18, 2022Date of Patent: October 17, 2023Assignee: EPISTAR CORPORATIONInventors: Min Hsun Hsieh, Hsin-Mao Liu
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Patent number: 11764328Abstract: The light-emitting diode package includes a plurality of bumps being a couple corresponding to each other. Each of the bumps has a first part and a second part placed under the first part, and a gap is formed between the bumps in a period-repeating wriggle shape or an irregular wriggle shape. Accordingly, the distance between the bumps of the light-emitting diode package is small, which results in a less stress being concentrated at the space between the bumps, as a result, a crack is difficultly caused by the stress to the light-emitting diode package, in other words, the structural strength between the bumps and the covering part is enhanced. Still, while being manufactured, the yield rate of the light-emitting diode package is also improved since there is almost no crack to reduce the yield rate.Type: GrantFiled: August 13, 2019Date of Patent: September 19, 2023Assignee: EPISTAR CORPORATIONInventors: Ying-Yong Su, Hsin-Mao Liu, Wei-Shan Hu, Ching-Tai Cheng
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Patent number: 11728310Abstract: Disclosed is a die-bonding method which provides a target substrate having a circuit structure with multiple electrical contacts and multiple semiconductor elements each semiconductor element having a pair of electrodes, arranges the multiple semiconductor elements on the target substrate with the pair of electrodes of each semiconductor element aligned with two corresponding electrical contacts of the target substrate, and applies at least one energy beam to join and electrically connect the at least one pair of electrodes of every at least one of the multiple semiconductor elements and the corresponding electrical contacts aligned therewith in a heating cycle by heat carried by the at least one energy beam in the heating cycle. The die-bonding method delivers scattering heated dots over the target substrate to avoid warpage of PCB and ensures high bonding strength between the semiconductor elements and the circuit structure of the target substrate.Type: GrantFiled: June 13, 2022Date of Patent: August 15, 2023Assignee: EPISTAR CORPORATIONInventors: Min-Hsun Hsieh, Shih-An Liao, Ying-Yang Su, Hsin-Mao Liu, Tzu-Hsiang Wang, Chi-Chih Pu
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Patent number: 11710812Abstract: A light-emitting device includes a light-emitting element having a first-type semiconductor layer, a second-type semiconductor layer, an active stack between the first-type semiconductor layer and the second-type semiconductor layer, a bottom surface, and a top surface. A first electrode is disposed on the bottom surface and electrically connected to the first-type semiconductor layer. A second electrode is disposed on the bottom surface and electrically connected to the second-type semiconductor layer. A supporting structure is disposed on the top surface. The supporting structure has a thickness and a maximum width. A ratio of the maximum width to the thickness is of 2˜150.Type: GrantFiled: May 27, 2021Date of Patent: July 25, 2023Assignee: EPISTAR CORPORATIONInventors: Min-Hsun Hsieh, Hsin-Mao Liu, Ying-Yang Su
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Publication number: 20230207540Abstract: A light-emitting device includes a circuit carrier board having a short side and a long side, a plurality of light-emitting units on the circuit carrier board for emitting three or more color lights, and a light-transmitting glue layer on the circuit carrier board and covering the plurality of light-emitting units. The short side is shorter than the long side. The plurality of light-emitting units include a first light-emitting unit. The first light-emitting unit has a light exit surface, a first sidewall, and a second sidewall. The first sidewall faces the short side and has a first included angle with the light exit surface, and the second sidewall faces the long side and has a second included angle with the light exit surface. The first included angle is between 85 to 95 degrees, and the second included angle is less than 85 degrees or greater than 105 degrees.Type: ApplicationFiled: December 15, 2022Publication date: June 29, 2023Inventors: Min-Hsun HSIEH, Hsin-Mao LIU, Tzu-Hsiang WANG, Ya-Wen LIN, Chi-Chih PU, Hsiao-Pei CHIU, Ching-Tai CHENG, Chong-Yu WANG
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Publication number: 20230187473Abstract: A light-emitting device includes a substrate with a top surface; a first light-emitting structure unit and a second light-emitting structure unit separately formed on the top surface and adjacent to each other, and wherein the first light-emitting structure unit includes a first sidewall and the second light-emitting structure unit includes a second sidewall; an isolation layer formed on the first sidewall and the second sidewall, including a first edge on the first light-emitting structure unit and wherein the first edge has an acute angle in a cross-sectional view; and an electrical connection formed on the isolation layer, the first light-emitting structure unit and the second light-emitting structure unit, and electrically connecting the first light-emitting structure unit and the second light-emitting structure unit; wherein the first sidewall and the second sidewall are inclined; and wherein the electrical connection includes a first part on the first light-emitting structure unit, and the first part doType: ApplicationFiled: February 2, 2023Publication date: June 15, 2023Inventors: Chien-Fu SHEN, Chao-Hsing CHEN, Tsun-Kai KO, Schang-Jing HON, Sheng-Jie HSU, De-Shan KUO, Hsin-Ying WANG, Chiu-Lin YAO, Chien-Fu HUANG, Hsin-Mao LIU, Chien-Kai CHUNG
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Publication number: 20230105078Abstract: An LED arrangement method includes providing first LED sections and second LED sections commonly located on a substrate. The first LED sections and the second LED sections are transferred to a bin carrier to form an array of sections having columns and rows. Each of the first LED sections has first LED chips. The first LED chips, as a whole, belong to a first bin. Each of the second LED sections has second LED chips. The second LED chips, as a whole, belong to a second bin. Each of columns has one of the first LED sections and one of the second LED sections. Each of the rows has one of the first LED sections and one of the second LED sections.Type: ApplicationFiled: September 30, 2022Publication date: April 6, 2023Inventors: Min-Hsun HSIEH, Hsin-Mao LIU
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Patent number: 11594573Abstract: A light-emitting device, includes a substrate with a top surface; a first light-emitting structure unit and a second light-emitting structure unit separately formed on the top surface and adjacent to each other, and wherein the first light-emitting structure unit includes a first sidewall and a second sidewall; a trench between the first and the second light-emitting structure units; and an electrical connection arranged on the first sidewall and the second light-emitting structure unit, and electrically connecting the first light-emitting structure unit and the second light-emitting structure unit; wherein the first sidewall connects to the top surface; wherein the first sidewall faces the second light-emitting structure units, and the second sidewall is not between the first light-emitting structure unit and the second light-emitting structure unit; and wherein the second sidewall is steeper than the first sidewall.Type: GrantFiled: February 8, 2021Date of Patent: February 28, 2023Assignee: EPISTAR CORPORATIONInventors: Chien-Fu Shen, Chao-Hsing Chen, Tsun-Kai Ko, Schang-Jing Hon, Sheng-Jie Hsu, De-Shan Kuo, Hsin-Ying Wang, Chiu-Lin Yao, Chien-Fu Huang, Hsin-Mao Liu, Chien-Kai Chung
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Patent number: 11588084Abstract: Disclosed is a die-bonding method which provides a target substrate having a circuit structure with multiple electrical contacts and multiple semiconductor elements each semiconductor element having a pair of electrodes, arranges the multiple semiconductor elements on the target substrate with the pair of electrodes of each semiconductor element aligned with two corresponding electrical contacts of the target substrate, and applies at least one energy beam to join and electrically connect the at least one pair of electrodes of every at least one of the multiple semiconductor elements and the corresponding electrical contacts aligned therewith in a heating cycle by heat carried by the at least one energy beam in the heating cycle. The die-bonding method delivers scattering heated dots over the target substrate to avoid warpage of PCB and ensures high bonding strength between the semiconductor elements and the circuit structure of the target substrate.Type: GrantFiled: January 22, 2020Date of Patent: February 21, 2023Assignee: EPISTAR CORPORATIONInventors: Min-Hsun Hsieh, Shih-An Liao, Ying-Yang Su, Hsin-Mao Liu, Tzu-Hsiang Wang, Chi-Chih Pu
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Patent number: 11530804Abstract: A light-emitting device includes a first light-emitting module, a second light-emitting module, a conductive layer and an insulation layer. The first light-emitting module includes a first substrate having a first cavity, a first sidewall, and a light-emitting component disposed on the first substrate. The second module includes a second substrate having a second cavity corresponding to the first cavity and a second sidewall corresponding to the first sidewall. The conductive layer is directly connected to the first cavity and the second cavity and electrically connect the first light-emitting module and the second light-emitting module. The insulation layer is directly connected to the first sidewall and the second sidewall.Type: GrantFiled: January 20, 2021Date of Patent: December 20, 2022Assignee: EPISTAR CORPORATIONInventors: Min-Hsun Hsieh, Ying-Yang Su, Shih-An Liao, Hsin-Mao Liu, Tzu-Hsiang Wang, Chi-Chih Pu
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Publication number: 20220392876Abstract: A light-emitting device includes a first carrier, which includes a side surface between a first surface and a second surface, upper conductive pads on the first surface, and lower conductive pads under the second surface; a RDL pixel package includes a RDL which includes bonding pads and bottom electrodes, and the light-emitting units on the RDL, and connected to the bonding pads. A light-transmitting layer on the RDL and covers the light-emitting units, an upper surface, a lower surface, and a lateral surface between the upper surface and the lower surface. The RDL pixel package is on the first surface and electrically connected to the upper conductive pads. A protective layer covers the first surface and contacting the side surface of the RDL pixel package. The lower electrodes and the upper conductive pads are connected, and the distance between two adjacent bonding pads is less than 30 ?m.Type: ApplicationFiled: June 1, 2022Publication date: December 8, 2022Inventors: Min-Hsun HSIEH, Hsin-Mao LIU, Li-Yuan HUANG, Tzu-Hsiang WANG, Chi-Chih PU, Ya-Wen LIN, Hsiao-Pei CHIU, Pei-Yu LI
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Patent number: 11482651Abstract: The disclosure discloses an optoelectronic element comprising: an optoelectronic unit comprising a first metal layer, a second metal layer, and an outermost lateral surface; an insulating layer having a first portion overlapping the optoelectronic unit and extending beyond the lateral surface, and a second portion separated from the first portion in a cross-sectional view; and a first conductive layer formed on the insulating layer.Type: GrantFiled: June 12, 2020Date of Patent: October 25, 2022Assignee: EPISTAR CORPORATIONInventors: Cheng-Nan Han, Tsung-Xian Lee, Min-Hsun Hsieh, Hung-Hsuan Chen, Hsin-Mao Liu, Hsing-Chao Chen, Ching-San Tao, Chih-Peng Ni, Tzer-Perng Chen, Jen-Chau Wu
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Publication number: 20220310555Abstract: Disclosed is a die-bonding method which provides a target substrate having a circuit structure with multiple electrical contacts and multiple semiconductor elements each semiconductor element having a pair of electrodes, arranges the multiple semiconductor elements on the target substrate with the pair of electrodes of each semiconductor element aligned with two corresponding electrical contacts of the target substrate, and applies at least one energy beam to join and electrically connect the at least one pair of electrodes of every at least one of the multiple semiconductor elements and the corresponding electrical contacts aligned therewith in a heating cycle by heat carried by the at least one energy beam in the heating cycle. The die-bonding method delivers scattering heated dots over the target substrate to avoid warpage of PCB and ensures high bonding strength between the semiconductor elements and the circuit structure of the target substrate.Type: ApplicationFiled: June 13, 2022Publication date: September 29, 2022Applicant: EPISTAR CORPORATIONInventors: Min-Hsun HSIEH, Shih-An LIAO, Ying-Yang SU, Hsin-Mao LIU, Tzu-Hsiang WANG, Chi-Chih PU
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Publication number: 20220246676Abstract: This disclosure discloses a light-emitting display module display. The light-emitting display module comprises: a board; and a plurality of light-emitting diode modules arranged in an array configuration on the board; wherein one of the light-emitting diode modules comprises a plurality of encapsulated light-emitting units spaced apart from each other; and one of the encapsulated light-emitting units comprises a plurality of optoelectronic units, a first supporting, and a fence; and wherein the plurality of optoelectronic units are covered by the first supporting structure, and the fence surrounds the first supporting structure and the plurality of optoelectronic units.Type: ApplicationFiled: April 18, 2022Publication date: August 4, 2022Inventors: Min Hsun HSIEH, Hsin-Mao LIU
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Patent number: 11362060Abstract: Disclosed is a die-bonding method which provides a target substrate having a circuit structure with multiple electrical contacts and multiple semiconductor elements each semiconductor element having a pair of electrodes, arranges the multiple semiconductor elements on the target substrate with the pair of electrodes of each semiconductor element aligned with two corresponding electrical contacts of the target substrate, and applies at least one energy beam to join and electrically connect the at least one pair of electrodes of every at least one of the multiple semiconductor elements and the corresponding electrical contacts aligned therewith in a heating cycle by heat carried by the at least one energy beam in the heating cycle. The die-bonding method delivers scattering heated dots over the target substrate to avoid warpage of PCB and ensures high bonding strength between the semiconductor elements and the circuit structure of the target substrate.Type: GrantFiled: August 27, 2019Date of Patent: June 14, 2022Assignee: EPISTAR CORPORATIONInventors: Min-Hsun Hsieh, Shih-An Liao, Ying-Yang Su, Hsin-Mao Liu, Tzu-Hsiang Wang, Chi-Chih Pu
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Patent number: 11309350Abstract: This disclosure discloses a light-emitting display module display. The light-emitting display module comprises: a board; and a plurality of light-emitting diode modules arranged in an array configuration on the board; wherein one of the light-emitting diode modules comprises a plurality of encapsulated light-emitting units spaced apart from each other; and one of the encapsulated light-emitting units comprises a plurality of optoelectronic units, a first supporting, and a fence; and wherein the plurality of optoelectronic units are covered by the first supporting structure, and the fence surrounds the first supporting structure and the plurality of optoelectronic units.Type: GrantFiled: October 15, 2018Date of Patent: April 19, 2022Assignee: EPISTAR CORPORATIONInventors: Min Hsun Hsieh, Hsin-Mao Liu
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Publication number: 20210288232Abstract: A light-emitting device includes a light-emitting element having a first-type semiconductor layer, a second-type semiconductor layer, an active stack between the first-type semiconductor layer and the second-type semiconductor layer, a bottom surface, and a top surface. A first electrode is disposed on the bottom surface and electrically connected to the first-type semiconductor layer. A second electrode is disposed on the bottom surface and electrically connected to the second-type semiconductor layer. A supporting structure is disposed on the top surface. The supporting structure has a thickness and a maximum width. A ratio of the maximum width to the thickness is of 2˜150.Type: ApplicationFiled: May 27, 2021Publication date: September 16, 2021Inventors: Min-Hsun HSIEH, Hsin-Mao LIU, Ying-Yang SU