Patents by Inventor Hsiu-Hui Yang

Hsiu-Hui Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11099675
    Abstract: A display device, an operation, a driving circuit and a timing control circuit are provided. The display device includes a touch display panel, the driving circuit and the timing control circuit. The driving circuit drives the touch display panel to display image frames and perform touch detection. The timing control circuit outputs display data to the driving circuit through a data transmission path during a display period to display the image frame on the touch display panel. The driving circuit outputs touch detection data corresponding to the touch detection to the timing control circuit through the same data transmission path during a touch detection period.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: August 24, 2021
    Assignee: Novatek Microelectronics Corp.
    Inventors: Yen-Cheng Cheng, Hsiu-Hui Yang
  • Publication number: 20210225248
    Abstract: A display panel is provided. The display panel includes a pixel array, multiple data lines and first scan lines. The pixel array is arranged in multiple pixel rows by multiple pixel columns, and includes a first pixel row, a second pixel row, and a third pixel row which are adjacent pixel rows. The first scan line is coupled to multiple first pixel groups. Each first pixel group includes multiple first pixels in the first pixel row and multiple second pixels in the second pixel row adjacent to the first pixel row. A display driving circuit for driving a display panel is also provided.
    Type: Application
    Filed: January 14, 2021
    Publication date: July 22, 2021
    Applicant: Novatek Microelectronics Corp.
    Inventors: Yen-Cheng Cheng, Hsiu-Hui Yang
  • Patent number: 10991290
    Abstract: Control methods of a channel setting module applied to a display panel are provided. The display panel has gate lines, source lines, and pixels. The pixels are arranged in matrix. The pixels disposed at the same row are electrically connected to the same gate line, and the pixels disposed at the same column are electrically connected to the same source line. The adoption of the channel setting module reduces the control signals required by the source lines. The channel setting module includes operational amplifiers and de-mux switches, and the control methods dynamically determine conduction states of the de-mux switches. The voltage outputs of the operational amplifiers are selectively outputted to the source lines, depending on conduction statuses of the de-mux switches. By applying the control methods, the interference between the source lines are reduced, and the instantaneous overshoots/undershoots of floating channels are depressed.
    Type: Grant
    Filed: October 7, 2020
    Date of Patent: April 27, 2021
    Assignee: NOVATEK MICROELECTRONICS CORP.
    Inventors: Hsiu-Hui Yang, Yu-Shao Liu, Chin-Hung Hsu, Yen-Cheng Cheng
  • Patent number: 10977973
    Abstract: A display device and a detection method applied to the display device are provided. The display device includes a display panel, a source control circuit, and a leakage estimation circuit. The display panel includes pixels being arranged in M columns, wherein at least one panel-partition is defined on the display panel. The source control circuit includes M source drivers which respectively provide data voltages to the M columns of pixels. The leakage estimation circuit includes an evaluation circuit, a defect detection circuit, and a mode-switch. The evaluation circuit controls the defect detection circuit to perform a leakage estimation procedure so that a leakage current corresponding to the panel-partition is estimated when the at least one mode-switch is turned on.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: April 13, 2021
    Assignee: NOVATEK MICROELECTRONICS CORP.
    Inventors: Yen-Cheng Cheng, Hsiu-Hui Yang
  • Publication number: 20210090479
    Abstract: A display device and a detection method applied to the display device are provided. The display device includes a display panel, a source control circuit, and a leakage estimation circuit. The display panel includes pixels being arranged in M columns, wherein at least one panel-partition is defined on the display panel. The source control circuit includes M source drivers which respectively provide data voltages to the M columns of pixels. The leakage estimation circuit includes an evaluation circuit, a defect detection circuit, and a mode-switch. The evaluation circuit controls the defect detection circuit to perform a leakage estimation procedure so that a leakage current corresponding to the panel-partition is estimated when the at least one mode-switch is turned on.
    Type: Application
    Filed: September 25, 2019
    Publication date: March 25, 2021
    Inventors: Yen-Cheng CHENG, Hsiu-Hui YANG
  • Publication number: 20210048912
    Abstract: A signal processing apparatus includes a first signal processing circuit and the second signal processing circuit. The first signal processing circuit receives a first signal. The first signal processing circuit has a power end connecting to a first voltage and a reference ground end. The second signal processing circuit receives a second signal. The second signal processing circuit has a power end which is electrically coupled to the reference ground end of the first signal processing circuit or equals the reference ground end of the first signal processing circuit. The second signal processing circuit has a reference ground end connecting to a second voltage.
    Type: Application
    Filed: August 13, 2020
    Publication date: February 18, 2021
    Applicant: Novatek Microelectronics Corp.
    Inventors: Yen-Cheng Cheng, Hsiu-Hui Yang
  • Publication number: 20210020135
    Abstract: An output circuit of a driver includes a plurality of output nodes, a first output buffer group and a multiplexer. The first output buffer group is configured to output data to the plurality of output nodes, wherein each output buffer in the first output buffer group is configured to output data to at least two output nodes among the plurality of output nodes. The multiplexer, coupled between the plurality of output nodes and the first output buffer group, is configured to select to couple each output buffer in the first output buffer group to one of the plurality of output nodes.
    Type: Application
    Filed: July 17, 2019
    Publication date: January 21, 2021
    Inventors: Hsiu-Hui Yang, Yen-Cheng Cheng, Chin-Hung Hsu
  • Publication number: 20200027387
    Abstract: A channel circuit of a source driver, including a first digital-to-analog converter (DAC), a second DAC, a first switch, a second switch and an output buffer circuit, is provided. The output terminal of the output buffer circuit is configured to be coupled to a data line of a display panel. An output terminal of the first DAC is coupled to a first input terminal among the input terminals of the output buffer circuit. An output terminal of the second DAC is coupled to a second input terminal among the input terminals of the output buffer circuit. The first switch is disposed along a first signal path between the output terminal of the first DAC and the output terminal of the output buffer circuit. The second switch is disposed along a second signal path between the output terminal of the second DAC and the output terminal of the output buffer circuit.
    Type: Application
    Filed: July 22, 2019
    Publication date: January 23, 2020
    Applicant: Novatek Microelectronics Corp.
    Inventors: Yen-Cheng Cheng, Hsiu-Hui Yang
  • Publication number: 20160118010
    Abstract: A display driving apparatus includes a timing controller, for generating and outputting a first clock signal and a first data signal; and a plurality of source drivers, each source driver receiving the first clock signal and the first data signal, wherein there is a respective first skew value between the received first clock signal and the received first data signal for each source driver; wherein each source driver adjusts the respective first skew value to a respective second skew value.
    Type: Application
    Filed: May 14, 2015
    Publication date: April 28, 2016
    Inventors: Chin-Hung Hsu, Hsiu-Hui Yang, Te-Hsien Kuo
  • Patent number: 8391097
    Abstract: A word-line driving circuit for driving a word-line in a memory array includes a NAND circuit having a pair of address inputs and an output, an output inverter circuit having an inverter power supply node, an input coupled to the output of the NAND circuit and an output for providing a word line signal, a power gate coupled between a first power supply node and the inverter power supply node, and a control circuit coupled to the power gate. The control circuit controls the power gate to place the word line driver circuit in active or standby mode in response to the output of the NAND circuit.
    Type: Grant
    Filed: May 25, 2010
    Date of Patent: March 5, 2013
    Assignee: Taiwan Semiconductor Manufacturing Co. Ltd.
    Inventors: Wei Min Chan, Yen-Huei Chen, Chen-Lin Yang, Hsiu-Hui Yang, Shao-Yu Chou
  • Publication number: 20130021306
    Abstract: A display panel driving apparatus and an operation method thereof and a source driver thereof are provided. The display panel driving apparatus includes a timing controller and a source driver. The timing controller outputs display data and error-check data. The source driver generates source driving signals for driving a display panel in accordance with the display data provided from the timing controller, and checks the display data in accordance with the error-check data provided from the timing controller.
    Type: Application
    Filed: November 1, 2011
    Publication date: January 24, 2013
    Applicant: NOVATEK MICROELECTRONICS CORP.
    Inventors: Te-Hsien Kuo, Hsiu-Hui Yang, Chin-Hung Hsu
  • Patent number: 8305820
    Abstract: A memory device includes an array of memory cells, the memory device including a bitline biasing circuit for biasing a bitline during a write operation. The bitline biasing circuit operating to provide a negative biasing voltage to the bitline. The magnitude of the negative biasing voltage is inversely proportional to a memory cell supply voltage level provided at a memory cell supply voltage node.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: November 6, 2012
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsiu-Hui Yang, Jack Liu, Wei Min Chan, Shao-Yu Chou
  • Publication number: 20110292754
    Abstract: A word-line driving circuit for driving a word-line in a memory array includes a NAND circuit having a pair of address inputs and an output, an output inverter circuit having an inverter power supply node, an input coupled to the output of the NAND circuit and an output for providing a word line signal, a power gate coupled between a first power supply node and the inverter power supply node, and a control circuit coupled to the power gate. The control circuit controls the power gate to place the word line driver circuit in active or standby mode in response to the output of the NAND circuit.
    Type: Application
    Filed: May 25, 2010
    Publication date: December 1, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei Min Chan, Yen-Huei Chen, Chen-Lin Yang, Hsiu-Hui Yang, Shao-Yu Chou
  • Publication number: 20110267901
    Abstract: A memory device includes an array of memory cells, the memory device including a bitline biasing circuit for biasing a bitline during a write operation. The bitline biasing circuit operating to provide a negative biasing voltage to the bitline. The magnitude of the negative biasing voltage is inversely proportional to a memory cell supply voltage level provided at a memory cell supply voltage node.
    Type: Application
    Filed: April 29, 2010
    Publication date: November 3, 2011
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsiu-Hui Yang, Jack Liu, Wei Min Chan, Shao-Yu Chou