Abstract: A decoding method, a memory storage device and a memory control circuit unit are disclosed. The method includes: activating a decoding circuit which supports a plurality of decoding modes each corresponding to a threshold value, wherein a distribution of the threshold value corresponds to error correction abilities of the decoding modes; reading first data from a rewritable non-volatile memory module; performing, by the decoding circuit, a first decoding operation on the first data; obtaining a decoding parameter according to an execution result of the first decoding operation; and performing, by the decoding circuit, a second decoding operation on the first data based on a first decoding mode among the decoding modes according to a relative numerical relationship between the decoding parameter and the threshold value.

Abstract: A decoding method, a memory storage device and a memory control circuit unit are disclosed. The method includes: activating a decoding circuit which supports a plurality of decoding modes each corresponding to a threshold value, wherein a distribution of the threshold value corresponds to error correction abilities of the decoding modes; reading first data from a rewritable non-volatile memory module; performing, by the decoding circuit, a first decoding operation on the first data; obtaining a decoding parameter according to an execution result of the first decoding operation; and performing, by the decoding circuit, a second decoding operation on the first data based on a first decoding mode among the decoding modes according to a relative numerical relationship between the decoding parameter and the threshold value.

Abstract: A lever-operated latch device includes an assembly of a case body, an actuation body mounted on the case body, a linking member and a slide body. The actuation body has a free end and a pivoted end pivotally connected with the case body in cooperation with elastic members. The free end of the actuation body is formed with two protruding arms and an opening section positioned between the protruding arms. An operation section is disposed in the opening section. The linking member has a first end pivotally connected with the free end of the actuation body (or the operation section) and a second end connected with the slide body. When an operator presses the operation section, the actuation body is permitted to move from a closed position to an opened position so as to drive the linking member and the slide body to move.

Abstract: Various techniques are disclosed for automatically generating sub-cells for a non-final layout of an analog integrated circuit. Device specifications and partition information for the analog integrated circuit is received. Based on the device specifications and the partition information, first cut locations for a first set of cuts to be made along a first direction of a non-final layout of the analog integrated circuit and second cut locations for a second set of cuts to be made along a second direction in the non-final layout are determined. The first set of cuts are made in the non-final layout at the cut locations to produce a temporary layout. The second set of cuts are made in the temporary layout at the cut locations to produce a plurality of sub-cells.

Abstract: The present invention provides a resonant switched capacitor voltage converter (RSCC), which is coupled to and operates synchronously with another RSCC. The RSCC includes: plural switches, a resonant inductor, a resonant capacitor, and a control circuit. The control circuit controls the switches, so that the resonant capacitor and the resonant inductor are connected in series to each other, to perform resonant operation in a switching period, thus converting an input voltage to an output voltage. The control circuit generates a zero current signal and a first synchronization signal when a resonant inductor current flowing through the resonant inductor is zero. The control circuit turns off at least one corresponding switch according to the zero current signal. The control circuit turns on at least one corresponding switch according to the zero-current signal and a second synchronization signal, so that the RSCC operates in synchronization with at least another RSCC.

Abstract: An ammonium fluoride gas may be used to form a protection layer for one or more interlayer dielectric layers, one or more insulating caps, and/or one or more source/drain regions of a semiconductor device during a pre-clean etch process. The protection layer can be formed through an oversupply of nitrogen trifluoride during the pre-clean etch process. The oversupply of nitrogen trifluoride causes an increased formation of ammonium fluoride, which coats the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) with a thick protection layer. The protection layer protects the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) during the pre-clean process from being etched by fluorine ions formed during the pre-clean process.

Abstract: A conversion control circuit controls plural stackable sub-converters which are coupled in parallel to generate an output power to a load, the conversion control circuit includes: a current sharing terminal, wherein a current sharing signal is configured to be connected to the current sharing terminals, in parallel, of the plurality of the conversion control circuits; and a current sharing circuit, configured to generate or receive the current sharing signal which is generated according to an output current of the output power; wherein the conversion control circuit adjusts the power stage circuit according to the current sharing signal for current sharing among the plural stackable sub-converters.

Abstract: A method of generating an integrated circuit (IC) layout diagram includes obtaining a grid of intersecting first and second pluralities of tracks corresponding to adjacent metal layers, determining that first and second pitches of the respective first and second pluralities of tracks conform to a first rule, applying a via positioning pattern to the grid whereby via regions are restricted to alternating diagonal grid lines, positioning via regions at some or all of the grid intersections of the alternating diagonal grid lines, and generating the IC layout diagram including the via regions positioned along the alternating diagonal grid lines.

Abstract: A boost power factor correction circuit includes: a switch and an inductor coupled to each other; a current sensing device generating a current sensing signal according to a current flowing through the switch; a temperature sensing device coupled to the inductor to generate a temperature sensing signal; and a conversion control circuit operating the switch. The conversion control circuit is an integrated circuit and includes: a shared pin coupled to the temperature sensing device and the current sensing device; and a current sensing circuit and a temperature sensing circuit which sense a multipurpose sensing signal through the shared pin. The multipurpose sensing signal is related to the current sensing signal when the switch is ON and related to the temperature sensing signal when the switch is OFF. The temperature sensing signal is related to an input voltage, an output voltage and an electrical parameter of the temperature sensing device.

Abstract: A battery module for use in a battery system is operable in a bottom mode, a top mode or a middle mode during an enabled state. The battery module includes a battery unit and a battery control circuit. The battery unit which includes at least one battery generates a battery unit voltage between a positive terminal and a negative terminal of the battery unit. The battery control circuit is powered by the battery unit voltage and is configured to control the battery unit. The battery control circuit includes an enable terminal, an upstream input terminal, an upstream output terminal, a downstream input terminal, and a downstream output terminal. When the enable terminal is at an operation enabling level, or when the upstream input terminal is at an upstream enabling level, the battery module enters the enabled state.

Abstract: A control circuit for controlling a power supply circuit to provide power to a system device which includes a communication circuit includes: a pulse width modulation (PWM) controller configured to switch a transformer of the power supply circuit to generate a first output voltage; and a switched capacitor converter configured to generate a second output voltage according to the first output voltage. The second output voltage provides power to the communication circuit, wherein the communication circuit generates a power saving signal to control the PWM controller and the switched capacitor converter. When the power saving signal is enabled, the first output voltage is decreased and a duty ratio of the switched capacitor converter is increased.

Abstract: A brushless DC electric (BLDC) motor driver circuit includes: a power stage circuit configured to operably drive a brushless DC electric (BLDC) motor according to a pulse width modulation (PWM) signal; and an abnormality diagnosis circuit, wherein when a first parameter is under control, the abnormality diagnosis circuit is configured to operably determine a rotation abnormality condition of the BLDC motor according to a second parameter; wherein the first parameter and the second parameter are correlated with the rotation of the BLDC motor.

Abstract: A switched capacitor voltage converter circuit for converting a first voltage to a second voltage includes: an output capacitor; a switched capacitor converter; and a control circuit. The switched capacitor converter includes: a switch circuit including fourth switches; an inductor coupled between the switch circuit and the output capacitor; and a flying capacitor coupled to the switch circuit, wherein the flying capacitor and the output capacitor constitute a voltage divider. The control circuit generates a PWM signal according to the second voltage and generates switch signals according to the PWM signal to control the switch circuit, so as to convert the first voltage to the second voltage. The control circuit decides whether the switched capacitor converter operates in a boundary conduction mode, a discontinuous conduction mode or a continuous conduction mode according to an output current or an output current related signal.

Abstract: An integrated circuit (IC) structure includes a plurality of first metal segments in a first metal layer of a semiconductor substrate, the plurality of first metal segments corresponding to first tracks, a plurality of second metal segments in a second metal layer of the semiconductor substrate adjacent to the first metal layer, the plurality of second metal segments corresponding to second tracks perpendicular to the first tracks, and a plurality of via structures configured to electrically connect the plurality of first metal segments to the plurality of second metal segments.

Abstract: A power converter includes first to fourth switches, a flying capacitor, an inductor, an output capacitor and a control circuit. The first to fourth switches are sequentially coupled in cascode. The first switch is used to receive an input voltage. The flying capacitor is coupled across the second switch and the third switch, the inductor is coupled to the second switch, the third switch and the output capacitor. The output capacitor is used to output an output voltage. When the input voltage is less than an input voltage threshold, the control circuit is used to switch the first to fourth switches according to a resonant frequency. When the input voltage exceeds the input voltage threshold, the control circuit switch is used to the first to fourth switches according to a regulated frequency exceeding the resonant frequency.

Abstract: A power converter includes first to fourth switches, a flying capacitor, an inductor, an output capacitor and a control circuit. The first to fourth switches are sequentially coupled in cascode. The first switch receives an input voltage, and the fourth switch is further coupled to a ground terminal. The flying capacitor is coupled across the second switch and the third switch, the inductor is coupled to the second switch, the third switch and the output capacitor. The output capacitor is used to output an output voltage. In a non-regulated mode, the control circuit switches the first to fourth switches according to a resonant frequency. In a regulated mode, the control circuit switches the first to fourth switches according to a regulated frequency exceeding the resonant frequency. When the flying capacitor is coupled to the inductor, the flying capacitor and the inductor can form a resonant circuit having the resonant frequency.

Abstract: Provided is a magnetic resonance imaging (MRI) receiver coil device and methods of manufacture. An MRI receiver coil device comprises a thin-film substrate layer configured in a dome shape and a coil array positioned around a circumference of an exterior surface of the thin-film substrate layer. A thin-film cover layer is positioned over the exterior surface of the thin-film substrate layer such that the coil array is positioned between the thin-film cover layer and the thin-film substrate layer. The MRI receiver coil device further comprises an end ring engaging the thin-film substrate layer and the thin-film cover layer such that a watertight seal is formed around the coil array between the thin-film substrate layer, the thin-film cover layer, and the end ring. The coil array comprises a plurality of coil elements, each coil element comprising a loop of conductive trace material with at least one capacitive segment.

Abstract: A power supply system includes a power factor correction converter circuit and an isolated power converter circuit, wherein the power factor correction converter circuit corrects the power factor of a rectified power to generate a first output power, and the isolated power converter circuit converts the first output power to generate a second output power. The isolated power converter circuit includes a transformer, and the transformer includes a primary winding, a secondary winding, and an auxiliary winding. The auxiliary winding generates an auxiliary voltage which is related to the second output power. When the auxiliary voltage is lower than a disabled threshold, indicating that the voltage of the second output power is lower than a threshold, the power factor correction converter circuit provides a bypassing connection from the rectified power to the first output power and stops correcting the power factor of the rectified power.

Abstract: A switched capacitor voltage converter circuit for converting a first voltage to a second voltage, includes: a switched capacitor converter and a control circuit. The switched capacitor converter includes at least two capacitors, plural switches and at least one inductor. In a mode switching period wherein the switched capacitor converter switches from a present conversion mode to a next conversion mode, at least two forward switches of the plural switches operate in a unidirectional conduction mode. Each of the forward switches provides a current channel that unidirectionally flows toward the second voltage in the unidirectional conduction mode. The switched capacitor voltage converter circuit is also operable to convert the second voltage to the first voltage.

Abstract: The invention relates to a method for judging risk of suffering kidney cancer. The method includes detecting a PSMB9 protein concentration value from a test sample. And a risk factor value is obtained after processing the PSMB9 protein concentration value with an age. When the score of the risk factor value is greater than a defined threshold value of the risk factor threshold value, then the test sample is classified as a high risk sample of a of potential kidney cancer patient.