Patents by Inventor Hua Huang

Hua Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11886063
    Abstract: A display panel motherboard, a cutting method and a manufacturing method thereof, a display panel, and a display device are provided. The display panel motherboard includes at least three mother substrates, at least one display panel unit, and a cutting region. The at least three mother substrates are stacked with each other, at least a portion of the at least one display panel unit is surrounded by the cutting region, and an organic film layer is not disposed in at least two of the at least three mother substrates in the cutting region.
    Type: Grant
    Filed: November 29, 2019
    Date of Patent: January 30, 2024
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Shulei Li, Hua Huang, Zhao Kang
  • Publication number: 20240027766
    Abstract: The present invention is directed to wearable display technologies. More specifically, various embodiments of the present invention provide wearable augmented reality glasses incorporating projection display systems where one or more laser diodes are used as light source for illustrating images with optical delivery to the eye using transparent waveguides. In one set of embodiments, the present invention provides wearable augmented reality glasses incorporating projector systems that utilize transparent waveguides and blue and/or green laser fabricated using gallium nitride containing material. In another set of embodiments, the present invention provides wearable augmented reality glasses incorporating projection systems having digital lighting processing engines illuminated by blue and/or green laser devices with optical delivery to the eye using transparent waveguides.
    Type: Application
    Filed: March 2, 2023
    Publication date: January 25, 2024
    Applicant: KYOCERA SLD Laser, Inc.
    Inventors: Paul Rudy, James W. Raring, Eric Goutain, Hua Huang
  • Publication number: 20240029412
    Abstract: A model training method and a model training system are disclosed. The method includes the following. A first image with an on-image mark is obtained. In response to the on-image mark of the first image, an automatic background replacement is performed on the first image to generate a second image. A background image of the second image is different from a background image of the first image. Training data is generated according to the second image. An image identification model is trained by using the training data.
    Type: Application
    Filed: April 7, 2023
    Publication date: January 25, 2024
    Applicant: Pegatron Corporation
    Inventor: Peng-Hua Huang
  • Publication number: 20240030376
    Abstract: A light-emitting device includes a semiconductor epitaxial structure that has a first surface and a second surface, and that includes a first semiconductor layer, an active layer, and a second semiconductor layer. The active layer includes a quantum well structure having multiple periodic units, each including a well layer and a barrier layer greater in bandgap than the well layer. The bandgap of the barrier layer of at least one of the periodic units proximate to the first surface is smaller than that proximate to the second surface, and a thickness of the well layer of at least one of the periodic units proximate to the first surface is greater than that proximate to the second surface. In some embodiments, a bandgap of a second spacing layer disposed between the active and second semiconductor layers increases in a direction from the first surface to the second surface.
    Type: Application
    Filed: July 6, 2023
    Publication date: January 25, 2024
    Inventors: Jinghua CHEN, Yenchin WANG, Chong XU, Shasha CHEN, Kunte LIN, Kaiqing XU, Shihchieh HOU, Shao-Hua HUANG, Huanshao KUO, Yu-Ren PENG
  • Publication number: 20240019726
    Abstract: A mass transfer method for micro light-emitting diodes (W) includes: picking up micro light-emitting diodes (W) on an element substrate (200) by using a transfer substrate (300), and transferring the micro light-emitting diodes (W) after pickup to an intermediate carrying substrate (400); and transferring micro light-emitting diodes (W), which are on the intermediate carrying substrate (400) and correspond to all sub-pixels (SPX) on a target substrate (100), into the sub-pixels (SPX) of the target substrate (100) at one time, such that all the sub-pixels (SPX) on the target substrate (100) receives the micro light-emitting diodes (W) at one time.
    Type: Application
    Filed: October 30, 2020
    Publication date: January 18, 2024
    Inventors: Guangcai YUAN, Haixu LI, Shulei LI, Lubin SHI, Zhao KANG, Hua HUANG
  • Patent number: 11874552
    Abstract: A display device and a manufacturing method thereof are provided. The manufacturing method of the display device includes: stacking a first substrate, a second substrate and a third substrate to form a liquid crystal display panel and a dimming panel, the liquid crystal display panel including the first substrate and the second substrate, the dimming panel including the second substrate and the third substrate, and forming a first polarizer on a side of the third substrate away from the second substrate.
    Type: Grant
    Filed: November 29, 2019
    Date of Patent: January 16, 2024
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Hua Huang
  • Publication number: 20240012499
    Abstract: A touch sensor includes a substrate, sensing channels, and a protective layer. The sensing channels are disposed at intervals on a surface of the substrate, and any one of the sensing channels includes an electrode portion and a silver trace portion electrically connected to the electrode portion. The protective layer is disposed on the substrate and covers and encapsulates the sensing channels. After the touch sensor is subjected to a salt spray test with sodium chloride solution of a mass percentage concentration of 5% at a rate of 1 mL/H to 2 mL/H under an ambient temperature of 35° C. for 48 hours, a resistance change rate of any one of the sensing channels is less than or equal to 10%, and a resistance distribution difference between the sensing channels is less than or equal to 10%.
    Type: Application
    Filed: September 26, 2023
    Publication date: January 11, 2024
    Inventors: Shao Jie LIU, Si Qiang XU, Chien Hsien YU, Chia Jui LIN, Jian ZHANG, Wei Na CAO, Mei Fang LAN, Jun Hua HUANG, Mei Fen BAI, Song Xin WANG
  • Patent number: 11865588
    Abstract: A probe pin cleaning pad including a release layer or composite plate, an adhesive layer, a substrate layer, a cleaning layer, and a polishing layer is provided. The adhesive layer is disposed on the release layer or composite plate. The substrate layer is disposed on the adhesive layer. The cleaning layer is disposed on the substrate layer. The polishing layer is disposed on the cleaning layer. A cleaning method for a probe pin is also provided.
    Type: Grant
    Filed: March 10, 2022
    Date of Patent: January 9, 2024
    Assignee: Alliance Material Co., Ltd.
    Inventors: Chun-Fa Chen, Chi-Hua Huang, Yu-Hsuen Lee, Ching-Wen Hsu, Chao-Hsuan Yang, Ting-Wei Lin, Chin-Kai Lin, Chen-Ju Lee
  • Patent number: 11870219
    Abstract: A laser diode includes a substrate, an epitaxial structure, an electrode contacting layer and an optical cladding layer. The epitaxial structure is disposed on the substrate, and is formed with a ridge structure opposite to the substrate. The electrode contacting layer is disposed on a top surface of the ridge structure. The optical cladding layer has a refractive index smaller than that of the electrode contacting layer The optical cladding layer includes a first cladding portion which covers side walls of the ridge structure, and a second cladding portion which is disposed on a portion of the top surface of the ridge structure. A method for manufacturing the abovementioned laser diode is also disclosed.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: January 9, 2024
    Assignee: Quanzhou San'An Semiconductor Technology Co., Ltd.
    Inventors: Zhibai Zhong, Tao Ye, Min Zhang, Shao-Hua Huang, Shuiqing Li
  • Patent number: 11862612
    Abstract: Various embodiments of the present disclosure are directed towards a three-dimensional (3D) trench capacitor, as well as methods for forming the same. In some embodiments, a first substrate overlies a second substrate so a front side of the first substrate faces a front side of the second substrate. A first trench capacitor and a second trench capacitor extend respectively into the front sides of the first and second substrates. A plurality of wires and a plurality of vias are stacked between and electrically coupled to the first and second trench capacitors. A first through substrate via (TSV) extends through the first substrate from a back side of the first substrate, and the wires and the vias electrically couple the first TSV to the first and second trench capacitors. The first and second trench capacitors and the electrical coupling therebetween collectively define the 3D trench capacitor.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: January 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Xin-Hua Huang, Chung-Yi Yu, Yeong-Jyh Lin, Rei-Lin Chu
  • Patent number: 11860494
    Abstract: Disclosed are a liquid crystal display panel and a liquid crystal display device. The liquid crystal display panel includes: a liquid crystal display structure, the liquid crystal display structure including: a plurality of first gate lines extending in a row direction, a plurality of first data lines extending in a column direction, and a plurality of sub-pixel units defined by the plurality of first gate lines and the plurality of first data lines; and a liquid crystal light control structure located on a light incident side of the liquid crystal display structure, the liquid crystal light control structure including: a plurality of second data lines, an orthographic projection of at least one second data line on the liquid crystal display structure overlapping the plurality of sub-pixel units.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: January 2, 2024
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xuefei Sun, Xue Dong, Shunhang Zhang, Xinxing Wang, Hua Huang
  • Publication number: 20230414683
    Abstract: The present invention relates to an antioxidant, anti-inflammatory and whitening composition containing skin-derived lactic acid bacteria. In particular, the present invention relates to: an antioxidant, anti-inflammatory or whitening functional cosmetic composition, a food composition, a pharmaceutical composition for preventing or treating inflammation-related skin disease, and a pharmaceutical composition for preventing or treating melanin hyperpigmentation disease, which contain, as an active ingredient, a Lactobacillus plantarum subsp. shebah-202 (accession number: KCTC14087BP) strain, a Lactobacillus fermentum subsp. shebah-101 (accession number: KCTC14086BP) strain or a Lactobacillus paraplantarum subsp. shebah-401 (accession number: KCTC14088BP) strain, which is a novel lactic acid bacteria strain isolated and identified from human skin, a culture thereof, a lysate thereof, or an extract thereof.
    Type: Application
    Filed: October 12, 2021
    Publication date: December 28, 2023
    Inventors: Yoon-Soo CHO, Hye-won LIM, Chang-jin LIM, Yu-hua HUANG, Yong-wan CHO
  • Publication number: 20230418843
    Abstract: Methods and systems are described herein for improving data processing efficiency of classifying user files in a database. More particularly, methods and systems are described herein for improving data processing efficiency of classifying user files in a database in which the user files have a temporal element. The methods and system described herein accomplish these improvements by introducing time dependency into time-homogeneous probability models. Once time dependency has been introduced into the time-homogeneous probability models, these models may be used to improve the data processing efficiency of classifying the user files that feature a temporal element.
    Type: Application
    Filed: September 7, 2023
    Publication date: December 28, 2023
    Applicant: Capital One Services, LLC
    Inventors: Hao Hua HUANG, Bjorn KWOK
  • Patent number: 11854795
    Abstract: A method includes performing a plasma activation on a surface of a first package component, removing oxide regions from surfaces of metal pads of the first package component, and performing a pre-bonding to bond the first package component to a second package component.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Xin-Hua Huang, Ping-Yin Liu, Hung-Hua Lin, Hsun-Chung Kuang, Yuan-Chih Hsieh, Lan-Lin Chao, Chia-Shiung Tsai, Xiaomeng Chen
  • Patent number: 11851318
    Abstract: A microelectromechanical system device includes a substrate, a dielectric layer, an electrode, a surface modification layer and a membrane. The dielectric layer is formed on the substrate, and is formed with a cavity that is defined by a cavity-defining wall. The electrode is formed in the dielectric layer. The surface modification layer covers the cavity-defining wall, and has a plurality of hydrophobic end groups. The membrane is connected to the dielectric layer, and seals the cavity. The membrane is movable toward or away from the electrode. A method for making a microelectromechanical system device is also provided.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Chuan Teng, Ching-Kai Shen, Jung-Kuo Tu, Wei-Cheng Shen, Xin-Hua Huang, Wei-Chu Lin
  • Patent number: 11854999
    Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes bonding structure arranged directly between a first substrate and a second substrate. The first substrate includes a first transparent material and a first alignment mark. The first alignment mark is arranged on an outer region of the first substrate and also includes the first transparent material. The first alignment mark is defined by surfaces of the first substrate that are arranged between an uppermost surface of the first substrate and a lowermost surface of the first substrate. The second substrate includes a second alignment mark on an outer region of the second substrate. The second alignment mark directly underlies the first alignment mark, and the bonding structure is arranged directly between the first alignment mark and the second alignment mark.
    Type: Grant
    Filed: August 4, 2022
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Xin-Hua Huang, Ping-Yin Liu
  • Patent number: 11856854
    Abstract: Semiconductor structure and methods of forming the same are provided. An exemplary method includes receiving a workpiece including a magnetic tunneling junction (MTJ) and a conductive capping layer disposed on the MTJ, depositing a first dielectric layer over the workpiece, performing a first planarization process to the first dielectric layer, and after the performing of the first planarization process, patterning the first dielectric layer to form an opening exposing a top surface of the conductive capping layer, selectively removing the conductive capping layer. The method also includes depositing an electrode layer to fill the opening and performing a second planarization process to the workpiece such that a top surface of the electrode layer and a top surface of the first dielectric layer are coplanar.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Feng Yin, Min-Kun Dai, Chien-Hua Huang, Chung-Te Lin
  • Publication number: 20230407180
    Abstract: A polymerizable compound having absorption in the long UV wavelength range, a liquid-crystal (LC) medium comprising the polymerizable compound, and the use of the compound or LC medium for optical, electro-optical and electronic purposes, in particular in LC displays, especially in LC displays of the PSA (polymer sustained alignment) or SA (self-aligning) mode, an LC display of the PSA or SA mode comprising the compound or LC medium, and a process of manufacturing the LC display.
    Type: Application
    Filed: November 3, 2021
    Publication date: December 21, 2023
    Applicant: Merck Patent GmbH
    Inventors: Timo Uebel, Rocco Fortte, Qiong Tong, Chia-Sheng Hsieh, I-Hua Huang, Leo Weegels
  • Patent number: 11849644
    Abstract: A method for fabricating magnetoresistive random-access memory cells (MRAM) on a substrate is provided. The substrate is formed with a magnetic tunneling junction (MTJ) layer thereon. When the MTJ layer is etched to form the MRAM cells, there may be metal components deposited on a surface of the MRAM cells and between the MRAM cells. The metal components are then removed by chemical reaction. However, the removal of the metal components may form extra substances on the substrate. A further etching process is then performed to remove the extra substances by physical etching.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: December 19, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chang-Lin Yang, Chung-Te Lin, Sheng-Yuan Chang, Han-Ting Lin, Chien-Hua Huang
  • Publication number: 20230401420
    Abstract: A system receives a neural network model that includes asymmetric operations. Each asymmetric operation includes one or more fixed-point operands that are asymmetrically-quantized from corresponding floating-point operands. The system compiles a given asymmetric operation of the neural network model into a symmetric operation that includes a combined bias value. A compiler computes the combined bias value is a constant by merging at least zero points of input and output of the given asymmetric operation. The system then generates a symmetric neural network model including the symmetric operation for inference hardware to execute in fixed-point arithmetic.
    Type: Application
    Filed: June 12, 2022
    Publication date: December 14, 2023
    Inventors: Chih-Wen Goo, Pei-Kuei Tsung, Chih-Wei Chen, Mingen Shih, Shu-Hsin Chang, Po-Hua Huang, Ping-Yuan Tsai, Shih-Wei Hsieh, You Yu Nian