Patents by Inventor Huei-Min Lin

Huei-Min Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10592321
    Abstract: A data processing system includes a buffer, a design under checking (DUC), and a self-checking circuit. The buffer is used to buffer data generated from a source device. The DUC is used to perform a designated function upon data read from the buffer when operating under a normal mode. The self-checking circuit is used to apply logic functional checking to the DUC when the DUC operates under a self-checking mode. When the DUC operates under the self-checking mode, the buffer keeps buffering data generated from the source device.
    Type: Grant
    Filed: May 9, 2018
    Date of Patent: March 17, 2020
    Assignee: MEDIATEK INC.
    Inventors: Huei-Min Lin, Yi-Chang Chen, Chih-Ming Wang, Yung-Chang Chang
  • Patent number: 10306246
    Abstract: A method and apparatus for loop filter processing of reconstructed video data for a video coding system are disclosed. The system receives reconstructed video data for an image unit. The loop filter processing is applied to reconstructed pixels above a deblocking boundary of the current CTU. In order to reduce line buffer requirement and/or to reduce loop filter switching for image units, the sample adaptive offset (SAO) parameter boundary and spatial-loop-filter restricted boundary for the luma and chroma components are determined by global consideration. In one embodiment, the SAO parameter boundary and the spatial-loop-filter restricted boundary are aligned for the luma and chroma components respectively. In another embodiment, the SAO parameter boundary and the spatial-loop-filter restricted boundary for the luma and chroma components are all aligned.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: May 28, 2019
    Assignee: MEDIATEK INC.
    Inventors: Ping Chao, Huei-Min Lin, Chih-Ming Wang, Yung-Chang Chang
  • Publication number: 20180329371
    Abstract: A data processing system includes a buffer, a design under checking (DUC), and a self-checking circuit. The buffer is used to buffer data generated from a source device. The DUC is used to perform a designated function upon data read from the buffer when operating under a normal mode. The self-checking circuit is used to apply logic functional checking to the DUC when the DUC operates under a self-checking mode. When the DUC operates under the self-checking mode, the buffer keeps buffering data generated from the source device.
    Type: Application
    Filed: May 9, 2018
    Publication date: November 15, 2018
    Inventors: Huei-Min Lin, Yi-Chang Chen, Chih-Ming Wang, Yung-Chang Chang
  • Publication number: 20180139464
    Abstract: Aspects of the disclosure provide a video decoding system. The video decoding system can include a decoder core configured to selectively decode independently decodable tiles in a picture, each tile including largest coding units (LCUs) each associated with a pair of picture-based (X, Y) coordinates or tile-based (X, Y) coordinates, and memory management circuitry configured to translate one or two coordinates of a current LCU to generate one or two translated coordinates, and to determine a target memory space storing reference data for decoding the current LCU based on the one or two translated coordinates.
    Type: Application
    Filed: November 3, 2017
    Publication date: May 17, 2018
    Applicant: MEDIATEK INC.
    Inventors: Min-Hao CHIU, Ping Chao, Chia-Hung Kao, Huei-Min Lin, Hsiu-Yi Lin, Chi-Hung Chen, Chia-Yun Cheng, Chih-Ming Wang, Yung-Chang Chang
  • Patent number: 9762906
    Abstract: A method and apparatus for deblocking process using multiple processing units are disclosed. The video image is divided into at least two regions. The in-loop filter is applied to block boundaries associated with said at least two regions using multiple processing units. The in-loop filter is re-applied to one or more second block boundaries adjacent to region edge between two regions after applying the in-loop filter to the first block boundaries adjacent to the region edge. Furthermore, at least a first portion of said applying the in-loop filter to the first block boundaries and a second portion of said applying the in-loop filter to the second block boundaries are performed concurrently. The multiple processing units may correspond to multiple processing cores within one processor chip.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: September 12, 2017
    Assignee: MEDIATEK INC.
    Inventors: Chia-Yun Cheng, Huei-Min Lin, Yung-Chang Chang
  • Patent number: 9635360
    Abstract: A method and apparatus for applying DF processing and SAO processing to reconstructed video data are disclosed. The DF processing is applied to a current access element of reconstructed video data to generate DF output data and the deblocking status is determined while applying the DF processing. Status-dependent SAO processing is applied to one or more pixels of the DF output data according to the deblocking status. The status-dependent SAO processing comprises SAO processing, partial SAO processing, and no SAO processing. The SAO starting time for SAO processing is between the DF-output starting time and ending time for the current block. The DF starting time of a next block can be earlier than the SAO ending time of the current block by a period oft, where t is smaller than time difference between the DF-output starting time and the DF starting time of the next block.
    Type: Grant
    Filed: June 20, 2013
    Date of Patent: April 25, 2017
    Assignee: MEDIATEK INC.
    Inventors: Ping Chao, Huei-Min Lin, Yung-Chang Chang, Chi-Cheng Ju
  • Patent number: 9438911
    Abstract: A video processing system includes a data buffer and a storage controller. The data buffer is shared between a plurality of in-loop filters, wherein not all of the in-loop filters comply with a same video standard. The storage controller controls data access of the data buffer, wherein for each in-loop filter granted to access the data buffer, the data buffer stores a partial data of a picture processed by the in-loop filter. Another video processing system includes a storage device and a storage controller. The storage controller adaptively determines a size of a storage space according to a tile partition setting of a picture to be processed by an in-loop filter, and controls the storage device to allocate the storage space to serve as a data buffer for storing data of the in-loop filter.
    Type: Grant
    Filed: July 18, 2013
    Date of Patent: September 6, 2016
    Assignee: MEDIATEK INC.
    Inventors: Huei-Min Lin, Ping Chao, Chi-Cheng Ju, Yung-Chang Chang
  • Publication number: 20160241880
    Abstract: A method and apparatus for loop filter processing of reconstructed video data for a video coding system are disclosed. The system receives reconstructed video data for an image unit. The loop filter processing is applied to reconstructed pixels above a deblocking boundary of the current CTU. In order to reduce line buffer requirement and/or to reduce loop filter switching for image units, the sample adaptive offset (SAO) parameter boundary and spatial-loop-filter restricted boundary for the luma and chroma components are determined by global consideration. In one embodiment, the SAO parameter boundary and the spatial-loop-filter restricted boundary are aligned for the luma and chroma components respectively. In another embodiment, the SAO parameter boundary and the spatial-loop-filter restricted boundary for the luma and chroma components are all aligned.
    Type: Application
    Filed: January 29, 2016
    Publication date: August 18, 2016
    Inventors: Ping CHAO, Huei-Min LIN, Chih-Ming WANG, Yung-Chang CHANG
  • Publication number: 20160241881
    Abstract: In a method and apparatus for loop filter processing, a sample adaptive offset (SAO) process is applied to DF (deblocking filter)-processed pixels of current image unit according to one or more SAO parameters. Pixels within SAO parameter boundary of current image unit share the same SAO parameters. SAO parameter boundary is shifted according to a respective goal to reduce both line buffer requirement and parameter switching, where the vertical SAO parameter boundary of current image unit is shifted-left by xs lines from a vertical boundary of current image unit and the horizontal SAO parameter boundary of current image unit is shifted-up by ys lines from a horizontal boundary of current image unit. To reduce the requirement of line buffer, xs is always greater than m that corresponds to the number of pixels at each side of a horizontal edge modified by DF, ys is greater than or equal to 0.
    Type: Application
    Filed: February 4, 2016
    Publication date: August 18, 2016
    Inventors: Ping CHAO, Huei-Min LIN, Chih-Ming WANG, Yung-Chang CHANG
  • Publication number: 20160029022
    Abstract: A video processing apparatus includes a first processing circuit, a second processing circuit, and a control circuit. The first processing circuit performs a first processing operation. The second processing circuit performs a second processing operation different from the first processing operation. The control circuit generates at least one output coding unit to the second processing circuit according to an input coding unit generated from the first processing circuit, wherein the control circuit checks a size of the input coding unit to selectively split the input coding unit into a plurality of output coding units.
    Type: Application
    Filed: July 23, 2015
    Publication date: January 28, 2016
    Inventors: Chia-Yun Cheng, Chih-Ming Wang, Yung-Chang Chang, Chun-Chia Chen, Meng-Jye Hu, Huei-Min Lin
  • Publication number: 20140233649
    Abstract: A method and apparatus for deblocking process using multiple processing units are disclosed. The video image is divided into at least two regions. The in-loop filter is applied to block boundaries associated with said at least two regions using multiple processing units. The in-loop filter is re-applied to one or more second block boundaries adjacent to region edge between two regions after applying the in-loop filter to the first block boundaries adjacent to the region edge. Furthermore, at least a first portion of said applying the in-loop filter to the first block boundaries and a second portion of said applying the in-loop filter to the second block boundaries are performed concurrently. The multiple processing units may correspond to multiple processing cores within one processor chip.
    Type: Application
    Filed: February 12, 2014
    Publication date: August 21, 2014
    Applicant: MEDIATEK INC.
    Inventors: Chia-Yun Cheng, Huei-Min Lin, Yung-Chang Chang
  • Publication number: 20140037017
    Abstract: A video processing system includes a data buffer and a storage controller. The data buffer is shared between a plurality of in-loop filters, wherein not all of the in-loop filters comply with a same video standard. The storage controller controls data access of the data buffer, wherein for each in-loop filter granted to access the data buffer, the data buffer stores a partial data of a picture processed by the in-loop filter. Another video processing system includes a storage device and a storage controller. The storage controller adaptively determines a size of a storage space according to a tile partition setting of a picture to be processed by an in-loop filter, and controls the storage device to allocate the storage space to serve as a data buffer for storing data of the in-loop filter.
    Type: Application
    Filed: July 18, 2013
    Publication date: February 6, 2014
    Applicant: MEDIATEK INC.
    Inventors: Huei-Min Lin, Ping Chao, Chi-Cheng Ju, Yung-Chang Chang
  • Publication number: 20140036992
    Abstract: A method and apparatus for applying DF processing and SAO processing to reconstructed video data are disclosed. The DF processing is applied to a current access element of reconstructed video data to generate DF output data and the deblocking status is determined while applying the DF processing. Status-dependent SAO processing is applied to one or more pixels of the DF output data according to the deblocking status. The status-dependent SAO processing comprises SAO processing, partial SAO processing, and no SAO processing. The SAO starting time for SAO processing is between the DF-output starting time and ending time for the current block. The DF starting time of a next block can be earlier than the SAO ending time of the current block by a period oft, where t is smaller than time difference between the DF-output starting time and the DF starting time of the next block.
    Type: Application
    Filed: June 20, 2013
    Publication date: February 6, 2014
    Inventors: Ping Chao, Huei-Min Lin, Yung-Chang Chang, Chi-Cheng Ju