Abstract: A transistor cell element that may be used alone or in a matrix array in large scale integrated circuits includes a substrate onto which an isolation region is fabricated. Inner and outer charge carrier regions having a high density of first charge carriers is formed in the substrate to define a channel region therebetween. The inner carrier region is adjacent the isolation region so that the channel region extends in a closed loop from said isolation region, around the inner carrier region and back to the isolation region, with the outer carrier region surrounding the isolation and channel regions. The channel region has a low density of second charge carriers, having opposite charge than the first charge carriers, and a gate structure including a conductive band and an insulating layer is formed over the channel region. In one alternate embodiment, additional isolation regions may be provided with these regions interrupting the channel region.

Abstract: A laser programmable logic switch (22) includes a fusible link (28), an output node (26) and a transistor (24) which is fabricated to be in the off state. When it is desired to have the output node (26) at a low logic state, the circuit (22) is left unchanged. But if it is determined that the output node (26) should be at a high logic level state, the fusible link (28) is opened by a first laser pulse. A second laser pulse is then applied to transistor (24) to cause damage to the structure of the transistor (24). The transistor (24) can be damaged in any of a number of modes which result in the formation of a conducting path between the output node (26) and the power terminal V.sub.cc. Unlike conventional laser switch circuits, the circuit (22) does not draw static power under any conditions thereby reducing power consumption by the integrated circuit utilizing such a laser switched gate.