Patents by Inventor Hui-Chung Liu

Hui-Chung Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11817397
    Abstract: A semiconductor device package and a method for manufacturing a semiconductor device package are provided. The semiconductor device package includes a carrier, a sensor module, a connector, and a stress buffer structure. The sensor module is disposed on the carrier. The connector is connected to the carrier. The stress buffer structure connects the connector to the sensor module.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: November 14, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chi Sheng Tseng, Lu-Ming Lai, Hui-Chung Liu, Yu-Che Huang
  • Publication number: 20230208394
    Abstract: The present disclosure provides a semiconductor package structure. The semiconductor package structure includes a substrate, a first electronic component and a support component. The first electronic component is disposed on the substrate. The first electronic component has a backside surface facing a first surface of the substrate. The support component is disposed between the backside surface of the first electronic component and the first surface of the substrate. The backside surface of the first electronic component has a first portion connected to the support component and a second portion exposed from the support component.
    Type: Application
    Filed: February 21, 2023
    Publication date: June 29, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi Sheng TSENG, Lu-Ming LAI, Ching-Han HUANG, Kuo-Hua LAI, Hui-Chung LIU
  • Patent number: 11588470
    Abstract: The present disclosure provides a semiconductor package structure. The semiconductor package structure includes a substrate, a first electronic component and a support component. The first electronic component is disposed on the substrate. The first electronic component has a backside surface facing a first surface of the substrate. The support component is disposed between the backside surface of the first electronic component and the first surface of the substrate. The backside surface of the first electronic component has a first portion connected to the support component and a second portion exposed from the support component.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: February 21, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chi Sheng Tseng, Lu-Ming Lai, Ching-Han Huang, Kuo-Hua Lai, Hui-Chung Liu
  • Publication number: 20220404908
    Abstract: The present disclosure provides a body-part tracking device and a body-part tracking method. The body-part tracking device includes a first electronic component and a first antenna element. The first antenna element is electrically connected to the first electronic component and configured to receive a first wave. The first electronic component is configured to, in response to the first wave, transmit a second wave.
    Type: Application
    Filed: June 18, 2021
    Publication date: December 22, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi Sheng TSENG, Lu-Ming LAI, Hui-Chung LIU, I Hung WU, Kai-Sheng PAI
  • Patent number: 11527671
    Abstract: An optical package structure includes a substrate, an emitter, a first detector and a light-absorption material. The substrate has a first surface and a second surface opposite to the first surface, the substrate includes a via defining a third surface extending from the first surface to the second surface. The emitter is disposed on the first surface of the substrate. The first detector is disposed on the first surface and aligned with the via of the substrate. The light-absorption material is disposed on the third surface of the substrate.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: December 13, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chi Sheng Tseng, Hui-Chung Liu, Ching-Han Huang
  • Publication number: 20220199550
    Abstract: A semiconductor device package and a method for manufacturing a semiconductor device package are provided. The semiconductor device package includes a carrier, a sensor module, a connector, and a stress buffer structure. The sensor module is disposed on the carrier. The connector is connected to the carrier. The stress buffer structure connects the connector to the sensor module.
    Type: Application
    Filed: December 21, 2020
    Publication date: June 23, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi Sheng TSENG, Lu-Ming LAI, Hui-Chung LIU, Yu-Che HUANG
  • Patent number: 11296651
    Abstract: A semiconductor package structure includes an organic substrate having a first surface, a first recess depressed from the first surface, a first chip over the first surface and covering the first recess, thereby defining a first cavity enclosed by a back surface of the first chip and the first recess, and a second chip over the first chip. The first cavity is an air cavity or a vacuum cavity.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: April 5, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chi Sheng Tseng, Lu-Ming Lai, Ching-Han Huang, Hui-Chung Liu, Kuo-Hua Lai, Cheng-Ling Huang
  • Patent number: 11217499
    Abstract: A semiconductor package structure includes a substrate; a first die on the substrate, wherein an active surface of the first die is facing away from the substrate; a second die on the active surface of the first die, electrically connected to the first die through a plurality of conductive terminals; and a sealing structure on the active surface of the first die, surrounding the plurality of conductive terminals and abutting the second die thereby forming a cavity between the first die and the second die. A method for manufacturing the semiconductor package structure is also provided.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: January 4, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chi Sheng Tseng, Lu-Ming Lai, Hui-Chung Liu
  • Publication number: 20210358823
    Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a semiconductor package structure includes a semiconductor die and a light absorbing layer. The semiconductor die has a first surface, a second surface and a third surface. An active layer of the semiconductor die is adjacent to the first surface. The second surface is opposite to the first surface. The third surface extends from the first surface to the second surface. The light absorbing layer covers the second surface and the third surface of the semiconductor die. The semiconductor die has a thickness defined from the first surface to the second surface, and the thickness of the semiconductor die is less than or equal to about 300 micrometers (?m).
    Type: Application
    Filed: May 18, 2020
    Publication date: November 18, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi Sheng TSENG, Lu-Ming LAI, Yu-Che HUANG, Shih-Chieh TANG, Yu-Min PENG, Hui-Chung LIU
  • Publication number: 20210257988
    Abstract: The present disclosure provides a semiconductor package structure. The semiconductor package structure includes a substrate, a first electronic component and a support component. The first electronic component is disposed on the substrate. The first electronic component has a backside surface facing a first surface of the substrate. The support component is disposed between the backside surface of the first electronic component and the first surface of the substrate. The backside surface of the first electronic component has a first portion connected to the support component and a second portion exposed from the support component.
    Type: Application
    Filed: February 18, 2020
    Publication date: August 19, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi Sheng TSENG, Lu-Ming LAI, Ching-Han HUANG, Kuo-Hua LAI, Hui-Chung LIU
  • Patent number: 11088054
    Abstract: A lead frame includes a die pad having a pad top surface and a pad bottom surface opposite to the top pad surface, a plurality of leads, each having a top lead surface and a bottom lead surface opposite to the top lead surface and disposed around the die pad, and a first molding compound disposed between the die pad and each of the leads. The first molding compound exposes the top pad surface of the die pad by covering a portion of the periphery of the top pad surface of the die pad. A method for manufacturing the lead frame is also disclosed.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: August 10, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chi Sheng Tseng, Lu-Ming Lai, Ying-Chung Chen, Hui-Chung Liu
  • Publication number: 20210202780
    Abstract: An optical package structure includes a substrate, an emitter, a first detector and a light-absorption material. The substrate has a first surface and a second surface opposite to the first surface, the substrate includes a via defining a third surface extending from the first surface to the second surface. The emitter is disposed on the first surface of the substrate. The first detector is disposed on the first surface and aligned with the via of the substrate. The light-absorption material is disposed on the third surface of the substrate.
    Type: Application
    Filed: December 31, 2019
    Publication date: July 1, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi Sheng TSENG, Hui-Chung LIU, Ching-Han HUANG
  • Publication number: 20210082791
    Abstract: A lead frame includes a die pad having a pad top surface and a pad bottom surface opposite to the top pad surface, a plurality of leads, each having a top lead surface and a bottom lead surface opposite to the top lead surface and disposed around the die pad, and a first molding compound disposed between the die pad and each of the leads. The first molding compound exposes the top pad surface of the die pad by covering a portion of the periphery of the top pad surface of the die pad. A method for manufacturing the lead frame is also disclosed.
    Type: Application
    Filed: September 13, 2019
    Publication date: March 18, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi Sheng TSENG, Lu-Ming LAI, Ying-Chung CHEN, Hui-Chung LIU
  • Publication number: 20210036658
    Abstract: A semiconductor package structure includes an organic substrate having a first surface, a first recess depressed from the first surface, a first chip over the first surface and covering the first recess, thereby defining a first cavity enclosed by a back surface of the first chip and the first recess, and a second chip over the first chip. The first cavity is an air cavity or a vacuum cavity.
    Type: Application
    Filed: October 19, 2020
    Publication date: February 4, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi Sheng TSENG, Lu-Ming LAI, Ching-Han HUANG, Hui-Chung LIU, Kuo-Hua LAI, Cheng-Ling HUANG
  • Publication number: 20200402879
    Abstract: A semiconductor package structure includes a substrate; a first die on the substrate, wherein an active surface of the first die is facing away from the substrate; a second die on the active surface of the first die, electrically connected to the first die through a plurality of conductive terminals; and a sealing structure on the active surface of the first die, surrounding the plurality of conductive terminals and abutting the second die thereby forming a cavity between the first die and the second die. A method for manufacturing the semiconductor package structure is also provided.
    Type: Application
    Filed: June 21, 2019
    Publication date: December 24, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi Sheng TSENG, Lu-Ming LAI, Hui-Chung LIU
  • Patent number: 10812017
    Abstract: A semiconductor package structure includes an organic substrate having a first surface, a first recess depressed from the first surface, a first chip over the first surface and covering the first recess, thereby defining a first cavity enclosed by a back surface of the first chip and the first recess, and a second chip over the first chip. The first cavity is an air cavity or a vacuum cavity.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: October 20, 2020
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chi Sheng Tseng, Lu-Ming Lai, Ching-Han Huang, Hui-Chung Liu, Kuo-Hua Lai, Cheng-Ling Huang